diff options
| -rw-r--r-- | gcc/c-family/ChangeLog | 7 | ||||
| -rw-r--r-- | gcc/c-family/c-common.c | 11 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/aarch64/pr94072.c | 9 |
4 files changed, 28 insertions, 4 deletions
diff --git a/gcc/c-family/ChangeLog b/gcc/c-family/ChangeLog index 59661ef..3f195eb 100644 --- a/gcc/c-family/ChangeLog +++ b/gcc/c-family/ChangeLog @@ -1,3 +1,10 @@ +2020-03-20 Richard Sandiford <richard.sandiford@arm.com> + + PR middle-end/94072 + * c-common.c (c_common_type_for_mode): Before using a registered + built-in type, check that the vectorness of the type matches + the vectorness of the mode. + 2020-03-17 Jakub Jelinek <jakub@redhat.com> * c-common.c (resolve_overloaded_builtin): Fix up duplicated word diff --git a/gcc/c-family/c-common.c b/gcc/c-family/c-common.c index 25020bf14..8e5a924 100644 --- a/gcc/c-family/c-common.c +++ b/gcc/c-family/c-common.c @@ -2387,10 +2387,13 @@ c_common_type_for_mode (machine_mode mode, int unsignedp) } for (t = registered_builtin_types; t; t = TREE_CHAIN (t)) - if (TYPE_MODE (TREE_VALUE (t)) == mode - && !!unsignedp == !!TYPE_UNSIGNED (TREE_VALUE (t))) - return TREE_VALUE (t); - + { + tree type = TREE_VALUE (t); + if (TYPE_MODE (type) == mode + && VECTOR_TYPE_P (type) == VECTOR_MODE_P (mode) + && !!unsignedp == !!TYPE_UNSIGNED (type)) + return type; + } return NULL_TREE; } diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 540ec67..2408590 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2020-03-20 Richard Sandiford <richard.sandiford@arm.com> + + PR middle-end/94072 + * gcc.target/aarch64/pr94072.c: New test. + 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com> Andre Vieira <andre.simoesdiasvieira@arm.com> Mihail Ionescu <mihail.ionescu@arm.com> diff --git a/gcc/testsuite/gcc.target/aarch64/pr94072.c b/gcc/testsuite/gcc.target/aarch64/pr94072.c new file mode 100644 index 0000000..2aa72eb --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/pr94072.c @@ -0,0 +1,9 @@ +/* { dg-options "-msve-vector-bits=512" } */ + +#pragma GCC target "+nosve" + +void +foo (void) +{ + (int __attribute__ ((__vector_size__ (64)))){}; +} |