diff options
| -rw-r--r-- | gcc/config/i386/i386.md | 66 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/i386/insvdi_lowpart-1.c | 13 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/i386/insvti_lowpart-1.c | 13 |
3 files changed, 92 insertions, 0 deletions
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 621cdd9..844deea 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -3243,6 +3243,30 @@ [(parallel [(set (match_dup 1) (match_dup 2)) (set (match_dup 2) (match_dup 1))])]) +;; Convert xchg with a REG_UNUSED note to a mov (variant #1). +(define_peephole2 + [(parallel [(set (match_operand:SWI 0 "general_reg_operand") + (match_operand:SWI 1 "general_reg_operand")) + (set (match_dup 1) (match_dup 0))])] + "((REGNO (operands[0]) != AX_REG + && REGNO (operands[1]) != AX_REG) + || optimize_size < 2 + || !optimize_insn_for_size_p ()) + && peep2_reg_dead_p (1, operands[0])" + [(set (match_dup 1) (match_dup 0))]) + +;; Convert xchg with a REG_UNUSED note to a mov (variant #2). +(define_peephole2 + [(parallel [(set (match_operand:SWI 0 "general_reg_operand") + (match_operand:SWI 1 "general_reg_operand")) + (set (match_dup 1) (match_dup 0))])] + "((REGNO (operands[0]) != AX_REG + && REGNO (operands[1]) != AX_REG) + || optimize_size < 2 + || !optimize_insn_for_size_p ()) + && peep2_reg_dead_p (1, operands[1])" + [(set (match_dup 0) (match_dup 1))]) + ;; Convert moves to/from AX_REG into xchg with -Oz. (define_peephole2 [(set (match_operand:SWI48 0 "general_reg_operand") @@ -3573,6 +3597,48 @@ split_double_concat (TImode, operands[0], operands[4], operands[2]); DONE; }) + +(define_insn_and_split "*insvti_lowpart_1" + [(set (match_operand:TI 0 "nonimmediate_operand" "=ro,r,r,&r") + (any_or_plus:TI + (and:TI + (match_operand:TI 1 "nonimmediate_operand" "r,m,r,m") + (match_operand:TI 3 "const_scalar_int_operand" "n,n,n,n")) + (zero_extend:TI + (match_operand:DI 2 "nonimmediate_operand" "r,r,m,m"))))] + "TARGET_64BIT + && CONST_WIDE_INT_P (operands[3]) + && CONST_WIDE_INT_NUNITS (operands[3]) == 2 + && CONST_WIDE_INT_ELT (operands[3], 0) == 0 + && CONST_WIDE_INT_ELT (operands[3], 1) == -1" + "#" + "&& reload_completed" + [(const_int 0)] +{ + operands[4] = gen_highpart (DImode, operands[1]); + split_double_concat (TImode, operands[0], operands[2], operands[4]); + DONE; +}) + +(define_insn_and_split "*insvdi_lowpart_1" + [(set (match_operand:DI 0 "nonimmediate_operand" "=ro,r,r,&r") + (any_or_plus:DI + (and:DI + (match_operand:DI 1 "nonimmediate_operand" "r,m,r,m") + (match_operand:DI 3 "const_int_operand" "n,n,n,n")) + (zero_extend:DI + (match_operand:SI 2 "nonimmediate_operand" "r,r,m,m"))))] + "!TARGET_64BIT + && CONST_INT_P (operands[3]) + && UINTVAL (operands[3]) == 0xffffffff00000000ll" + "#" + "&& reload_completed" + [(const_int 0)] +{ + operands[4] = gen_highpart (SImode, operands[1]); + split_double_concat (DImode, operands[0], operands[2], operands[4]); + DONE; +}) ;; Floating point push instructions. diff --git a/gcc/testsuite/gcc.target/i386/insvdi_lowpart-1.c b/gcc/testsuite/gcc.target/i386/insvdi_lowpart-1.c new file mode 100644 index 0000000..4d94fec --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/insvdi_lowpart-1.c @@ -0,0 +1,13 @@ +/* { dg-do compile { target ia32 } } */ +/* { dg-options "-O2" } */ + +long long foo(long long x, int y) +{ + long long mask = ~0ull << 32; + long long t = x & mask; + long long r = t | (unsigned int)y; + return r; +} + +/* { dg-final { scan-assembler-not "xorl" } } */ +/* { dg-final { scan-assembler-not "orq" } } */ diff --git a/gcc/testsuite/gcc.target/i386/insvti_lowpart-1.c b/gcc/testsuite/gcc.target/i386/insvti_lowpart-1.c new file mode 100644 index 0000000..4e1fbbb --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/insvti_lowpart-1.c @@ -0,0 +1,13 @@ +/* { dg-do compile { target int128 } } */ +/* { dg-options "-O2" } */ + +__int128 foo(__int128 x, unsigned long long y) +{ + __int128 m = ~((__int128)~0ull); + __int128 t = x & m; + __int128 r = t | y; + return r; +} + +/* { dg-final { scan-assembler-not "xorl" } } */ +/* { dg-final { scan-assembler-not "orq" } } */ |