diff options
| -rw-r--r-- | gcc/ChangeLog | 9 | ||||
| -rw-r--r-- | gcc/config/rs6000/rs6000.c | 5 | ||||
| -rw-r--r-- | gcc/config/rs6000/rs6000.opt | 4 | ||||
| -rw-r--r-- | gcc/doc/invoke.texi | 9 |
4 files changed, 26 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 5706ef8..daf7fa1 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,12 @@ +2010-11-29 Joakim Tjernlund <Joakim.Tjernlund@transmode.se> + + * config/rs6000/rs6000.c (rs6000_reg_live_or_pic_offset_p): Check + TARGET_SINGLE_PIC_BASE for RS6000_PIC_OFFSET_TABLE_REGNUM. + (rs6000_emit_prologue): Don't set PIC register if + TARGET_SINGLE_PIC_BASE. + * config/rs6000/rs6000.opt (msingle-pic-base): New option. + * doc/invoke.texi (msingle-pic-base): Document. + 2010-11-29 H.J. Lu <hongjiu.lu@intel.com> PR driver/46712 diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 9ac9d99..6136c39 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -20032,8 +20032,10 @@ rs6000_reg_live_or_pic_offset_p (int reg) return (((crtl->calls_eh_return || df_regs_ever_live_p (reg)) && (!call_used_regs[reg] || (reg == RS6000_PIC_OFFSET_TABLE_REGNUM + && !TARGET_SINGLE_PIC_BASE && TARGET_TOC && TARGET_MINIMAL_TOC))) || (reg == RS6000_PIC_OFFSET_TABLE_REGNUM + && !TARGET_SINGLE_PIC_BASE && ((DEFAULT_ABI == ABI_V4 && flag_pic != 0) || (DEFAULT_ABI == ABI_DARWIN && flag_pic)))); } @@ -20688,6 +20690,9 @@ rs6000_emit_prologue (void) insn = emit_insn (generate_set_vrsave (reg, info, 0)); } + if (TARGET_SINGLE_PIC_BASE) + return; /* Do not set PIC register */ + /* If we are using RS6000_PIC_OFFSET_TABLE_REGNUM, we need to set it up. */ if ((TARGET_TOC && TARGET_MINIMAL_TOC && get_pool_size () != 0) || (DEFAULT_ABI == ABI_V4 diff --git a/gcc/config/rs6000/rs6000.opt b/gcc/config/rs6000/rs6000.opt index 2c6a861..02a60f8 100644 --- a/gcc/config/rs6000/rs6000.opt +++ b/gcc/config/rs6000/rs6000.opt @@ -275,6 +275,10 @@ mupdate Target Report RejectNegative InverseMask(NO_UPDATE, UPDATE) Generate load/store with update instructions +msingle-pic-base +Target Report Var(TARGET_SINGLE_PIC_BASE) Init(0) +Do not load the PIC register in function prologues + mavoid-indexed-addresses Target Report Var(TARGET_AVOID_XFORM) Init(-1) Save Avoid generation of indexed load/store instructions when possible diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index b68d1dc..94e8160 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -780,7 +780,7 @@ See RS/6000 and PowerPC Options. -mstrict-align -mno-strict-align -mrelocatable @gol -mno-relocatable -mrelocatable-lib -mno-relocatable-lib @gol -mtoc -mno-toc -mlittle -mlittle-endian -mbig -mbig-endian @gol --mdynamic-no-pic -maltivec -mswdiv @gol +-mdynamic-no-pic -maltivec -mswdiv -msingle-pic-base @gol -mprioritize-restricted-insns=@var{priority} @gol -msched-costly-dep=@var{dependence_type} @gol -minsert-sched-nops=@var{scheme} @gol @@ -15729,6 +15729,13 @@ relocatable, but that its external references are relocatable. The resulting code is suitable for applications, but not shared libraries. +@item -msingle-pic-base +@opindex msingle-pic-base +Treat the register used for PIC addressing as read-only, rather than +loading it in the prologue for each function. The run-time system is +responsible for initializing this register with an appropriate value +before execution begins. + @item -mprioritize-restricted-insns=@var{priority} @opindex mprioritize-restricted-insns This option controls the priority that is assigned to |