diff options
89 files changed, 3160 insertions, 1399 deletions
@@ -1,3 +1,8 @@ +2025-10-15 Basil Milanich <bmilanich@gmail.com> + + * Makefile.tpl (distclean): Remove extraenous semicolon. + * Makefile.in: Rebuilt. + 2025-10-11 Ben Boeckel <ben.boeckel@kitware.com> * config-ml.in: Update patch email address. diff --git a/Makefile.in b/Makefile.in index 8ac778a..e95d310 100644 --- a/Makefile.in +++ b/Makefile.in @@ -2740,7 +2740,7 @@ local-distclean: -rmdir texinfo/makeinfo texinfo/po texinfo/util 2>/dev/null -rmdir c++tools fastjar gcc gnattools gotools 2>/dev/null -rmdir libcc1 libiberty texinfo zlib 2>/dev/null - -find . -name config.cache -exec rm -f {} \; \; 2>/dev/null + -find . -name config.cache -exec rm -f {} \; 2>/dev/null local-maintainer-clean: @echo "This command is intended for maintainers to use;" diff --git a/Makefile.tpl b/Makefile.tpl index 431ce5c..7797dca 100644 --- a/Makefile.tpl +++ b/Makefile.tpl @@ -979,7 +979,7 @@ local-distclean: -rmdir texinfo/makeinfo texinfo/po texinfo/util 2>/dev/null -rmdir c++tools fastjar gcc gnattools gotools 2>/dev/null -rmdir libcc1 libiberty texinfo zlib 2>/dev/null - -find . -name config.cache -exec rm -f {} \; \; 2>/dev/null + -find . -name config.cache -exec rm -f {} \; 2>/dev/null local-maintainer-clean: @echo "This command is intended for maintainers to use;" diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 8a7cb97..3df799b 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,139 @@ +2025-10-15 Andrew MacLeod <amacleod@redhat.com> + + PR tree-optimization/121468 + PR tree-optimization/121206 + PR tree-optimization/122200 + * value-range.cc (irange_bitmask::range_from_mask): New. + (irange::snap): Add explicit overflow flag. + (irange::snap_subranges): Use overflow flag. + (irange::set_range_from_bitmask): Use range_from_mask. + (test_irange_snap_bounds): Adjust for improved ranges. + * value-range.h (irange::range_from_mask): Add prototype. + (irange::snap): Adjust prototype. + +2025-10-15 Tobias Burnus <tburnus@baylibre.com> + + * config/gcn/gcn-devices.def (gfx942, gfx950): Set generic name + to GFX9_4_GENERIC. + * config/gcn/t-omp-device: Include generic names for OpenMP's + ISA trait. + +2025-10-15 Andrew Pinski <andrew.pinski@oss.qualcomm.com> + + * print-tree.cc (print_node): Print out clique/base + for MEM_REF and TARGET_MEM_REF. + +2025-10-15 Richard Earnshaw <rearnsha@arm.com> + + PR target/118460 + * config/arm/arm.cc (arm_canonicalize_comparison): For floating- + point comparisons, swap the operand order if that will be more + likely to produce a comparison that can be used with VSEL. + (arm_validize_comparison): Make sure that HFmode comparisons + are compatible with VSEL. + +2025-10-15 Andrew Pinski <andrew.pinski@oss.qualcomm.com> + + PR tree-optimization/122037 + * tree-ssa-dce.cc (eliminate_unnecessary_stmts): Remove + __builtin_stack_save when the lhs is unused. + +2025-10-15 Alice Carlotti <alice.carlotti@arm.com> + + * config/aarch64/aarch64-sys-regs.def: Copy from Binutils. + * config/aarch64/aarch64.cc (F_ARCHEXT): Delete flag. + * config/aarch64/aarch64.h + (AARCH64_FL_AMU): Delete unused macro. + (AARCH64_FL_SCXTNUM): Ditto. + (AARCH64_FL_ID_PFR2): Ditto. + (AARCH64_FL_AIE): Ditto. + (AARCH64_FL_DEBUGv8p9): Ditto. + (AARCH64_FL_FGT2): Ditto. + (AARCH64_FL_PFAR): Ditto. + (AARCH64_FL_PMUv3_ICNTR): Ditto. + (AARCH64_FL_PMUv3_SS): Ditto. + (AARCH64_FL_PMUv3p9): Ditto. + (AARCH64_FL_S1PIE): Ditto. + (AARCH64_FL_S1POE): Ditto. + (AARCH64_FL_S2PIE): Ditto. + (AARCH64_FL_S2POE): Ditto. + (AARCH64_FL_SCTLR2): Ditto. + (AARCH64_FL_SEBEP): Ditto. + (AARCH64_FL_SPE_FDS): Ditto. + (AARCH64_FL_TCR2): Ditto. + +2025-10-15 Sebastian Pop <spop@nvidia.com> + + * doc/invoke.texi (ftree-parallelize-loops): Update. + * common.opt (ftree-parallelize-loops): Add alias that maps to + special value INT_MAX for runtime thread detection. + * tree-parloops.cc (create_parallel_loop): Use INT_MAX for runtime + detection. Call gimple_build_omp_parallel without building a + OMP_CLAUSE_NUM_THREADS clause. + (gen_parallel_loop): For auto-detection, use a conservative + estimate of 2 threads. + (parallelize_loops): Same. + +2025-10-15 Christophe Lyon <christophe.lyon@linaro.org> + + PR target/122189 + * config/arm/iterators.md (VxCIQ_carry, VxCIQ_M_carry, VxCQ_carry) + (VxCQ_M_carry): New iterators. + * config/arm/mve.md (get_fpscr_nzcvqc, set_fpscr_nzcvqc): Use + unspec instead of unspec_volatile. + (vadciq, vadciq_m, vadcq, vadcq_m): Use vfpcc in operation. Use a + different unspec code for carry calcultation. + * config/arm/unspecs.md (VADCQ_U_carry, VADCQ_M_U_carry) + (VADCQ_S_carry, VADCQ_M_S_carry, VSBCIQ_U_carry ,VSBCIQ_S_carry + ,VSBCIQ_M_U_carry ,VSBCIQ_M_S_carry ,VSBCQ_U_carry ,VSBCQ_S_carry + ,VSBCQ_M_U_carry ,VSBCQ_M_S_carry ,VADCIQ_U_carry + ,VADCIQ_M_U_carry ,VADCIQ_S_carry ,VADCIQ_M_S_carry): New unspec + codes. + +2025-10-15 Roger Sayle <roger@nextmovesoftware.com> + + PR rtl-optimization/122266 + * combine.cc (struct reg_stat_type): Change types of sign_bit_copies + and last_set_sign_bit_copies to unsigned short, to avoid overflows + on TImode (and wider) values. + +2025-10-15 Jan Hubicka <hubicka@ucw.cz> + + * auto-profile.cc (scale_bb_profile): Use + profile_count::max_prefer_initialized. + (afdo_adjust_guessed_profile): Likewise. + * bb-reorder.cc (edge_order): Do not use max. + * cfghooks.cc (merge_blocks): Likewise. + * ipa-fnsummary.cc (param_change_prob): Likewise. + * ipa-inline-transform.cc (inline_transform): Likewise. + * predict.cc (update_max_bb_count): Likewise. + (estimate_bb_frequencies): Likewise. + (rebuild_frequencies): Likewise. + * tree-ssa-loop-unswitch.cc (struct unswitch_predicate): Likewise. + * profile-count.h (profile_count::max): Rename to + (profile_count::max_prefer_initialized): this; update handling + of qualities. + +2025-10-15 Haochen Jiang <haochen.jiang@intel.com> + + * common/config/i386/cpuinfo.h + (get_intel_cpu): Handle Wildcat Lake. + * common/config/i386/i386-common.cc (processor_name): + Add Wildcat Lake. + * doc/invoke.texi: Ditto. + +2025-10-15 Haochen Jiang <haochen.jiang@intel.com> + + * config/i386/i386.h + (PTA_PANTHERLAKE): Remove PREFETCHI. + (PTA_DIAMONDRAPIDS): Remove USER_MSR. + * doc/invoke.texi: Correct documentation. + +2025-10-15 Pan Li <pan2.li@intel.com> + + * config/riscv/autovec-opt.md: Take concrete op instead + of any_widen_binop for vwaddu/vwsubu wx combine. + 2025-10-14 Richard Biener <rguenther@suse.de> * tree-vectorizer.h (REDUC_GROUP_FIRST_ELEMENT, diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP index 0535efa..8ca925d 100644 --- a/gcc/DATESTAMP +++ b/gcc/DATESTAMP @@ -1 +1 @@ -20251015 +20251016 diff --git a/gcc/auto-profile.cc b/gcc/auto-profile.cc index 6971204..cf7a219 100644 --- a/gcc/auto-profile.cc +++ b/gcc/auto-profile.cc @@ -3600,11 +3600,12 @@ scale_bb_profile () { profile_count cnt = bb->count; bbs.safe_push (bb); - max_count = max_count.max (bb->count); + max_count = profile_count::max_prefer_initialized (max_count, cnt); if (afdo_set_bb_count (bb, zero_bbs)) { std::swap (cnt, bb->count); - max_count_in_fn = max_count_in_fn.max (cnt); + max_count_in_fn + = profile_count::max_prefer_initialized (max_count_in_fn, cnt); add_scale (&scales, cnt, bb->count); } } @@ -3646,7 +3647,8 @@ afdo_adjust_guessed_profile (bb_set *annotated_bb) if (is_bb_annotated (seed_bb, *annotated_bb)) { component[seed_bb->index] = 1; - max_count_in_fn = max_count_in_fn.max (seed_bb->count); + max_count_in_fn + = profile_count::max_prefer_initialized (max_count_in_fn, seed_bb->count); } else component[seed_bb->index] = 0; @@ -3669,7 +3671,7 @@ afdo_adjust_guessed_profile (bb_set *annotated_bb) basic_block b = stack.pop (); bbs.quick_push (b); - max_count = max_count.max (b->count); + max_count = profile_count::max_prefer_initialized (max_count, b->count); for (edge e: b->preds) if (!component[e->src->index]) diff --git a/gcc/bb-reorder.cc b/gcc/bb-reorder.cc index 641b492..e4efdee 100644 --- a/gcc/bb-reorder.cc +++ b/gcc/bb-reorder.cc @@ -2389,8 +2389,10 @@ edge_order (const void *ve1, const void *ve2) /* Since profile_count::operator< does not establish a strict weak order in presence of uninitialized counts, use 'max': this makes them appear as if having execution frequency less than any initialized count. */ - profile_count m = c1.max (c2); - return (m == c2) - (m == c1); + gcov_type gc1 = c1.initialized_p () ? c1.to_gcov_type () : 0; + gcov_type gc2 = c2.initialized_p () ? c2.to_gcov_type () : 0; + gcov_type m = MAX (gc1, gc2); + return (m == gc1) - (m == gc2); } /* Reorder basic blocks using the "simple" algorithm. This tries to diff --git a/gcc/cfghooks.cc b/gcc/cfghooks.cc index 25bc5d4..01169e2 100644 --- a/gcc/cfghooks.cc +++ b/gcc/cfghooks.cc @@ -824,7 +824,7 @@ merge_blocks (basic_block a, basic_block b) else if (a->count.quality () < b->count.quality ()) a->count = b->count; else if (a->count.quality () == b->count.quality ()) - a->count = a->count.max (b->count); + a->count = profile_count::max_prefer_initialized (a->count, b->count); cfg_hooks->merge_blocks (a, b); diff --git a/gcc/combine.cc b/gcc/combine.cc index 4dbc1f6..6696322 100644 --- a/gcc/combine.cc +++ b/gcc/combine.cc @@ -195,7 +195,7 @@ struct reg_stat_type { sign bits copies it was known to have when it was last set. */ unsigned HOST_WIDE_INT last_set_nonzero_bits; - char last_set_sign_bit_copies; + unsigned short last_set_sign_bit_copies; ENUM_BITFIELD(machine_mode) last_set_mode : MACHINE_MODE_BITSIZE; /* Set to true if references to register n in expressions should not be @@ -216,7 +216,7 @@ struct reg_stat_type { If an entry is zero, it means that we don't know anything special. */ - unsigned char sign_bit_copies; + unsigned short sign_bit_copies; unsigned HOST_WIDE_INT nonzero_bits; diff --git a/gcc/common.opt b/gcc/common.opt index 6c993a8..9b8fbf6 100644 --- a/gcc/common.opt +++ b/gcc/common.opt @@ -3303,6 +3303,10 @@ ftree-parallelize-loops= Common Joined RejectNegative UInteger Var(flag_tree_parallelize_loops) Init(1) Optimization -ftree-parallelize-loops=<number> Enable automatic parallelization of loops. +ftree-parallelize-loops +Common Alias(ftree-parallelize-loops=,2147483647,1) +Enable automatic parallelization of loops. + ftree-phiprop Common Var(flag_tree_phiprop) Init(1) Optimization Enable hoisting loads from conditional pointers. diff --git a/gcc/common/config/i386/cpuinfo.h b/gcc/common/config/i386/cpuinfo.h index 4efa2c0..9c18c04 100644 --- a/gcc/common/config/i386/cpuinfo.h +++ b/gcc/common/config/i386/cpuinfo.h @@ -628,6 +628,8 @@ get_intel_cpu (struct __processor_model *cpu_model, break; case 0xcc: /* Panther Lake. */ + case 0xd5: + /* Wildcat Lake. */ cpu = "pantherlake"; CHECK___builtin_cpu_is ("corei7"); CHECK___builtin_cpu_is ("pantherlake"); diff --git a/gcc/common/config/i386/i386-common.cc b/gcc/common/config/i386/i386-common.cc index d3509e1..c71f2c1 100644 --- a/gcc/common/config/i386/i386-common.cc +++ b/gcc/common/config/i386/i386-common.cc @@ -2270,6 +2270,8 @@ const pta processor_alias_table[] = M_CPU_SUBTYPE (INTEL_COREI7_PANTHERLAKE), P_PROC_AVX2}, {"diamondrapids", PROCESSOR_DIAMONDRAPIDS, CPU_HASWELL, PTA_DIAMONDRAPIDS, M_CPU_SUBTYPE (INTEL_COREI7_DIAMONDRAPIDS), P_PROC_AVX10_1}, + {"wildcatlake", PROCESSOR_PANTHERLAKE, CPU_HASWELL, PTA_PANTHERLAKE, + M_CPU_SUBTYPE (INTEL_COREI7_PANTHERLAKE), P_PROC_AVX2}, {"bonnell", PROCESSOR_BONNELL, CPU_ATOM, PTA_BONNELL, M_CPU_TYPE (INTEL_BONNELL), P_PROC_SSSE3}, {"atom", PROCESSOR_BONNELL, CPU_ATOM, PTA_BONNELL, diff --git a/gcc/config/aarch64/aarch64-sys-regs.def b/gcc/config/aarch64/aarch64-sys-regs.def index d7ef6da..51aab23 100644 --- a/gcc/config/aarch64/aarch64-sys-regs.def +++ b/gcc/config/aarch64/aarch64-sys-regs.def @@ -36,1127 +36,1254 @@ The FEATURES field maps onto ISA flags and specifies the architectural feature requirements of the system register. */ - SYSREG ("accdata_el1", CPENC (3,0,13,0,5), 0, AARCH64_NO_FEATURES) - SYSREG ("actlr_el1", CPENC (3,0,1,0,1), 0, AARCH64_NO_FEATURES) - SYSREG ("actlr_el2", CPENC (3,4,1,0,1), 0, AARCH64_NO_FEATURES) - SYSREG ("actlr_el3", CPENC (3,6,1,0,1), 0, AARCH64_NO_FEATURES) - SYSREG ("afsr0_el1", CPENC (3,0,5,1,0), 0, AARCH64_NO_FEATURES) - SYSREG ("afsr0_el12", CPENC (3,5,5,1,0), F_ARCHEXT, AARCH64_FEATURE (V8_1A)) - SYSREG ("afsr0_el2", CPENC (3,4,5,1,0), 0, AARCH64_NO_FEATURES) - SYSREG ("afsr0_el3", CPENC (3,6,5,1,0), 0, AARCH64_NO_FEATURES) - SYSREG ("afsr1_el1", CPENC (3,0,5,1,1), 0, AARCH64_NO_FEATURES) - SYSREG ("afsr1_el12", CPENC (3,5,5,1,1), F_ARCHEXT, AARCH64_FEATURE (V8_1A)) - SYSREG ("afsr1_el2", CPENC (3,4,5,1,1), 0, AARCH64_NO_FEATURES) - SYSREG ("afsr1_el3", CPENC (3,6,5,1,1), 0, AARCH64_NO_FEATURES) - SYSREG ("aidr_el1", CPENC (3,1,0,0,7), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("allint", CPENC (3,0,4,3,0), F_ARCHEXT, AARCH64_FEATURE (V8_8A)) - SYSREG ("amair_el1", CPENC (3,0,10,3,0), 0, AARCH64_NO_FEATURES) - SYSREG ("amair_el12", CPENC (3,5,10,3,0), F_ARCHEXT, AARCH64_FEATURE (V8_1A)) - SYSREG ("amair_el2", CPENC (3,4,10,3,0), 0, AARCH64_NO_FEATURES) - SYSREG ("amair_el3", CPENC (3,6,10,3,0), 0, AARCH64_NO_FEATURES) - SYSREG ("amair2_el1", CPENC (3,0,10,3,1), F_ARCHEXT, AARCH64_FEATURE (AIE)) - SYSREG ("amair2_el12", CPENC (3,5,10,3,1), F_ARCHEXT, AARCH64_FEATURE (AIE)) - SYSREG ("amair2_el2", CPENC (3,4,10,3,1), F_ARCHEXT, AARCH64_FEATURE (AIE)) - SYSREG ("amair2_el3", CPENC (3,6,10,3,1), F_ARCHEXT, AARCH64_FEATURE (AIE)) - SYSREG ("amcfgr_el0", CPENC (3,3,13,2,1), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (V8_4A)) - SYSREG ("amcg1idr_el0", CPENC (3,3,13,2,6), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (V8_6A)) - SYSREG ("amcgcr_el0", CPENC (3,3,13,2,2), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (V8_4A)) - SYSREG ("amcntenclr0_el0", CPENC (3,3,13,2,4), F_ARCHEXT, AARCH64_FEATURE (V8_4A)) - SYSREG ("amcntenclr1_el0", CPENC (3,3,13,3,0), F_ARCHEXT, AARCH64_FEATURE (V8_4A)) - SYSREG ("amcntenset0_el0", CPENC (3,3,13,2,5), F_ARCHEXT, AARCH64_FEATURE (V8_4A)) - SYSREG ("amcntenset1_el0", CPENC (3,3,13,3,1), F_ARCHEXT, AARCH64_FEATURE (V8_4A)) - SYSREG ("amcr_el0", CPENC (3,3,13,2,0), F_ARCHEXT, AARCH64_FEATURE (V8_4A)) - SYSREG ("amevcntr00_el0", CPENC (3,3,13,4,0), F_ARCHEXT, AARCH64_FEATURE (V8_4A)) - SYSREG ("amevcntr01_el0", CPENC (3,3,13,4,1), F_ARCHEXT, AARCH64_FEATURE (V8_4A)) - SYSREG ("amevcntr02_el0", CPENC (3,3,13,4,2), F_ARCHEXT, AARCH64_FEATURE (V8_4A)) - SYSREG ("amevcntr03_el0", CPENC (3,3,13,4,3), F_ARCHEXT, AARCH64_FEATURE (V8_4A)) - SYSREG ("amevcntr10_el0", CPENC (3,3,13,12,0), F_ARCHEXT, AARCH64_FEATURE (V8_4A)) - SYSREG ("amevcntr110_el0", CPENC (3,3,13,13,2), F_ARCHEXT, AARCH64_FEATURE (V8_4A)) - SYSREG ("amevcntr111_el0", CPENC (3,3,13,13,3), F_ARCHEXT, AARCH64_FEATURE (V8_4A)) - SYSREG ("amevcntr112_el0", CPENC (3,3,13,13,4), F_ARCHEXT, AARCH64_FEATURE (V8_4A)) - SYSREG ("amevcntr113_el0", CPENC (3,3,13,13,5), F_ARCHEXT, AARCH64_FEATURE (V8_4A)) - SYSREG ("amevcntr114_el0", CPENC (3,3,13,13,6), F_ARCHEXT, AARCH64_FEATURE (V8_4A)) - SYSREG ("amevcntr115_el0", CPENC (3,3,13,13,7), F_ARCHEXT, AARCH64_FEATURE (V8_4A)) - SYSREG ("amevcntr11_el0", CPENC (3,3,13,12,1), F_ARCHEXT, AARCH64_FEATURE (V8_4A)) - SYSREG ("amevcntr12_el0", CPENC (3,3,13,12,2), F_ARCHEXT, AARCH64_FEATURE (V8_4A)) - SYSREG ("amevcntr13_el0", CPENC (3,3,13,12,3), F_ARCHEXT, AARCH64_FEATURE (V8_4A)) - SYSREG ("amevcntr14_el0", CPENC (3,3,13,12,4), F_ARCHEXT, AARCH64_FEATURE (V8_4A)) - SYSREG ("amevcntr15_el0", CPENC (3,3,13,12,5), F_ARCHEXT, AARCH64_FEATURE (V8_4A)) - SYSREG ("amevcntr16_el0", CPENC (3,3,13,12,6), F_ARCHEXT, AARCH64_FEATURE (V8_4A)) - SYSREG ("amevcntr17_el0", CPENC (3,3,13,12,7), F_ARCHEXT, AARCH64_FEATURE (V8_4A)) - SYSREG ("amevcntr18_el0", CPENC (3,3,13,13,0), F_ARCHEXT, AARCH64_FEATURE (V8_4A)) - SYSREG ("amevcntr19_el0", CPENC (3,3,13,13,1), F_ARCHEXT, AARCH64_FEATURE (V8_4A)) - SYSREG ("amevcntvoff00_el2", CPENC (3,4,13,8,0), F_ARCHEXT, AARCH64_FEATURE (V8_6A)) - SYSREG ("amevcntvoff010_el2", CPENC (3,4,13,9,2), F_ARCHEXT, AARCH64_FEATURE (V8_6A)) - SYSREG ("amevcntvoff011_el2", CPENC (3,4,13,9,3), F_ARCHEXT, AARCH64_FEATURE (V8_6A)) - SYSREG ("amevcntvoff012_el2", CPENC (3,4,13,9,4), F_ARCHEXT, AARCH64_FEATURE (V8_6A)) - SYSREG ("amevcntvoff013_el2", CPENC (3,4,13,9,5), F_ARCHEXT, AARCH64_FEATURE (V8_6A)) - SYSREG ("amevcntvoff014_el2", CPENC (3,4,13,9,6), F_ARCHEXT, AARCH64_FEATURE (V8_6A)) - SYSREG ("amevcntvoff015_el2", CPENC (3,4,13,9,7), F_ARCHEXT, AARCH64_FEATURE (V8_6A)) - SYSREG ("amevcntvoff01_el2", CPENC (3,4,13,8,1), F_ARCHEXT, AARCH64_FEATURE (V8_6A)) - SYSREG ("amevcntvoff02_el2", CPENC (3,4,13,8,2), F_ARCHEXT, AARCH64_FEATURE (V8_6A)) - SYSREG ("amevcntvoff03_el2", CPENC (3,4,13,8,3), F_ARCHEXT, AARCH64_FEATURE (V8_6A)) - SYSREG ("amevcntvoff04_el2", CPENC (3,4,13,8,4), F_ARCHEXT, AARCH64_FEATURE (V8_6A)) - SYSREG ("amevcntvoff05_el2", CPENC (3,4,13,8,5), F_ARCHEXT, AARCH64_FEATURE (V8_6A)) - SYSREG ("amevcntvoff06_el2", CPENC (3,4,13,8,6), F_ARCHEXT, AARCH64_FEATURE (V8_6A)) - SYSREG ("amevcntvoff07_el2", CPENC (3,4,13,8,7), F_ARCHEXT, AARCH64_FEATURE (V8_6A)) - SYSREG ("amevcntvoff08_el2", CPENC (3,4,13,9,0), F_ARCHEXT, AARCH64_FEATURE (V8_6A)) - SYSREG ("amevcntvoff09_el2", CPENC (3,4,13,9,1), F_ARCHEXT, AARCH64_FEATURE (V8_6A)) - SYSREG ("amevcntvoff10_el2", CPENC (3,4,13,10,0), F_ARCHEXT, AARCH64_FEATURE (V8_6A)) - SYSREG ("amevcntvoff110_el2", CPENC (3,4,13,11,2), F_ARCHEXT, AARCH64_FEATURE (V8_6A)) - SYSREG ("amevcntvoff111_el2", CPENC (3,4,13,11,3), F_ARCHEXT, AARCH64_FEATURE (V8_6A)) - SYSREG ("amevcntvoff112_el2", CPENC (3,4,13,11,4), F_ARCHEXT, AARCH64_FEATURE (V8_6A)) - SYSREG ("amevcntvoff113_el2", CPENC (3,4,13,11,5), F_ARCHEXT, AARCH64_FEATURE (V8_6A)) - SYSREG ("amevcntvoff114_el2", CPENC (3,4,13,11,6), F_ARCHEXT, AARCH64_FEATURE (V8_6A)) - SYSREG ("amevcntvoff115_el2", CPENC (3,4,13,11,7), F_ARCHEXT, AARCH64_FEATURE (V8_6A)) - SYSREG ("amevcntvoff11_el2", CPENC (3,4,13,10,1), F_ARCHEXT, AARCH64_FEATURE (V8_6A)) - SYSREG ("amevcntvoff12_el2", CPENC (3,4,13,10,2), F_ARCHEXT, AARCH64_FEATURE (V8_6A)) - SYSREG ("amevcntvoff13_el2", CPENC (3,4,13,10,3), F_ARCHEXT, AARCH64_FEATURE (V8_6A)) - SYSREG ("amevcntvoff14_el2", CPENC (3,4,13,10,4), F_ARCHEXT, AARCH64_FEATURE (V8_6A)) - SYSREG ("amevcntvoff15_el2", CPENC (3,4,13,10,5), F_ARCHEXT, AARCH64_FEATURE (V8_6A)) - SYSREG ("amevcntvoff16_el2", CPENC (3,4,13,10,6), F_ARCHEXT, AARCH64_FEATURE (V8_6A)) - SYSREG ("amevcntvoff17_el2", CPENC (3,4,13,10,7), F_ARCHEXT, AARCH64_FEATURE (V8_6A)) - SYSREG ("amevcntvoff18_el2", CPENC (3,4,13,11,0), F_ARCHEXT, AARCH64_FEATURE (V8_6A)) - SYSREG ("amevcntvoff19_el2", CPENC (3,4,13,11,1), F_ARCHEXT, AARCH64_FEATURE (V8_6A)) - SYSREG ("amevtyper00_el0", CPENC (3,3,13,6,0), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (V8_4A)) - SYSREG ("amevtyper01_el0", CPENC (3,3,13,6,1), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (V8_4A)) - SYSREG ("amevtyper02_el0", CPENC (3,3,13,6,2), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (V8_4A)) - SYSREG ("amevtyper03_el0", CPENC (3,3,13,6,3), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (V8_4A)) - SYSREG ("amevtyper10_el0", CPENC (3,3,13,14,0), F_ARCHEXT, AARCH64_FEATURE (V8_4A)) - SYSREG ("amevtyper110_el0", CPENC (3,3,13,15,2), F_ARCHEXT, AARCH64_FEATURE (V8_4A)) - SYSREG ("amevtyper111_el0", CPENC (3,3,13,15,3), F_ARCHEXT, AARCH64_FEATURE (V8_4A)) - SYSREG ("amevtyper112_el0", CPENC (3,3,13,15,4), F_ARCHEXT, AARCH64_FEATURE (V8_4A)) - SYSREG ("amevtyper113_el0", CPENC (3,3,13,15,5), F_ARCHEXT, AARCH64_FEATURE (V8_4A)) - SYSREG ("amevtyper114_el0", CPENC (3,3,13,15,6), F_ARCHEXT, AARCH64_FEATURE (V8_4A)) - SYSREG ("amevtyper115_el0", CPENC (3,3,13,15,7), F_ARCHEXT, AARCH64_FEATURE (V8_4A)) - SYSREG ("amevtyper11_el0", CPENC (3,3,13,14,1), F_ARCHEXT, AARCH64_FEATURE (V8_4A)) - SYSREG ("amevtyper12_el0", CPENC (3,3,13,14,2), F_ARCHEXT, AARCH64_FEATURE (V8_4A)) - SYSREG ("amevtyper13_el0", CPENC (3,3,13,14,3), F_ARCHEXT, AARCH64_FEATURE (V8_4A)) - SYSREG ("amevtyper14_el0", CPENC (3,3,13,14,4), F_ARCHEXT, AARCH64_FEATURE (V8_4A)) - SYSREG ("amevtyper15_el0", CPENC (3,3,13,14,5), F_ARCHEXT, AARCH64_FEATURE (V8_4A)) - SYSREG ("amevtyper16_el0", CPENC (3,3,13,14,6), F_ARCHEXT, AARCH64_FEATURE (V8_4A)) - SYSREG ("amevtyper17_el0", CPENC (3,3,13,14,7), F_ARCHEXT, AARCH64_FEATURE (V8_4A)) - SYSREG ("amevtyper18_el0", CPENC (3,3,13,15,0), F_ARCHEXT, AARCH64_FEATURE (V8_4A)) - SYSREG ("amevtyper19_el0", CPENC (3,3,13,15,1), F_ARCHEXT, AARCH64_FEATURE (V8_4A)) - SYSREG ("amuserenr_el0", CPENC (3,3,13,2,3), F_ARCHEXT, AARCH64_FEATURE (V8_4A)) - SYSREG ("apdakeyhi_el1", CPENC (3,0,2,2,1), F_ARCHEXT, AARCH64_FEATURE (V8_3A)) - SYSREG ("apdakeylo_el1", CPENC (3,0,2,2,0), F_ARCHEXT, AARCH64_FEATURE (V8_3A)) - SYSREG ("apdbkeyhi_el1", CPENC (3,0,2,2,3), F_ARCHEXT, AARCH64_FEATURE (V8_3A)) - SYSREG ("apdbkeylo_el1", CPENC (3,0,2,2,2), F_ARCHEXT, AARCH64_FEATURE (V8_3A)) - SYSREG ("apgakeyhi_el1", CPENC (3,0,2,3,1), F_ARCHEXT, AARCH64_FEATURE (V8_3A)) - SYSREG ("apgakeylo_el1", CPENC (3,0,2,3,0), F_ARCHEXT, AARCH64_FEATURE (V8_3A)) - SYSREG ("apiakeyhi_el1", CPENC (3,0,2,1,1), F_ARCHEXT, AARCH64_FEATURE (V8_3A)) - SYSREG ("apiakeylo_el1", CPENC (3,0,2,1,0), F_ARCHEXT, AARCH64_FEATURE (V8_3A)) - SYSREG ("apibkeyhi_el1", CPENC (3,0,2,1,3), F_ARCHEXT, AARCH64_FEATURE (V8_3A)) - SYSREG ("apibkeylo_el1", CPENC (3,0,2,1,2), F_ARCHEXT, AARCH64_FEATURE (V8_3A)) - SYSREG ("brbcr_el1", CPENC (2,1,9,0,0), 0, AARCH64_NO_FEATURES) - SYSREG ("brbcr_el12", CPENC (2,5,9,0,0), 0, AARCH64_NO_FEATURES) - SYSREG ("brbcr_el2", CPENC (2,4,9,0,0), 0, AARCH64_NO_FEATURES) - SYSREG ("brbfcr_el1", CPENC (2,1,9,0,1), 0, AARCH64_NO_FEATURES) - SYSREG ("brbidr0_el1", CPENC (2,1,9,2,0), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbinf0_el1", CPENC (2,1,8,0,0), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbinf10_el1", CPENC (2,1,8,10,0), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbinf11_el1", CPENC (2,1,8,11,0), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbinf12_el1", CPENC (2,1,8,12,0), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbinf13_el1", CPENC (2,1,8,13,0), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbinf14_el1", CPENC (2,1,8,14,0), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbinf15_el1", CPENC (2,1,8,15,0), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbinf16_el1", CPENC (2,1,8,0,4), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbinf17_el1", CPENC (2,1,8,1,4), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbinf18_el1", CPENC (2,1,8,2,4), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbinf19_el1", CPENC (2,1,8,3,4), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbinf1_el1", CPENC (2,1,8,1,0), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbinf20_el1", CPENC (2,1,8,4,4), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbinf21_el1", CPENC (2,1,8,5,4), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbinf22_el1", CPENC (2,1,8,6,4), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbinf23_el1", CPENC (2,1,8,7,4), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbinf24_el1", CPENC (2,1,8,8,4), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbinf25_el1", CPENC (2,1,8,9,4), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbinf26_el1", CPENC (2,1,8,10,4), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbinf27_el1", CPENC (2,1,8,11,4), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbinf28_el1", CPENC (2,1,8,12,4), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbinf29_el1", CPENC (2,1,8,13,4), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbinf2_el1", CPENC (2,1,8,2,0), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbinf30_el1", CPENC (2,1,8,14,4), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbinf31_el1", CPENC (2,1,8,15,4), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbinf3_el1", CPENC (2,1,8,3,0), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbinf4_el1", CPENC (2,1,8,4,0), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbinf5_el1", CPENC (2,1,8,5,0), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbinf6_el1", CPENC (2,1,8,6,0), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbinf7_el1", CPENC (2,1,8,7,0), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbinf8_el1", CPENC (2,1,8,8,0), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbinf9_el1", CPENC (2,1,8,9,0), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbinfinj_el1", CPENC (2,1,9,1,0), 0, AARCH64_NO_FEATURES) - SYSREG ("brbsrc0_el1", CPENC (2,1,8,0,1), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbsrc10_el1", CPENC (2,1,8,10,1), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbsrc11_el1", CPENC (2,1,8,11,1), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbsrc12_el1", CPENC (2,1,8,12,1), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbsrc13_el1", CPENC (2,1,8,13,1), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbsrc14_el1", CPENC (2,1,8,14,1), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbsrc15_el1", CPENC (2,1,8,15,1), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbsrc16_el1", CPENC (2,1,8,0,5), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbsrc17_el1", CPENC (2,1,8,1,5), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbsrc18_el1", CPENC (2,1,8,2,5), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbsrc19_el1", CPENC (2,1,8,3,5), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbsrc1_el1", CPENC (2,1,8,1,1), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbsrc20_el1", CPENC (2,1,8,4,5), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbsrc21_el1", CPENC (2,1,8,5,5), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbsrc22_el1", CPENC (2,1,8,6,5), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbsrc23_el1", CPENC (2,1,8,7,5), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbsrc24_el1", CPENC (2,1,8,8,5), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbsrc25_el1", CPENC (2,1,8,9,5), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbsrc26_el1", CPENC (2,1,8,10,5), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbsrc27_el1", CPENC (2,1,8,11,5), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbsrc28_el1", CPENC (2,1,8,12,5), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbsrc29_el1", CPENC (2,1,8,13,5), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbsrc2_el1", CPENC (2,1,8,2,1), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbsrc30_el1", CPENC (2,1,8,14,5), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbsrc31_el1", CPENC (2,1,8,15,5), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbsrc3_el1", CPENC (2,1,8,3,1), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbsrc4_el1", CPENC (2,1,8,4,1), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbsrc5_el1", CPENC (2,1,8,5,1), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbsrc6_el1", CPENC (2,1,8,6,1), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbsrc7_el1", CPENC (2,1,8,7,1), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbsrc8_el1", CPENC (2,1,8,8,1), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbsrc9_el1", CPENC (2,1,8,9,1), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbsrcinj_el1", CPENC (2,1,9,1,1), 0, AARCH64_NO_FEATURES) - SYSREG ("brbtgt0_el1", CPENC (2,1,8,0,2), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbtgt10_el1", CPENC (2,1,8,10,2), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbtgt11_el1", CPENC (2,1,8,11,2), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbtgt12_el1", CPENC (2,1,8,12,2), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbtgt13_el1", CPENC (2,1,8,13,2), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbtgt14_el1", CPENC (2,1,8,14,2), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbtgt15_el1", CPENC (2,1,8,15,2), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbtgt16_el1", CPENC (2,1,8,0,6), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbtgt17_el1", CPENC (2,1,8,1,6), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbtgt18_el1", CPENC (2,1,8,2,6), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbtgt19_el1", CPENC (2,1,8,3,6), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbtgt1_el1", CPENC (2,1,8,1,2), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbtgt20_el1", CPENC (2,1,8,4,6), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbtgt21_el1", CPENC (2,1,8,5,6), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbtgt22_el1", CPENC (2,1,8,6,6), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbtgt23_el1", CPENC (2,1,8,7,6), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbtgt24_el1", CPENC (2,1,8,8,6), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbtgt25_el1", CPENC (2,1,8,9,6), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbtgt26_el1", CPENC (2,1,8,10,6), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbtgt27_el1", CPENC (2,1,8,11,6), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbtgt28_el1", CPENC (2,1,8,12,6), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbtgt29_el1", CPENC (2,1,8,13,6), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbtgt2_el1", CPENC (2,1,8,2,2), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbtgt30_el1", CPENC (2,1,8,14,6), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbtgt31_el1", CPENC (2,1,8,15,6), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbtgt3_el1", CPENC (2,1,8,3,2), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbtgt4_el1", CPENC (2,1,8,4,2), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbtgt5_el1", CPENC (2,1,8,5,2), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbtgt6_el1", CPENC (2,1,8,6,2), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbtgt7_el1", CPENC (2,1,8,7,2), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbtgt8_el1", CPENC (2,1,8,8,2), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbtgt9_el1", CPENC (2,1,8,9,2), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("brbtgtinj_el1", CPENC (2,1,9,1,2), 0, AARCH64_NO_FEATURES) - SYSREG ("brbts_el1", CPENC (2,1,9,0,2), 0, AARCH64_NO_FEATURES) - SYSREG ("ccsidr2_el1", CPENC (3,1,0,0,2), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (V8_3A)) - SYSREG ("ccsidr_el1", CPENC (3,1,0,0,0), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("clidr_el1", CPENC (3,1,0,0,1), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("cntfrq_el0", CPENC (3,3,14,0,0), 0, AARCH64_NO_FEATURES) - SYSREG ("cnthctl_el2", CPENC (3,4,14,1,0), 0, AARCH64_NO_FEATURES) - SYSREG ("cnthp_ctl_el2", CPENC (3,4,14,2,1), 0, AARCH64_NO_FEATURES) - SYSREG ("cnthp_cval_el2", CPENC (3,4,14,2,2), 0, AARCH64_NO_FEATURES) - SYSREG ("cnthp_tval_el2", CPENC (3,4,14,2,0), 0, AARCH64_NO_FEATURES) - SYSREG ("cnthps_ctl_el2", CPENC (3,4,14,5,1), F_ARCHEXT, AARCH64_FEATURE (V8_4A)) - SYSREG ("cnthps_cval_el2", CPENC (3,4,14,5,2), F_ARCHEXT, AARCH64_FEATURE (V8_4A)) - SYSREG ("cnthps_tval_el2", CPENC (3,4,14,5,0), F_ARCHEXT, AARCH64_FEATURE (V8_4A)) - SYSREG ("cnthv_ctl_el2", CPENC (3,4,14,3,1), F_ARCHEXT, AARCH64_FEATURE (V8_1A)) - SYSREG ("cnthv_cval_el2", CPENC (3,4,14,3,2), F_ARCHEXT, AARCH64_FEATURE (V8_1A)) - SYSREG ("cnthv_tval_el2", CPENC (3,4,14,3,0), F_ARCHEXT, AARCH64_FEATURE (V8_1A)) - SYSREG ("cnthvs_ctl_el2", CPENC (3,4,14,4,1), F_ARCHEXT, AARCH64_FEATURE (V8_4A)) - SYSREG ("cnthvs_cval_el2", CPENC (3,4,14,4,2), F_ARCHEXT, AARCH64_FEATURE (V8_4A)) - SYSREG ("cnthvs_tval_el2", CPENC (3,4,14,4,0), F_ARCHEXT, AARCH64_FEATURE (V8_4A)) - SYSREG ("cntkctl_el1", CPENC (3,0,14,1,0), 0, AARCH64_NO_FEATURES) - SYSREG ("cntkctl_el12", CPENC (3,5,14,1,0), F_ARCHEXT, AARCH64_FEATURE (V8_1A)) - SYSREG ("cntp_ctl_el0", CPENC (3,3,14,2,1), 0, AARCH64_NO_FEATURES) - SYSREG ("cntp_ctl_el02", CPENC (3,5,14,2,1), F_ARCHEXT, AARCH64_FEATURE (V8_1A)) - SYSREG ("cntp_cval_el0", CPENC (3,3,14,2,2), 0, AARCH64_NO_FEATURES) - SYSREG ("cntp_cval_el02", CPENC (3,5,14,2,2), F_ARCHEXT, AARCH64_FEATURE (V8_1A)) - SYSREG ("cntp_tval_el0", CPENC (3,3,14,2,0), 0, AARCH64_NO_FEATURES) - SYSREG ("cntp_tval_el02", CPENC (3,5,14,2,0), F_ARCHEXT, AARCH64_FEATURE (V8_1A)) - SYSREG ("cntpct_el0", CPENC (3,3,14,0,1), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("cntpctss_el0", CPENC (3,3,14,0,5), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (V8_6A)) - SYSREG ("cntpoff_el2", CPENC (3,4,14,0,6), F_ARCHEXT, AARCH64_FEATURE (V8_6A)) - SYSREG ("cntps_ctl_el1", CPENC (3,7,14,2,1), 0, AARCH64_NO_FEATURES) - SYSREG ("cntps_cval_el1", CPENC (3,7,14,2,2), 0, AARCH64_NO_FEATURES) - SYSREG ("cntps_tval_el1", CPENC (3,7,14,2,0), 0, AARCH64_NO_FEATURES) - SYSREG ("cntv_ctl_el0", CPENC (3,3,14,3,1), 0, AARCH64_NO_FEATURES) - SYSREG ("cntv_ctl_el02", CPENC (3,5,14,3,1), F_ARCHEXT, AARCH64_FEATURE (V8_1A)) - SYSREG ("cntv_cval_el0", CPENC (3,3,14,3,2), 0, AARCH64_NO_FEATURES) - SYSREG ("cntv_cval_el02", CPENC (3,5,14,3,2), F_ARCHEXT, AARCH64_FEATURE (V8_1A)) - SYSREG ("cntv_tval_el0", CPENC (3,3,14,3,0), 0, AARCH64_NO_FEATURES) - SYSREG ("cntv_tval_el02", CPENC (3,5,14,3,0), F_ARCHEXT, AARCH64_FEATURE (V8_1A)) - SYSREG ("cntvct_el0", CPENC (3,3,14,0,2), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("cntvctss_el0", CPENC (3,3,14,0,6), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (V8_6A)) - SYSREG ("cntvoff_el2", CPENC (3,4,14,0,3), 0, AARCH64_NO_FEATURES) - SYSREG ("contextidr_el1", CPENC (3,0,13,0,1), 0, AARCH64_NO_FEATURES) - SYSREG ("contextidr_el12", CPENC (3,5,13,0,1), F_ARCHEXT, AARCH64_FEATURE (V8_1A)) - SYSREG ("contextidr_el2", CPENC (3,4,13,0,1), F_ARCHEXT, AARCH64_FEATURE (V8_1A)) - SYSREG ("cpacr_el1", CPENC (3,0,1,0,2), 0, AARCH64_NO_FEATURES) - SYSREG ("cpacr_el12", CPENC (3,5,1,0,2), F_ARCHEXT, AARCH64_FEATURE (V8_1A)) - SYSREG ("cptr_el2", CPENC (3,4,1,1,2), 0, AARCH64_NO_FEATURES) - SYSREG ("cptr_el3", CPENC (3,6,1,1,2), 0, AARCH64_NO_FEATURES) - SYSREG ("csrcr_el0", CPENC (2,3,8,0,0), 0, AARCH64_NO_FEATURES) - SYSREG ("csrcr_el1", CPENC (2,0,8,0,0), 0, AARCH64_NO_FEATURES) - SYSREG ("csrcr_el12", CPENC (2,5,8,0,0), 0, AARCH64_NO_FEATURES) - SYSREG ("csrcr_el2", CPENC (2,4,8,0,0), 0, AARCH64_NO_FEATURES) - SYSREG ("csridr_el0", CPENC (2,3,8,0,2), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("csrptr_el0", CPENC (2,3,8,0,1), 0, AARCH64_NO_FEATURES) - SYSREG ("csrptr_el1", CPENC (2,0,8,0,1), 0, AARCH64_NO_FEATURES) - SYSREG ("csrptr_el12", CPENC (2,5,8,0,1), 0, AARCH64_NO_FEATURES) - SYSREG ("csrptr_el2", CPENC (2,4,8,0,1), 0, AARCH64_NO_FEATURES) - SYSREG ("csrptridx_el0", CPENC (2,3,8,0,3), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("csrptridx_el1", CPENC (2,0,8,0,3), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("csrptridx_el2", CPENC (2,4,8,0,3), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("csselr_el1", CPENC (3,2,0,0,0), 0, AARCH64_NO_FEATURES) - SYSREG ("ctr_el0", CPENC (3,3,0,0,1), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("currentel", CPENC (3,0,4,2,2), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("dacr32_el2", CPENC (3,4,3,0,0), 0, AARCH64_NO_FEATURES) - SYSREG ("daif", CPENC (3,3,4,2,1), 0, AARCH64_NO_FEATURES) - SYSREG ("dbgauthstatus_el1", CPENC (2,0,7,14,6), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("dbgbcr0_el1", CPENC (2,0,0,0,5), 0, AARCH64_NO_FEATURES) - SYSREG ("dbgbcr10_el1", CPENC (2,0,0,10,5), 0, AARCH64_NO_FEATURES) - SYSREG ("dbgbcr11_el1", CPENC (2,0,0,11,5), 0, AARCH64_NO_FEATURES) - SYSREG ("dbgbcr12_el1", CPENC (2,0,0,12,5), 0, AARCH64_NO_FEATURES) - SYSREG ("dbgbcr13_el1", CPENC (2,0,0,13,5), 0, AARCH64_NO_FEATURES) - SYSREG ("dbgbcr14_el1", CPENC (2,0,0,14,5), 0, AARCH64_NO_FEATURES) - SYSREG ("dbgbcr15_el1", CPENC (2,0,0,15,5), 0, AARCH64_NO_FEATURES) - SYSREG ("dbgbcr1_el1", CPENC (2,0,0,1,5), 0, AARCH64_NO_FEATURES) - SYSREG ("dbgbcr2_el1", CPENC (2,0,0,2,5), 0, AARCH64_NO_FEATURES) - SYSREG ("dbgbcr3_el1", CPENC (2,0,0,3,5), 0, AARCH64_NO_FEATURES) - SYSREG ("dbgbcr4_el1", CPENC (2,0,0,4,5), 0, AARCH64_NO_FEATURES) - SYSREG ("dbgbcr5_el1", CPENC (2,0,0,5,5), 0, AARCH64_NO_FEATURES) - SYSREG ("dbgbcr6_el1", CPENC (2,0,0,6,5), 0, AARCH64_NO_FEATURES) - SYSREG ("dbgbcr7_el1", CPENC (2,0,0,7,5), 0, AARCH64_NO_FEATURES) - SYSREG ("dbgbcr8_el1", CPENC (2,0,0,8,5), 0, AARCH64_NO_FEATURES) - SYSREG ("dbgbcr9_el1", CPENC (2,0,0,9,5), 0, AARCH64_NO_FEATURES) - SYSREG ("dbgbvr0_el1", CPENC (2,0,0,0,4), 0, AARCH64_NO_FEATURES) - SYSREG ("dbgbvr10_el1", CPENC (2,0,0,10,4), 0, AARCH64_NO_FEATURES) - SYSREG ("dbgbvr11_el1", CPENC (2,0,0,11,4), 0, AARCH64_NO_FEATURES) - SYSREG ("dbgbvr12_el1", CPENC (2,0,0,12,4), 0, AARCH64_NO_FEATURES) - SYSREG ("dbgbvr13_el1", CPENC (2,0,0,13,4), 0, AARCH64_NO_FEATURES) - SYSREG ("dbgbvr14_el1", CPENC (2,0,0,14,4), 0, AARCH64_NO_FEATURES) - SYSREG ("dbgbvr15_el1", CPENC (2,0,0,15,4), 0, AARCH64_NO_FEATURES) - SYSREG ("dbgbvr1_el1", CPENC (2,0,0,1,4), 0, AARCH64_NO_FEATURES) - SYSREG ("dbgbvr2_el1", CPENC (2,0,0,2,4), 0, AARCH64_NO_FEATURES) - SYSREG ("dbgbvr3_el1", CPENC (2,0,0,3,4), 0, AARCH64_NO_FEATURES) - SYSREG ("dbgbvr4_el1", CPENC (2,0,0,4,4), 0, AARCH64_NO_FEATURES) - SYSREG ("dbgbvr5_el1", CPENC (2,0,0,5,4), 0, AARCH64_NO_FEATURES) - SYSREG ("dbgbvr6_el1", CPENC (2,0,0,6,4), 0, AARCH64_NO_FEATURES) - SYSREG ("dbgbvr7_el1", CPENC (2,0,0,7,4), 0, AARCH64_NO_FEATURES) - SYSREG ("dbgbvr8_el1", CPENC (2,0,0,8,4), 0, AARCH64_NO_FEATURES) - SYSREG ("dbgbvr9_el1", CPENC (2,0,0,9,4), 0, AARCH64_NO_FEATURES) - SYSREG ("dbgclaimclr_el1", CPENC (2,0,7,9,6), 0, AARCH64_NO_FEATURES) - SYSREG ("dbgclaimset_el1", CPENC (2,0,7,8,6), 0, AARCH64_NO_FEATURES) - SYSREG ("dbgdtr_el0", CPENC (2,3,0,4,0), 0, AARCH64_NO_FEATURES) - SYSREG ("dbgdtrrx_el0", CPENC (2,3,0,5,0), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("dbgdtrtx_el0", CPENC (2,3,0,5,0), F_REG_WRITE, AARCH64_NO_FEATURES) - SYSREG ("dbgprcr_el1", CPENC (2,0,1,4,4), 0, AARCH64_NO_FEATURES) - SYSREG ("dbgvcr32_el2", CPENC (2,4,0,7,0), 0, AARCH64_NO_FEATURES) - SYSREG ("dbgwcr0_el1", CPENC (2,0,0,0,7), 0, AARCH64_NO_FEATURES) - SYSREG ("dbgwcr10_el1", CPENC (2,0,0,10,7), 0, AARCH64_NO_FEATURES) - SYSREG ("dbgwcr11_el1", CPENC (2,0,0,11,7), 0, AARCH64_NO_FEATURES) - SYSREG ("dbgwcr12_el1", CPENC (2,0,0,12,7), 0, AARCH64_NO_FEATURES) - SYSREG ("dbgwcr13_el1", CPENC (2,0,0,13,7), 0, AARCH64_NO_FEATURES) - SYSREG ("dbgwcr14_el1", CPENC (2,0,0,14,7), 0, AARCH64_NO_FEATURES) - SYSREG ("dbgwcr15_el1", CPENC (2,0,0,15,7), 0, AARCH64_NO_FEATURES) - SYSREG ("dbgwcr1_el1", CPENC (2,0,0,1,7), 0, AARCH64_NO_FEATURES) - SYSREG ("dbgwcr2_el1", CPENC (2,0,0,2,7), 0, AARCH64_NO_FEATURES) - SYSREG ("dbgwcr3_el1", CPENC (2,0,0,3,7), 0, AARCH64_NO_FEATURES) - SYSREG ("dbgwcr4_el1", CPENC (2,0,0,4,7), 0, AARCH64_NO_FEATURES) - SYSREG ("dbgwcr5_el1", CPENC (2,0,0,5,7), 0, AARCH64_NO_FEATURES) - SYSREG ("dbgwcr6_el1", CPENC (2,0,0,6,7), 0, AARCH64_NO_FEATURES) - SYSREG ("dbgwcr7_el1", CPENC (2,0,0,7,7), 0, AARCH64_NO_FEATURES) - SYSREG ("dbgwcr8_el1", CPENC (2,0,0,8,7), 0, AARCH64_NO_FEATURES) - SYSREG ("dbgwcr9_el1", CPENC (2,0,0,9,7), 0, AARCH64_NO_FEATURES) - SYSREG ("dbgwvr0_el1", CPENC (2,0,0,0,6), 0, AARCH64_NO_FEATURES) - SYSREG ("dbgwvr10_el1", CPENC (2,0,0,10,6), 0, AARCH64_NO_FEATURES) - SYSREG ("dbgwvr11_el1", CPENC (2,0,0,11,6), 0, AARCH64_NO_FEATURES) - SYSREG ("dbgwvr12_el1", CPENC (2,0,0,12,6), 0, AARCH64_NO_FEATURES) - SYSREG ("dbgwvr13_el1", CPENC (2,0,0,13,6), 0, AARCH64_NO_FEATURES) - SYSREG ("dbgwvr14_el1", CPENC (2,0,0,14,6), 0, AARCH64_NO_FEATURES) - SYSREG ("dbgwvr15_el1", CPENC (2,0,0,15,6), 0, AARCH64_NO_FEATURES) - SYSREG ("dbgwvr1_el1", CPENC (2,0,0,1,6), 0, AARCH64_NO_FEATURES) - SYSREG ("dbgwvr2_el1", CPENC (2,0,0,2,6), 0, AARCH64_NO_FEATURES) - SYSREG ("dbgwvr3_el1", CPENC (2,0,0,3,6), 0, AARCH64_NO_FEATURES) - SYSREG ("dbgwvr4_el1", CPENC (2,0,0,4,6), 0, AARCH64_NO_FEATURES) - SYSREG ("dbgwvr5_el1", CPENC (2,0,0,5,6), 0, AARCH64_NO_FEATURES) - SYSREG ("dbgwvr6_el1", CPENC (2,0,0,6,6), 0, AARCH64_NO_FEATURES) - SYSREG ("dbgwvr7_el1", CPENC (2,0,0,7,6), 0, AARCH64_NO_FEATURES) - SYSREG ("dbgwvr8_el1", CPENC (2,0,0,8,6), 0, AARCH64_NO_FEATURES) - SYSREG ("dbgwvr9_el1", CPENC (2,0,0,9,6), 0, AARCH64_NO_FEATURES) - SYSREG ("dczid_el0", CPENC (3,3,0,0,7), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("disr_el1", CPENC (3,0,12,1,1), F_ARCHEXT, AARCH64_FEATURE (RAS)) - SYSREG ("dit", CPENC (3,3,4,2,5), F_ARCHEXT, AARCH64_FEATURE (V8_4A)) - SYSREG ("dlr_el0", CPENC (3,3,4,5,1), 0, AARCH64_NO_FEATURES) - SYSREG ("dspsr_el0", CPENC (3,3,4,5,0), 0, AARCH64_NO_FEATURES) - SYSREG ("elr_el1", CPENC (3,0,4,0,1), 0, AARCH64_NO_FEATURES) - SYSREG ("elr_el12", CPENC (3,5,4,0,1), F_ARCHEXT, AARCH64_FEATURE (V8_1A)) - SYSREG ("elr_el2", CPENC (3,4,4,0,1), 0, AARCH64_NO_FEATURES) - SYSREG ("elr_el3", CPENC (3,6,4,0,1), 0, AARCH64_NO_FEATURES) - SYSREG ("erridr_el1", CPENC (3,0,5,3,0), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (RAS)) - SYSREG ("errselr_el1", CPENC (3,0,5,3,1), F_ARCHEXT, AARCH64_FEATURE (RAS)) - SYSREG ("erxaddr_el1", CPENC (3,0,5,4,3), F_ARCHEXT, AARCH64_FEATURE (RAS)) - SYSREG ("erxctlr_el1", CPENC (3,0,5,4,1), F_ARCHEXT, AARCH64_FEATURE (RAS)) - SYSREG ("erxfr_el1", CPENC (3,0,5,4,0), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (RAS)) - SYSREG ("erxgsr_el1", CPENC (3,0,5,3,2), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (RASv2)) - SYSREG ("erxmisc0_el1", CPENC (3,0,5,5,0), F_ARCHEXT, AARCH64_FEATURE (RAS)) - SYSREG ("erxmisc1_el1", CPENC (3,0,5,5,1), F_ARCHEXT, AARCH64_FEATURE (RAS)) - SYSREG ("erxmisc2_el1", CPENC (3,0,5,5,2), F_ARCHEXT, AARCH64_FEATURE (RAS)) - SYSREG ("erxmisc3_el1", CPENC (3,0,5,5,3), F_ARCHEXT, AARCH64_FEATURE (RAS)) - SYSREG ("erxpfgcdn_el1", CPENC (3,0,5,4,6), F_ARCHEXT, AARCH64_FEATURE (RAS)) - SYSREG ("erxpfgctl_el1", CPENC (3,0,5,4,5), F_ARCHEXT, AARCH64_FEATURE (RAS)) - SYSREG ("erxpfgf_el1", CPENC (3,0,5,4,4), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (RAS)) - SYSREG ("erxstatus_el1", CPENC (3,0,5,4,2), F_ARCHEXT, AARCH64_FEATURE (RAS)) - SYSREG ("esr_el1", CPENC (3,0,5,2,0), 0, AARCH64_NO_FEATURES) - SYSREG ("esr_el12", CPENC (3,5,5,2,0), F_ARCHEXT, AARCH64_FEATURE (V8_1A)) - SYSREG ("esr_el2", CPENC (3,4,5,2,0), 0, AARCH64_NO_FEATURES) - SYSREG ("esr_el3", CPENC (3,6,5,2,0), 0, AARCH64_NO_FEATURES) - SYSREG ("far_el1", CPENC (3,0,6,0,0), 0, AARCH64_NO_FEATURES) - SYSREG ("far_el12", CPENC (3,5,6,0,0), F_ARCHEXT, AARCH64_FEATURE (V8_1A)) - SYSREG ("far_el2", CPENC (3,4,6,0,0), 0, AARCH64_NO_FEATURES) - SYSREG ("far_el3", CPENC (3,6,6,0,0), 0, AARCH64_NO_FEATURES) - SYSREG ("fpcr", CPENC (3,3,4,4,0), 0, AARCH64_NO_FEATURES) - SYSREG ("fpexc32_el2", CPENC (3,4,5,3,0), 0, AARCH64_NO_FEATURES) - SYSREG ("fpsr", CPENC (3,3,4,4,1), 0, AARCH64_NO_FEATURES) - SYSREG ("gcspr_el0", CPENC (3,3,2,5,1), F_ARCHEXT, AARCH64_FEATURE (GCS)) - SYSREG ("gcspr_el1", CPENC (3,0,2,5,1), F_ARCHEXT, AARCH64_FEATURE (GCS)) - SYSREG ("gcspr_el2", CPENC (3,4,2,5,1), F_ARCHEXT, AARCH64_FEATURE (GCS)) - SYSREG ("gcspr_el12", CPENC (3,5,2,5,1), F_ARCHEXT, AARCH64_FEATURE (GCS)) - SYSREG ("gcspr_el3", CPENC (3,6,2,5,1), F_ARCHEXT, AARCH64_FEATURE (GCS)) - SYSREG ("gcscre0_el1", CPENC (3,0,2,5,2), F_ARCHEXT, AARCH64_FEATURE (GCS)) - SYSREG ("gcscr_el1", CPENC (3,0,2,5,0), F_ARCHEXT, AARCH64_FEATURE (GCS)) - SYSREG ("gcscr_el2", CPENC (3,4,2,5,0), F_ARCHEXT, AARCH64_FEATURE (GCS)) - SYSREG ("gcscr_el12", CPENC (3,5,2,5,0), F_ARCHEXT, AARCH64_FEATURE (GCS)) - SYSREG ("gcscr_el3", CPENC (3,6,2,5,0), F_ARCHEXT, AARCH64_FEATURE (GCS)) - SYSREG ("gcr_el1", CPENC (3,0,1,0,6), F_ARCHEXT, AARCH64_FEATURE (MEMTAG)) - SYSREG ("gmid_el1", CPENC (3,1,0,0,4), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (MEMTAG)) - SYSREG ("gpccr_el3", CPENC (3,6,2,1,6), 0, AARCH64_NO_FEATURES) - SYSREG ("gptbr_el3", CPENC (3,6,2,1,4), 0, AARCH64_NO_FEATURES) - SYSREG ("hacr_el2", CPENC (3,4,1,1,7), 0, AARCH64_NO_FEATURES) - SYSREG ("hafgrtr_el2", CPENC (3,4,3,1,6), F_ARCHEXT, AARCH64_FEATURE (V8_6A)) - SYSREG ("hcr_el2", CPENC (3,4,1,1,0), 0, AARCH64_NO_FEATURES) - SYSREG ("hcrx_el2", CPENC (3,4,1,2,2), F_ARCHEXT, AARCH64_FEATURE (V8_7A)) - SYSREG ("hdfgrtr_el2", CPENC (3,4,3,1,4), F_ARCHEXT, AARCH64_FEATURE (V8_6A)) - SYSREG ("hdfgrtr2_el2", CPENC (3,4,3,1,0), F_ARCHEXT, AARCH64_FEATURE (FGT2)) - SYSREG ("hdfgwtr_el2", CPENC (3,4,3,1,5), F_ARCHEXT, AARCH64_FEATURE (V8_6A)) - SYSREG ("hdfgwtr2_el2", CPENC (3,4,3,1,1), F_ARCHEXT, AARCH64_FEATURE (FGT2)) - SYSREG ("hfgitr_el2", CPENC (3,4,1,1,6), F_ARCHEXT, AARCH64_FEATURE (V8_6A)) - SYSREG ("hfgrtr_el2", CPENC (3,4,1,1,4), F_ARCHEXT, AARCH64_FEATURE (V8_6A)) - SYSREG ("hfgrtr2_el2", CPENC (3,4,3,1,2), F_ARCHEXT, AARCH64_FEATURE (FGT2)) - SYSREG ("hfgwtr_el2", CPENC (3,4,1,1,5), F_ARCHEXT, AARCH64_FEATURE (V8_6A)) - SYSREG ("hfgwtr2_el2", CPENC (3,4,3,1,3), F_ARCHEXT, AARCH64_FEATURE (FGT2)) - SYSREG ("hpfar_el2", CPENC (3,4,6,0,4), 0, AARCH64_NO_FEATURES) - SYSREG ("hstr_el2", CPENC (3,4,1,1,3), 0, AARCH64_NO_FEATURES) - SYSREG ("icc_ap0r0_el1", CPENC (3,0,12,8,4), 0, AARCH64_NO_FEATURES) - SYSREG ("icc_ap0r1_el1", CPENC (3,0,12,8,5), 0, AARCH64_NO_FEATURES) - SYSREG ("icc_ap0r2_el1", CPENC (3,0,12,8,6), 0, AARCH64_NO_FEATURES) - SYSREG ("icc_ap0r3_el1", CPENC (3,0,12,8,7), 0, AARCH64_NO_FEATURES) - SYSREG ("icc_ap1r0_el1", CPENC (3,0,12,9,0), 0, AARCH64_NO_FEATURES) - SYSREG ("icc_ap1r1_el1", CPENC (3,0,12,9,1), 0, AARCH64_NO_FEATURES) - SYSREG ("icc_ap1r2_el1", CPENC (3,0,12,9,2), 0, AARCH64_NO_FEATURES) - SYSREG ("icc_ap1r3_el1", CPENC (3,0,12,9,3), 0, AARCH64_NO_FEATURES) - SYSREG ("icc_asgi1r_el1", CPENC (3,0,12,11,6), F_REG_WRITE, AARCH64_NO_FEATURES) - SYSREG ("icc_bpr0_el1", CPENC (3,0,12,8,3), 0, AARCH64_NO_FEATURES) - SYSREG ("icc_bpr1_el1", CPENC (3,0,12,12,3), 0, AARCH64_NO_FEATURES) - SYSREG ("icc_ctlr_el1", CPENC (3,0,12,12,4), 0, AARCH64_NO_FEATURES) - SYSREG ("icc_ctlr_el3", CPENC (3,6,12,12,4), 0, AARCH64_NO_FEATURES) - SYSREG ("icc_dir_el1", CPENC (3,0,12,11,1), F_REG_WRITE, AARCH64_NO_FEATURES) - SYSREG ("icc_eoir0_el1", CPENC (3,0,12,8,1), F_REG_WRITE, AARCH64_NO_FEATURES) - SYSREG ("icc_eoir1_el1", CPENC (3,0,12,12,1), F_REG_WRITE, AARCH64_NO_FEATURES) - SYSREG ("icc_hppir0_el1", CPENC (3,0,12,8,2), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("icc_hppir1_el1", CPENC (3,0,12,12,2), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("icc_iar0_el1", CPENC (3,0,12,8,0), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("icc_iar1_el1", CPENC (3,0,12,12,0), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("icc_igrpen0_el1", CPENC (3,0,12,12,6), 0, AARCH64_NO_FEATURES) - SYSREG ("icc_igrpen1_el1", CPENC (3,0,12,12,7), 0, AARCH64_NO_FEATURES) - SYSREG ("icc_igrpen1_el3", CPENC (3,6,12,12,7), 0, AARCH64_NO_FEATURES) - SYSREG ("icc_nmiar1_el1", CPENC (3,0,12,9,5), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (V8_8A)) - SYSREG ("icc_pmr_el1", CPENC (3,0,4,6,0), 0, AARCH64_NO_FEATURES) - SYSREG ("icc_rpr_el1", CPENC (3,0,12,11,3), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("icc_sgi0r_el1", CPENC (3,0,12,11,7), F_REG_WRITE, AARCH64_NO_FEATURES) - SYSREG ("icc_sgi1r_el1", CPENC (3,0,12,11,5), F_REG_WRITE, AARCH64_NO_FEATURES) - SYSREG ("icc_sre_el1", CPENC (3,0,12,12,5), 0, AARCH64_NO_FEATURES) - SYSREG ("icc_sre_el2", CPENC (3,4,12,9,5), 0, AARCH64_NO_FEATURES) - SYSREG ("icc_sre_el3", CPENC (3,6,12,12,5), 0, AARCH64_NO_FEATURES) - SYSREG ("ich_ap0r0_el2", CPENC (3,4,12,8,0), 0, AARCH64_NO_FEATURES) - SYSREG ("ich_ap0r1_el2", CPENC (3,4,12,8,1), 0, AARCH64_NO_FEATURES) - SYSREG ("ich_ap0r2_el2", CPENC (3,4,12,8,2), 0, AARCH64_NO_FEATURES) - SYSREG ("ich_ap0r3_el2", CPENC (3,4,12,8,3), 0, AARCH64_NO_FEATURES) - SYSREG ("ich_ap1r0_el2", CPENC (3,4,12,9,0), 0, AARCH64_NO_FEATURES) - SYSREG ("ich_ap1r1_el2", CPENC (3,4,12,9,1), 0, AARCH64_NO_FEATURES) - SYSREG ("ich_ap1r2_el2", CPENC (3,4,12,9,2), 0, AARCH64_NO_FEATURES) - SYSREG ("ich_ap1r3_el2", CPENC (3,4,12,9,3), 0, AARCH64_NO_FEATURES) - SYSREG ("ich_eisr_el2", CPENC (3,4,12,11,3), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("ich_elrsr_el2", CPENC (3,4,12,11,5), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("ich_hcr_el2", CPENC (3,4,12,11,0), 0, AARCH64_NO_FEATURES) - SYSREG ("ich_lr0_el2", CPENC (3,4,12,12,0), 0, AARCH64_NO_FEATURES) - SYSREG ("ich_lr10_el2", CPENC (3,4,12,13,2), 0, AARCH64_NO_FEATURES) - SYSREG ("ich_lr11_el2", CPENC (3,4,12,13,3), 0, AARCH64_NO_FEATURES) - SYSREG ("ich_lr12_el2", CPENC (3,4,12,13,4), 0, AARCH64_NO_FEATURES) - SYSREG ("ich_lr13_el2", CPENC (3,4,12,13,5), 0, AARCH64_NO_FEATURES) - SYSREG ("ich_lr14_el2", CPENC (3,4,12,13,6), 0, AARCH64_NO_FEATURES) - SYSREG ("ich_lr15_el2", CPENC (3,4,12,13,7), 0, AARCH64_NO_FEATURES) - SYSREG ("ich_lr1_el2", CPENC (3,4,12,12,1), 0, AARCH64_NO_FEATURES) - SYSREG ("ich_lr2_el2", CPENC (3,4,12,12,2), 0, AARCH64_NO_FEATURES) - SYSREG ("ich_lr3_el2", CPENC (3,4,12,12,3), 0, AARCH64_NO_FEATURES) - SYSREG ("ich_lr4_el2", CPENC (3,4,12,12,4), 0, AARCH64_NO_FEATURES) - SYSREG ("ich_lr5_el2", CPENC (3,4,12,12,5), 0, AARCH64_NO_FEATURES) - SYSREG ("ich_lr6_el2", CPENC (3,4,12,12,6), 0, AARCH64_NO_FEATURES) - SYSREG ("ich_lr7_el2", CPENC (3,4,12,12,7), 0, AARCH64_NO_FEATURES) - SYSREG ("ich_lr8_el2", CPENC (3,4,12,13,0), 0, AARCH64_NO_FEATURES) - SYSREG ("ich_lr9_el2", CPENC (3,4,12,13,1), 0, AARCH64_NO_FEATURES) - SYSREG ("ich_misr_el2", CPENC (3,4,12,11,2), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("ich_vmcr_el2", CPENC (3,4,12,11,7), 0, AARCH64_NO_FEATURES) - SYSREG ("ich_vtr_el2", CPENC (3,4,12,11,1), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("id_aa64afr0_el1", CPENC (3,0,0,5,4), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("id_aa64afr1_el1", CPENC (3,0,0,5,5), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("id_aa64dfr0_el1", CPENC (3,0,0,5,0), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("id_aa64dfr1_el1", CPENC (3,0,0,5,1), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("id_aa64isar0_el1", CPENC (3,0,0,6,0), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("id_aa64isar1_el1", CPENC (3,0,0,6,1), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("id_aa64isar2_el1", CPENC (3,0,0,6,2), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("id_aa64isar3_el1", CPENC (3,0,0,6,3), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("id_aa64mmfr0_el1", CPENC (3,0,0,7,0), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("id_aa64mmfr1_el1", CPENC (3,0,0,7,1), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("id_aa64mmfr2_el1", CPENC (3,0,0,7,2), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("id_aa64mmfr3_el1", CPENC (3,0,0,7,3), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("id_aa64mmfr4_el1", CPENC (3,0,0,7,4), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("id_aa64pfr0_el1", CPENC (3,0,0,4,0), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("id_aa64pfr1_el1", CPENC (3,0,0,4,1), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("id_aa64smfr0_el1", CPENC (3,0,0,4,5), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (SME)) - SYSREG ("id_aa64zfr0_el1", CPENC (3,0,0,4,4), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (SVE)) - SYSREG ("id_afr0_el1", CPENC (3,0,0,1,3), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("id_dfr0_el1", CPENC (3,0,0,1,2), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("id_dfr1_el1", CPENC (3,0,0,3,5), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("id_isar0_el1", CPENC (3,0,0,2,0), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("id_isar1_el1", CPENC (3,0,0,2,1), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("id_isar2_el1", CPENC (3,0,0,2,2), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("id_isar3_el1", CPENC (3,0,0,2,3), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("id_isar4_el1", CPENC (3,0,0,2,4), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("id_isar5_el1", CPENC (3,0,0,2,5), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("id_isar6_el1", CPENC (3,0,0,2,7), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("id_mmfr0_el1", CPENC (3,0,0,1,4), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("id_mmfr1_el1", CPENC (3,0,0,1,5), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("id_mmfr2_el1", CPENC (3,0,0,1,6), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("id_mmfr3_el1", CPENC (3,0,0,1,7), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("id_mmfr4_el1", CPENC (3,0,0,2,6), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("id_mmfr5_el1", CPENC (3,0,0,3,6), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("id_pfr0_el1", CPENC (3,0,0,1,0), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("id_pfr1_el1", CPENC (3,0,0,1,1), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("id_pfr2_el1", CPENC (3,0,0,3,4), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (ID_PFR2)) - SYSREG ("ifsr32_el2", CPENC (3,4,5,0,1), 0, AARCH64_NO_FEATURES) - SYSREG ("isr_el1", CPENC (3,0,12,1,0), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("lorc_el1", CPENC (3,0,10,4,3), F_ARCHEXT, AARCH64_FEATURE (LOR)) - SYSREG ("lorea_el1", CPENC (3,0,10,4,1), F_ARCHEXT, AARCH64_FEATURE (LOR)) - SYSREG ("lorid_el1", CPENC (3,0,10,4,7), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (LOR)) - SYSREG ("lorn_el1", CPENC (3,0,10,4,2), F_ARCHEXT, AARCH64_FEATURE (LOR)) - SYSREG ("lorsa_el1", CPENC (3,0,10,4,0), F_ARCHEXT, AARCH64_FEATURE (LOR)) - SYSREG ("mair_el1", CPENC (3,0,10,2,0), 0, AARCH64_NO_FEATURES) - SYSREG ("mair_el12", CPENC (3,5,10,2,0), F_ARCHEXT, AARCH64_FEATURE (V8_1A)) - SYSREG ("mair_el2", CPENC (3,4,10,2,0), 0, AARCH64_NO_FEATURES) - SYSREG ("mair_el3", CPENC (3,6,10,2,0), 0, AARCH64_NO_FEATURES) - SYSREG ("mair2_el1", CPENC (3,0,10,2,1), F_ARCHEXT, AARCH64_FEATURE (AIE)) - SYSREG ("mair2_el12", CPENC (3,5,10,2,1), F_ARCHEXT, AARCH64_FEATURE (AIE)) - SYSREG ("mair2_el2", CPENC (3,4,10,1,1), F_ARCHEXT, AARCH64_FEATURE (AIE)) - SYSREG ("mair2_el3", CPENC (3,6,10,1,1), F_ARCHEXT, AARCH64_FEATURE (AIE)) - SYSREG ("mdccint_el1", CPENC (2,0,0,2,0), 0, AARCH64_NO_FEATURES) - SYSREG ("mdccsr_el0", CPENC (2,3,0,1,0), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("mdcr_el2", CPENC (3,4,1,1,1), 0, AARCH64_NO_FEATURES) - SYSREG ("mdcr_el3", CPENC (3,6,1,3,1), 0, AARCH64_NO_FEATURES) - SYSREG ("mdrar_el1", CPENC (2,0,1,0,0), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("mdscr_el1", CPENC (2,0,0,2,2), 0, AARCH64_NO_FEATURES) - SYSREG ("mdselr_el1", CPENC (2,0,0,4,2), F_ARCHEXT, AARCH64_FEATURE (DEBUGv8p9)) - SYSREG ("mecid_a0_el2", CPENC (3,4,10,8,1), F_ARCHEXT, AARCH64_FEATURE (V8_7A)) - SYSREG ("mecid_a1_el2", CPENC (3,4,10,8,3), F_ARCHEXT, AARCH64_FEATURE (V8_7A)) - SYSREG ("mecid_p0_el2", CPENC (3,4,10,8,0), F_ARCHEXT, AARCH64_FEATURE (V8_7A)) - SYSREG ("mecid_p1_el2", CPENC (3,4,10,8,2), F_ARCHEXT, AARCH64_FEATURE (V8_7A)) - SYSREG ("mecid_rl_a_el3", CPENC (3,6,10,10,1), F_ARCHEXT, AARCH64_FEATURE (V8_7A)) - SYSREG ("mecidr_el2", CPENC (3,4,10,8,7), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (V8_7A)) - SYSREG ("mfar_el3", CPENC (3,6,6,0,5), 0, AARCH64_NO_FEATURES) - SYSREG ("midr_el1", CPENC (3,0,0,0,0), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("mpam0_el1", CPENC (3,0,10,5,1), 0, AARCH64_NO_FEATURES) - SYSREG ("mpam1_el1", CPENC (3,0,10,5,0), 0, AARCH64_NO_FEATURES) - SYSREG ("mpam1_el12", CPENC (3,5,10,5,0), 0, AARCH64_NO_FEATURES) - SYSREG ("mpam2_el2", CPENC (3,4,10,5,0), 0, AARCH64_NO_FEATURES) - SYSREG ("mpam3_el3", CPENC (3,6,10,5,0), 0, AARCH64_NO_FEATURES) - SYSREG ("mpamhcr_el2", CPENC (3,4,10,4,0), 0, AARCH64_NO_FEATURES) - SYSREG ("mpamidr_el1", CPENC (3,0,10,4,4), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("mpamsm_el1", CPENC (3,0,10,5,3), F_ARCHEXT, AARCH64_FEATURE (SME)) - SYSREG ("mpamvpm0_el2", CPENC (3,4,10,6,0), 0, AARCH64_NO_FEATURES) - SYSREG ("mpamvpm1_el2", CPENC (3,4,10,6,1), 0, AARCH64_NO_FEATURES) - SYSREG ("mpamvpm2_el2", CPENC (3,4,10,6,2), 0, AARCH64_NO_FEATURES) - SYSREG ("mpamvpm3_el2", CPENC (3,4,10,6,3), 0, AARCH64_NO_FEATURES) - SYSREG ("mpamvpm4_el2", CPENC (3,4,10,6,4), 0, AARCH64_NO_FEATURES) - SYSREG ("mpamvpm5_el2", CPENC (3,4,10,6,5), 0, AARCH64_NO_FEATURES) - SYSREG ("mpamvpm6_el2", CPENC (3,4,10,6,6), 0, AARCH64_NO_FEATURES) - SYSREG ("mpamvpm7_el2", CPENC (3,4,10,6,7), 0, AARCH64_NO_FEATURES) - SYSREG ("mpamvpmv_el2", CPENC (3,4,10,4,1), 0, AARCH64_NO_FEATURES) - SYSREG ("mpidr_el1", CPENC (3,0,0,0,5), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("mpuir_el1", CPENC (3,0,0,0,4), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (V8R)) - SYSREG ("mpuir_el2", CPENC (3,4,0,0,4), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (V8R)) - SYSREG ("mvfr0_el1", CPENC (3,0,0,3,0), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("mvfr1_el1", CPENC (3,0,0,3,1), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("mvfr2_el1", CPENC (3,0,0,3,2), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("nzcv", CPENC (3,3,4,2,0), 0, AARCH64_NO_FEATURES) - SYSREG ("osdlr_el1", CPENC (2,0,1,3,4), 0, AARCH64_NO_FEATURES) - SYSREG ("osdtrrx_el1", CPENC (2,0,0,0,2), 0, AARCH64_NO_FEATURES) - SYSREG ("osdtrtx_el1", CPENC (2,0,0,3,2), 0, AARCH64_NO_FEATURES) - SYSREG ("oseccr_el1", CPENC (2,0,0,6,2), 0, AARCH64_NO_FEATURES) - SYSREG ("oslar_el1", CPENC (2,0,1,0,4), F_REG_WRITE, AARCH64_NO_FEATURES) - SYSREG ("oslsr_el1", CPENC (2,0,1,1,4), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("pir_el1", CPENC (3,0,10,2,3), F_ARCHEXT, AARCH64_FEATURE (S1PIE)) - SYSREG ("pir_el12", CPENC (3,5,10,2,3), F_ARCHEXT, AARCH64_FEATURE (S1PIE)) - SYSREG ("pir_el2", CPENC (3,4,10,2,3), F_ARCHEXT, AARCH64_FEATURE (S1PIE)) - SYSREG ("pir_el3", CPENC (3,6,10,2,3), F_ARCHEXT, AARCH64_FEATURE (S1PIE)) - SYSREG ("pire0_el1", CPENC (3,0,10,2,2), F_ARCHEXT, AARCH64_FEATURE (S1PIE)) - SYSREG ("pire0_el12", CPENC (3,5,10,2,2), F_ARCHEXT, AARCH64_FEATURE (S1PIE)) - SYSREG ("pire0_el2", CPENC (3,4,10,2,2), F_ARCHEXT, AARCH64_FEATURE (S1PIE)) - SYSREG ("pan", CPENC (3,0,4,2,3), F_ARCHEXT, AARCH64_FEATURE (PAN)) - SYSREG ("par_el1", CPENC (3,0,7,4,0), F_REG_128, AARCH64_NO_FEATURES) - SYSREG ("pfar_el1", CPENC (3,0,6,0,5), F_ARCHEXT, AARCH64_FEATURE (PFAR)) - SYSREG ("pfar_el12", CPENC (3,5,6,0,5), F_ARCHEXT, AARCH64_FEATURE (PFAR)) - SYSREG ("pfar_el2", CPENC (3,4,6,0,5), F_ARCHEXT, AARCH64_FEATURE (PFAR)) - SYSREG ("pmbidr_el1", CPENC (3,0,9,10,7), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (PROFILE)) - SYSREG ("pmblimitr_el1", CPENC (3,0,9,10,0), F_ARCHEXT, AARCH64_FEATURE (PROFILE)) - SYSREG ("pmbptr_el1", CPENC (3,0,9,10,1), F_ARCHEXT, AARCH64_FEATURE (PROFILE)) - SYSREG ("pmbsr_el1", CPENC (3,0,9,10,3), F_ARCHEXT, AARCH64_FEATURE (PROFILE)) - SYSREG ("pmccfiltr_el0", CPENC (3,3,14,15,7), 0, AARCH64_NO_FEATURES) - SYSREG ("pmccntr_el0", CPENC (3,3,9,13,0), 0, AARCH64_NO_FEATURES) - SYSREG ("pmccntsvr_el1", CPENC (2,0,14,11,7), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (PMUv3_SS)) - SYSREG ("pmceid0_el0", CPENC (3,3,9,12,6), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("pmceid1_el0", CPENC (3,3,9,12,7), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("pmcntenclr_el0", CPENC (3,3,9,12,2), 0, AARCH64_NO_FEATURES) - SYSREG ("pmcntenset_el0", CPENC (3,3,9,12,1), 0, AARCH64_NO_FEATURES) - SYSREG ("pmcr_el0", CPENC (3,3,9,12,0), 0, AARCH64_NO_FEATURES) - SYSREG ("pmecr_el1", CPENC (3,0,9,14,5), F_ARCHEXT, AARCH64_FEATURE (SEBEP)) - SYSREG ("pmevcntr0_el0", CPENC (3,3,14,8,0), 0, AARCH64_NO_FEATURES) - SYSREG ("pmevcntr10_el0", CPENC (3,3,14,9,2), 0, AARCH64_NO_FEATURES) - SYSREG ("pmevcntr11_el0", CPENC (3,3,14,9,3), 0, AARCH64_NO_FEATURES) - SYSREG ("pmevcntr12_el0", CPENC (3,3,14,9,4), 0, AARCH64_NO_FEATURES) - SYSREG ("pmevcntr13_el0", CPENC (3,3,14,9,5), 0, AARCH64_NO_FEATURES) - SYSREG ("pmevcntr14_el0", CPENC (3,3,14,9,6), 0, AARCH64_NO_FEATURES) - SYSREG ("pmevcntr15_el0", CPENC (3,3,14,9,7), 0, AARCH64_NO_FEATURES) - SYSREG ("pmevcntr16_el0", CPENC (3,3,14,10,0), 0, AARCH64_NO_FEATURES) - SYSREG ("pmevcntr17_el0", CPENC (3,3,14,10,1), 0, AARCH64_NO_FEATURES) - SYSREG ("pmevcntr18_el0", CPENC (3,3,14,10,2), 0, AARCH64_NO_FEATURES) - SYSREG ("pmevcntr19_el0", CPENC (3,3,14,10,3), 0, AARCH64_NO_FEATURES) - SYSREG ("pmevcntr1_el0", CPENC (3,3,14,8,1), 0, AARCH64_NO_FEATURES) - SYSREG ("pmevcntr20_el0", CPENC (3,3,14,10,4), 0, AARCH64_NO_FEATURES) - SYSREG ("pmevcntr21_el0", CPENC (3,3,14,10,5), 0, AARCH64_NO_FEATURES) - SYSREG ("pmevcntr22_el0", CPENC (3,3,14,10,6), 0, AARCH64_NO_FEATURES) - SYSREG ("pmevcntr23_el0", CPENC (3,3,14,10,7), 0, AARCH64_NO_FEATURES) - SYSREG ("pmevcntr24_el0", CPENC (3,3,14,11,0), 0, AARCH64_NO_FEATURES) - SYSREG ("pmevcntr25_el0", CPENC (3,3,14,11,1), 0, AARCH64_NO_FEATURES) - SYSREG ("pmevcntr26_el0", CPENC (3,3,14,11,2), 0, AARCH64_NO_FEATURES) - SYSREG ("pmevcntr27_el0", CPENC (3,3,14,11,3), 0, AARCH64_NO_FEATURES) - SYSREG ("pmevcntr28_el0", CPENC (3,3,14,11,4), 0, AARCH64_NO_FEATURES) - SYSREG ("pmevcntr29_el0", CPENC (3,3,14,11,5), 0, AARCH64_NO_FEATURES) - SYSREG ("pmevcntr2_el0", CPENC (3,3,14,8,2), 0, AARCH64_NO_FEATURES) - SYSREG ("pmevcntr30_el0", CPENC (3,3,14,11,6), 0, AARCH64_NO_FEATURES) - SYSREG ("pmevcntr3_el0", CPENC (3,3,14,8,3), 0, AARCH64_NO_FEATURES) - SYSREG ("pmevcntr4_el0", CPENC (3,3,14,8,4), 0, AARCH64_NO_FEATURES) - SYSREG ("pmevcntr5_el0", CPENC (3,3,14,8,5), 0, AARCH64_NO_FEATURES) - SYSREG ("pmevcntr6_el0", CPENC (3,3,14,8,6), 0, AARCH64_NO_FEATURES) - SYSREG ("pmevcntr7_el0", CPENC (3,3,14,8,7), 0, AARCH64_NO_FEATURES) - SYSREG ("pmevcntr8_el0", CPENC (3,3,14,9,0), 0, AARCH64_NO_FEATURES) - SYSREG ("pmevcntr9_el0", CPENC (3,3,14,9,1), 0, AARCH64_NO_FEATURES) - SYSREG ("pmevcntsvr0_el1", CPENC (2,0,14,8,0), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (PMUv3_SS)) - SYSREG ("pmevcntsvr10_el1", CPENC (2,0,14,9,2), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (PMUv3_SS)) - SYSREG ("pmevcntsvr11_el1", CPENC (2,0,14,9,3), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (PMUv3_SS)) - SYSREG ("pmevcntsvr12_el1", CPENC (2,0,14,9,4), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (PMUv3_SS)) - SYSREG ("pmevcntsvr13_el1", CPENC (2,0,14,9,5), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (PMUv3_SS)) - SYSREG ("pmevcntsvr14_el1", CPENC (2,0,14,9,6), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (PMUv3_SS)) - SYSREG ("pmevcntsvr15_el1", CPENC (2,0,14,9,7), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (PMUv3_SS)) - SYSREG ("pmevcntsvr16_el1", CPENC (2,0,14,10,0), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (PMUv3_SS)) - SYSREG ("pmevcntsvr17_el1", CPENC (2,0,14,10,1), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (PMUv3_SS)) - SYSREG ("pmevcntsvr18_el1", CPENC (2,0,14,10,2), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (PMUv3_SS)) - SYSREG ("pmevcntsvr19_el1", CPENC (2,0,14,10,3), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (PMUv3_SS)) - SYSREG ("pmevcntsvr1_el1", CPENC (2,0,14,8,1), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (PMUv3_SS)) - SYSREG ("pmevcntsvr20_el1", CPENC (2,0,14,10,4), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (PMUv3_SS)) - SYSREG ("pmevcntsvr21_el1", CPENC (2,0,14,10,5), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (PMUv3_SS)) - SYSREG ("pmevcntsvr22_el1", CPENC (2,0,14,10,6), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (PMUv3_SS)) - SYSREG ("pmevcntsvr23_el1", CPENC (2,0,14,10,7), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (PMUv3_SS)) - SYSREG ("pmevcntsvr24_el1", CPENC (2,0,14,11,0), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (PMUv3_SS)) - SYSREG ("pmevcntsvr25_el1", CPENC (2,0,14,11,1), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (PMUv3_SS)) - SYSREG ("pmevcntsvr26_el1", CPENC (2,0,14,11,2), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (PMUv3_SS)) - SYSREG ("pmevcntsvr27_el1", CPENC (2,0,14,11,3), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (PMUv3_SS)) - SYSREG ("pmevcntsvr28_el1", CPENC (2,0,14,11,4), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (PMUv3_SS)) - SYSREG ("pmevcntsvr29_el1", CPENC (2,0,14,11,5), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (PMUv3_SS)) - SYSREG ("pmevcntsvr2_el1", CPENC (2,0,14,8,2), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (PMUv3_SS)) - SYSREG ("pmevcntsvr30_el1", CPENC (2,0,14,11,6), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (PMUv3_SS)) - SYSREG ("pmevcntsvr3_el1", CPENC (2,0,14,8,3), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (PMUv3_SS)) - SYSREG ("pmevcntsvr4_el1", CPENC (2,0,14,8,4), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (PMUv3_SS)) - SYSREG ("pmevcntsvr5_el1", CPENC (2,0,14,8,5), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (PMUv3_SS)) - SYSREG ("pmevcntsvr6_el1", CPENC (2,0,14,8,6), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (PMUv3_SS)) - SYSREG ("pmevcntsvr7_el1", CPENC (2,0,14,8,7), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (PMUv3_SS)) - SYSREG ("pmevcntsvr8_el1", CPENC (2,0,14,9,0), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (PMUv3_SS)) - SYSREG ("pmevcntsvr9_el1", CPENC (2,0,14,9,1), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (PMUv3_SS)) - SYSREG ("pmevtyper0_el0", CPENC (3,3,14,12,0), 0, AARCH64_NO_FEATURES) - SYSREG ("pmevtyper10_el0", CPENC (3,3,14,13,2), 0, AARCH64_NO_FEATURES) - SYSREG ("pmevtyper11_el0", CPENC (3,3,14,13,3), 0, AARCH64_NO_FEATURES) - SYSREG ("pmevtyper12_el0", CPENC (3,3,14,13,4), 0, AARCH64_NO_FEATURES) - SYSREG ("pmevtyper13_el0", CPENC (3,3,14,13,5), 0, AARCH64_NO_FEATURES) - SYSREG ("pmevtyper14_el0", CPENC (3,3,14,13,6), 0, AARCH64_NO_FEATURES) - SYSREG ("pmevtyper15_el0", CPENC (3,3,14,13,7), 0, AARCH64_NO_FEATURES) - SYSREG ("pmevtyper16_el0", CPENC (3,3,14,14,0), 0, AARCH64_NO_FEATURES) - SYSREG ("pmevtyper17_el0", CPENC (3,3,14,14,1), 0, AARCH64_NO_FEATURES) - SYSREG ("pmevtyper18_el0", CPENC (3,3,14,14,2), 0, AARCH64_NO_FEATURES) - SYSREG ("pmevtyper19_el0", CPENC (3,3,14,14,3), 0, AARCH64_NO_FEATURES) - SYSREG ("pmevtyper1_el0", CPENC (3,3,14,12,1), 0, AARCH64_NO_FEATURES) - SYSREG ("pmevtyper20_el0", CPENC (3,3,14,14,4), 0, AARCH64_NO_FEATURES) - SYSREG ("pmevtyper21_el0", CPENC (3,3,14,14,5), 0, AARCH64_NO_FEATURES) - SYSREG ("pmevtyper22_el0", CPENC (3,3,14,14,6), 0, AARCH64_NO_FEATURES) - SYSREG ("pmevtyper23_el0", CPENC (3,3,14,14,7), 0, AARCH64_NO_FEATURES) - SYSREG ("pmevtyper24_el0", CPENC (3,3,14,15,0), 0, AARCH64_NO_FEATURES) - SYSREG ("pmevtyper25_el0", CPENC (3,3,14,15,1), 0, AARCH64_NO_FEATURES) - SYSREG ("pmevtyper26_el0", CPENC (3,3,14,15,2), 0, AARCH64_NO_FEATURES) - SYSREG ("pmevtyper27_el0", CPENC (3,3,14,15,3), 0, AARCH64_NO_FEATURES) - SYSREG ("pmevtyper28_el0", CPENC (3,3,14,15,4), 0, AARCH64_NO_FEATURES) - SYSREG ("pmevtyper29_el0", CPENC (3,3,14,15,5), 0, AARCH64_NO_FEATURES) - SYSREG ("pmevtyper2_el0", CPENC (3,3,14,12,2), 0, AARCH64_NO_FEATURES) - SYSREG ("pmevtyper30_el0", CPENC (3,3,14,15,6), 0, AARCH64_NO_FEATURES) - SYSREG ("pmevtyper3_el0", CPENC (3,3,14,12,3), 0, AARCH64_NO_FEATURES) - SYSREG ("pmevtyper4_el0", CPENC (3,3,14,12,4), 0, AARCH64_NO_FEATURES) - SYSREG ("pmevtyper5_el0", CPENC (3,3,14,12,5), 0, AARCH64_NO_FEATURES) - SYSREG ("pmevtyper6_el0", CPENC (3,3,14,12,6), 0, AARCH64_NO_FEATURES) - SYSREG ("pmevtyper7_el0", CPENC (3,3,14,12,7), 0, AARCH64_NO_FEATURES) - SYSREG ("pmevtyper8_el0", CPENC (3,3,14,13,0), 0, AARCH64_NO_FEATURES) - SYSREG ("pmevtyper9_el0", CPENC (3,3,14,13,1), 0, AARCH64_NO_FEATURES) - SYSREG ("pmiar_el1", CPENC (3,0,9,14,7), F_ARCHEXT, AARCH64_FEATURE (SEBEP)) - SYSREG ("pmicfiltr_el0", CPENC (3,3,9,6,0), F_ARCHEXT, AARCH64_FEATURE (PMUv3_ICNTR)) - SYSREG ("pmicntr_el0", CPENC (3,3,9,4,0), F_ARCHEXT, AARCH64_FEATURE (PMUv3_ICNTR)) - SYSREG ("pmicntsvr_el1", CPENC (2,0,14,12,0), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (PMUv3_SS)) - SYSREG ("pmintenclr_el1", CPENC (3,0,9,14,2), 0, AARCH64_NO_FEATURES) - SYSREG ("pmintenset_el1", CPENC (3,0,9,14,1), 0, AARCH64_NO_FEATURES) - SYSREG ("pmmir_el1", CPENC (3,0,9,14,6), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (V8_4A)) - SYSREG ("pmovsclr_el0", CPENC (3,3,9,12,3), 0, AARCH64_NO_FEATURES) - SYSREG ("pmovsset_el0", CPENC (3,3,9,14,3), 0, AARCH64_NO_FEATURES) - SYSREG ("pmscr_el1", CPENC (3,0,9,9,0), F_ARCHEXT, AARCH64_FEATURE (PROFILE)) - SYSREG ("pmscr_el12", CPENC (3,5,9,9,0), F_ARCHEXT, AARCH64_FEATURE (PROFILE)) - SYSREG ("pmscr_el2", CPENC (3,4,9,9,0), F_ARCHEXT, AARCH64_FEATURE (PROFILE)) - SYSREG ("pmsdsfr_el1", CPENC (3,4,9,10,4), F_ARCHEXT, AARCH64_FEATURE (SPE_FDS)) - SYSREG ("pmselr_el0", CPENC (3,3,9,12,5), 0, AARCH64_NO_FEATURES) - SYSREG ("pmsevfr_el1", CPENC (3,0,9,9,5), F_ARCHEXT, AARCH64_FEATURE (PROFILE)) - SYSREG ("pmsfcr_el1", CPENC (3,0,9,9,4), F_ARCHEXT, AARCH64_FEATURE (PROFILE)) - SYSREG ("pmsicr_el1", CPENC (3,0,9,9,2), F_ARCHEXT, AARCH64_FEATURE (PROFILE)) - SYSREG ("pmsidr_el1", CPENC (3,0,9,9,7), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (PROFILE)) - SYSREG ("pmsirr_el1", CPENC (3,0,9,9,3), F_ARCHEXT, AARCH64_FEATURE (PROFILE)) - SYSREG ("pmslatfr_el1", CPENC (3,0,9,9,6), F_ARCHEXT, AARCH64_FEATURE (PROFILE)) - SYSREG ("pmsnevfr_el1", CPENC (3,0,9,9,1), F_ARCHEXT, AARCH64_FEATURE (V8_7A)) - SYSREG ("pmsscr_el1", CPENC (3,0,9,13,3), F_ARCHEXT, AARCH64_FEATURE (PMUv3_SS)) - SYSREG ("pmswinc_el0", CPENC (3,3,9,12,4), F_REG_WRITE, AARCH64_NO_FEATURES) - SYSREG ("pmuacr_el1", CPENC (3,0,9,14,4), F_ARCHEXT, AARCH64_FEATURE (PMUv3p9)) - SYSREG ("pmuserenr_el0", CPENC (3,3,9,14,0), 0, AARCH64_NO_FEATURES) - SYSREG ("pmxevcntr_el0", CPENC (3,3,9,13,2), 0, AARCH64_NO_FEATURES) - SYSREG ("pmxevtyper_el0", CPENC (3,3,9,13,1), 0, AARCH64_NO_FEATURES) - SYSREG ("pmzr_el0", CPENC (3,3,9,13,4), F_REG_WRITE|F_ARCHEXT, AARCH64_FEATURE (PMUv3_ICNTR)) - SYSREG ("por_el0", CPENC (3,3,10,2,4), F_ARCHEXT, AARCH64_FEATURE (S1POE)) - SYSREG ("por_el1", CPENC (3,0,10,2,4), F_ARCHEXT, AARCH64_FEATURE (S1POE)) - SYSREG ("por_el12", CPENC (3,5,10,2,4), F_ARCHEXT, AARCH64_FEATURE (S1POE)) - SYSREG ("por_el2", CPENC (3,4,10,2,4), F_ARCHEXT, AARCH64_FEATURE (S1POE)) - SYSREG ("por_el3", CPENC (3,6,10,2,4), F_ARCHEXT, AARCH64_FEATURE (S1POE)) - SYSREG ("prbar10_el1", CPENC (3,0,6,13,0), F_ARCHEXT, AARCH64_FEATURE (V8R)) - SYSREG ("prbar10_el2", CPENC (3,4,6,13,0), F_ARCHEXT, AARCH64_FEATURE (V8R)) - SYSREG ("prbar11_el1", CPENC (3,0,6,13,4), F_ARCHEXT, AARCH64_FEATURE (V8R)) - SYSREG ("prbar11_el2", CPENC (3,4,6,13,4), F_ARCHEXT, AARCH64_FEATURE (V8R)) - SYSREG ("prbar12_el1", CPENC (3,0,6,14,0), F_ARCHEXT, AARCH64_FEATURE (V8R)) - SYSREG ("prbar12_el2", CPENC (3,4,6,14,0), F_ARCHEXT, AARCH64_FEATURE (V8R)) - SYSREG ("prbar13_el1", CPENC (3,0,6,14,4), F_ARCHEXT, AARCH64_FEATURE (V8R)) - SYSREG ("prbar13_el2", CPENC (3,4,6,14,4), F_ARCHEXT, AARCH64_FEATURE (V8R)) - SYSREG ("prbar14_el1", CPENC (3,0,6,15,0), F_ARCHEXT, AARCH64_FEATURE (V8R)) - SYSREG ("prbar14_el2", CPENC (3,4,6,15,0), F_ARCHEXT, AARCH64_FEATURE (V8R)) - SYSREG ("prbar15_el1", CPENC (3,0,6,15,4), F_ARCHEXT, AARCH64_FEATURE (V8R)) - SYSREG ("prbar15_el2", CPENC (3,4,6,15,4), F_ARCHEXT, AARCH64_FEATURE (V8R)) - SYSREG ("prbar1_el1", CPENC (3,0,6,8,4), F_ARCHEXT, AARCH64_FEATURE (V8R)) - SYSREG ("prbar1_el2", CPENC (3,4,6,8,4), F_ARCHEXT, AARCH64_FEATURE (V8R)) - SYSREG ("prbar2_el1", CPENC (3,0,6,9,0), F_ARCHEXT, AARCH64_FEATURE (V8R)) - SYSREG ("prbar2_el2", CPENC (3,4,6,9,0), F_ARCHEXT, AARCH64_FEATURE (V8R)) - SYSREG ("prbar3_el1", CPENC (3,0,6,9,4), F_ARCHEXT, AARCH64_FEATURE (V8R)) - SYSREG ("prbar3_el2", CPENC (3,4,6,9,4), F_ARCHEXT, AARCH64_FEATURE (V8R)) - SYSREG ("prbar4_el1", CPENC (3,0,6,10,0), F_ARCHEXT, AARCH64_FEATURE (V8R)) - SYSREG ("prbar4_el2", CPENC (3,4,6,10,0), F_ARCHEXT, AARCH64_FEATURE (V8R)) - SYSREG ("prbar5_el1", CPENC (3,0,6,10,4), F_ARCHEXT, AARCH64_FEATURE (V8R)) - SYSREG ("prbar5_el2", CPENC (3,4,6,10,4), F_ARCHEXT, AARCH64_FEATURE (V8R)) - SYSREG ("prbar6_el1", CPENC (3,0,6,11,0), F_ARCHEXT, AARCH64_FEATURE (V8R)) - SYSREG ("prbar6_el2", CPENC (3,4,6,11,0), F_ARCHEXT, AARCH64_FEATURE (V8R)) - SYSREG ("prbar7_el1", CPENC (3,0,6,11,4), F_ARCHEXT, AARCH64_FEATURE (V8R)) - SYSREG ("prbar7_el2", CPENC (3,4,6,11,4), F_ARCHEXT, AARCH64_FEATURE (V8R)) - SYSREG ("prbar8_el1", CPENC (3,0,6,12,0), F_ARCHEXT, AARCH64_FEATURE (V8R)) - SYSREG ("prbar8_el2", CPENC (3,4,6,12,0), F_ARCHEXT, AARCH64_FEATURE (V8R)) - SYSREG ("prbar9_el1", CPENC (3,0,6,12,4), F_ARCHEXT, AARCH64_FEATURE (V8R)) - SYSREG ("prbar9_el2", CPENC (3,4,6,12,4), F_ARCHEXT, AARCH64_FEATURE (V8R)) - SYSREG ("prbar_el1", CPENC (3,0,6,8,0), F_ARCHEXT, AARCH64_FEATURE (V8R)) - SYSREG ("prbar_el2", CPENC (3,4,6,8,0), F_ARCHEXT, AARCH64_FEATURE (V8R)) - SYSREG ("prenr_el1", CPENC (3,0,6,1,1), F_ARCHEXT, AARCH64_FEATURE (V8R)) - SYSREG ("prenr_el2", CPENC (3,4,6,1,1), F_ARCHEXT, AARCH64_FEATURE (V8R)) - SYSREG ("prlar10_el1", CPENC (3,0,6,13,1), F_ARCHEXT, AARCH64_FEATURE (V8R)) - SYSREG ("prlar10_el2", CPENC (3,4,6,13,1), F_ARCHEXT, AARCH64_FEATURE (V8R)) - SYSREG ("prlar11_el1", CPENC (3,0,6,13,5), F_ARCHEXT, AARCH64_FEATURE (V8R)) - SYSREG ("prlar11_el2", CPENC (3,4,6,13,5), F_ARCHEXT, AARCH64_FEATURE (V8R)) - SYSREG ("prlar12_el1", CPENC (3,0,6,14,1), F_ARCHEXT, AARCH64_FEATURE (V8R)) - SYSREG ("prlar12_el2", CPENC (3,4,6,14,1), F_ARCHEXT, AARCH64_FEATURE (V8R)) - SYSREG ("prlar13_el1", CPENC (3,0,6,14,5), F_ARCHEXT, AARCH64_FEATURE (V8R)) - SYSREG ("prlar13_el2", CPENC (3,4,6,14,5), F_ARCHEXT, AARCH64_FEATURE (V8R)) - SYSREG ("prlar14_el1", CPENC (3,0,6,15,1), F_ARCHEXT, AARCH64_FEATURE (V8R)) - SYSREG ("prlar14_el2", CPENC (3,4,6,15,1), F_ARCHEXT, AARCH64_FEATURE (V8R)) - SYSREG ("prlar15_el1", CPENC (3,0,6,15,5), F_ARCHEXT, AARCH64_FEATURE (V8R)) - SYSREG ("prlar15_el2", CPENC (3,4,6,15,5), F_ARCHEXT, AARCH64_FEATURE (V8R)) - SYSREG ("prlar1_el1", CPENC (3,0,6,8,5), F_ARCHEXT, AARCH64_FEATURE (V8R)) - SYSREG ("prlar1_el2", CPENC (3,4,6,8,5), F_ARCHEXT, AARCH64_FEATURE (V8R)) - SYSREG ("prlar2_el1", CPENC (3,0,6,9,1), F_ARCHEXT, AARCH64_FEATURE (V8R)) - SYSREG ("prlar2_el2", CPENC (3,4,6,9,1), F_ARCHEXT, AARCH64_FEATURE (V8R)) - SYSREG ("prlar3_el1", CPENC (3,0,6,9,5), F_ARCHEXT, AARCH64_FEATURE (V8R)) - SYSREG ("prlar3_el2", CPENC (3,4,6,9,5), F_ARCHEXT, AARCH64_FEATURE (V8R)) - SYSREG ("prlar4_el1", CPENC (3,0,6,10,1), F_ARCHEXT, AARCH64_FEATURE (V8R)) - SYSREG ("prlar4_el2", CPENC (3,4,6,10,1), F_ARCHEXT, AARCH64_FEATURE (V8R)) - SYSREG ("prlar5_el1", CPENC (3,0,6,10,5), F_ARCHEXT, AARCH64_FEATURE (V8R)) - SYSREG ("prlar5_el2", CPENC (3,4,6,10,5), F_ARCHEXT, AARCH64_FEATURE (V8R)) - SYSREG ("prlar6_el1", CPENC (3,0,6,11,1), F_ARCHEXT, AARCH64_FEATURE (V8R)) - SYSREG ("prlar6_el2", CPENC (3,4,6,11,1), F_ARCHEXT, AARCH64_FEATURE (V8R)) - SYSREG ("prlar7_el1", CPENC (3,0,6,11,5), F_ARCHEXT, AARCH64_FEATURE (V8R)) - SYSREG ("prlar7_el2", CPENC (3,4,6,11,5), F_ARCHEXT, AARCH64_FEATURE (V8R)) - SYSREG ("prlar8_el1", CPENC (3,0,6,12,1), F_ARCHEXT, AARCH64_FEATURE (V8R)) - SYSREG ("prlar8_el2", CPENC (3,4,6,12,1), F_ARCHEXT, AARCH64_FEATURE (V8R)) - SYSREG ("prlar9_el1", CPENC (3,0,6,12,5), F_ARCHEXT, AARCH64_FEATURE (V8R)) - SYSREG ("prlar9_el2", CPENC (3,4,6,12,5), F_ARCHEXT, AARCH64_FEATURE (V8R)) - SYSREG ("prlar_el1", CPENC (3,0,6,8,1), F_ARCHEXT, AARCH64_FEATURE (V8R)) - SYSREG ("prlar_el2", CPENC (3,4,6,8,1), F_ARCHEXT, AARCH64_FEATURE (V8R)) - SYSREG ("prselr_el1", CPENC (3,0,6,2,1), F_ARCHEXT, AARCH64_FEATURE (V8R)) - SYSREG ("prselr_el2", CPENC (3,4,6,2,1), F_ARCHEXT, AARCH64_FEATURE (V8R)) - SYSREG ("rcwmask_el1", CPENC (3,0,13,0,6), F_ARCHEXT|F_REG_128, AARCH64_FEATURE (THE)) - SYSREG ("rcwsmask_el1", CPENC (3,0,13,0,3), F_ARCHEXT|F_REG_128, AARCH64_FEATURE (THE)) - SYSREG ("revidr_el1", CPENC (3,0,0,0,6), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("rgsr_el1", CPENC (3,0,1,0,5), F_ARCHEXT, AARCH64_FEATURE (MEMTAG)) - SYSREG ("rmr_el1", CPENC (3,0,12,0,2), 0, AARCH64_NO_FEATURES) - SYSREG ("rmr_el2", CPENC (3,4,12,0,2), 0, AARCH64_NO_FEATURES) - SYSREG ("rmr_el3", CPENC (3,6,12,0,2), 0, AARCH64_NO_FEATURES) - SYSREG ("rndr", CPENC (3,3,2,4,0), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (RNG)) - SYSREG ("rndrrs", CPENC (3,3,2,4,1), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (RNG)) - SYSREG ("rvbar_el1", CPENC (3,0,12,0,1), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("rvbar_el2", CPENC (3,4,12,0,1), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("rvbar_el3", CPENC (3,6,12,0,1), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("scr_el3", CPENC (3,6,1,1,0), 0, AARCH64_NO_FEATURES) - SYSREG ("sctlr_el1", CPENC (3,0,1,0,0), 0, AARCH64_NO_FEATURES) - SYSREG ("sctlr_el12", CPENC (3,5,1,0,0), F_ARCHEXT, AARCH64_FEATURE (V8_1A)) - SYSREG ("sctlr_el2", CPENC (3,4,1,0,0), 0, AARCH64_NO_FEATURES) - SYSREG ("sctlr_el3", CPENC (3,6,1,0,0), 0, AARCH64_NO_FEATURES) - SYSREG ("sctlr2_el1", CPENC (3,0,1,0,3), F_ARCHEXT, AARCH64_FEATURE (SCTLR2)) - SYSREG ("sctlr2_el12", CPENC (3,5,1,0,3), F_ARCHEXT, AARCH64_FEATURE (SCTLR2)) - SYSREG ("sctlr2_el2", CPENC (3,4,1,0,3), F_ARCHEXT, AARCH64_FEATURE (SCTLR2)) - SYSREG ("sctlr2_el3", CPENC (3,6,1,0,3), F_ARCHEXT, AARCH64_FEATURE (SCTLR2)) - SYSREG ("scxtnum_el0", CPENC (3,3,13,0,7), F_ARCHEXT, AARCH64_FEATURE (SCXTNUM)) - SYSREG ("scxtnum_el1", CPENC (3,0,13,0,7), F_ARCHEXT, AARCH64_FEATURE (SCXTNUM)) - SYSREG ("scxtnum_el12", CPENC (3,5,13,0,7), F_ARCHEXT, AARCH64_FEATURE (SCXTNUM)) - SYSREG ("scxtnum_el2", CPENC (3,4,13,0,7), F_ARCHEXT, AARCH64_FEATURE (SCXTNUM)) - SYSREG ("scxtnum_el3", CPENC (3,6,13,0,7), F_ARCHEXT, AARCH64_FEATURE (SCXTNUM)) - SYSREG ("sder32_el2", CPENC (3,4,1,3,1), F_ARCHEXT, AARCH64_FEATURE (V8_4A)) - SYSREG ("sder32_el3", CPENC (3,6,1,1,1), 0, AARCH64_NO_FEATURES) - SYSREG ("smcr_el1", CPENC (3,0,1,2,6), F_ARCHEXT, AARCH64_FEATURE (SME)) - SYSREG ("smcr_el12", CPENC (3,5,1,2,6), F_ARCHEXT, AARCH64_FEATURE (SME)) - SYSREG ("smcr_el2", CPENC (3,4,1,2,6), F_ARCHEXT, AARCH64_FEATURE (SME)) - SYSREG ("smcr_el3", CPENC (3,6,1,2,6), F_ARCHEXT, AARCH64_FEATURE (SME)) - SYSREG ("smidr_el1", CPENC (3,1,0,0,6), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (SME)) - SYSREG ("smpri_el1", CPENC (3,0,1,2,4), F_ARCHEXT, AARCH64_FEATURE (SME)) - SYSREG ("smprimap_el2", CPENC (3,4,1,2,5), F_ARCHEXT, AARCH64_FEATURE (SME)) - SYSREG ("sp_el0", CPENC (3,0,4,1,0), 0, AARCH64_NO_FEATURES) - SYSREG ("sp_el1", CPENC (3,4,4,1,0), 0, AARCH64_NO_FEATURES) - SYSREG ("sp_el2", CPENC (3,6,4,1,0), 0, AARCH64_NO_FEATURES) - SYSREG ("spsel", CPENC (3,0,4,2,0), 0, AARCH64_NO_FEATURES) - SYSREG ("spsr_abt", CPENC (3,4,4,3,1), 0, AARCH64_NO_FEATURES) - SYSREG ("spsr_el1", CPENC (3,0,4,0,0), 0, AARCH64_NO_FEATURES) - SYSREG ("spsr_el12", CPENC (3,5,4,0,0), F_ARCHEXT, AARCH64_FEATURE (V8_1A)) - SYSREG ("spsr_el2", CPENC (3,4,4,0,0), 0, AARCH64_NO_FEATURES) - SYSREG ("spsr_el3", CPENC (3,6,4,0,0), 0, AARCH64_NO_FEATURES) - SYSREG ("spsr_fiq", CPENC (3,4,4,3,3), 0, AARCH64_NO_FEATURES) - SYSREG ("spsr_hyp", CPENC (3,4,4,0,0), F_DEPRECATED, AARCH64_NO_FEATURES) - SYSREG ("spsr_irq", CPENC (3,4,4,3,0), 0, AARCH64_NO_FEATURES) - SYSREG ("spsr_svc", CPENC (3,0,4,0,0), F_DEPRECATED, AARCH64_NO_FEATURES) - SYSREG ("spsr_und", CPENC (3,4,4,3,2), 0, AARCH64_NO_FEATURES) - SYSREG ("ssbs", CPENC (3,3,4,2,6), F_ARCHEXT, AARCH64_FEATURE (SSBS)) - SYSREG ("svcr", CPENC (3,3,4,2,2), F_ARCHEXT, AARCH64_FEATURE (SME)) - SYSREG ("s2pir_el2", CPENC (3,4,10,2,5), F_ARCHEXT, AARCH64_FEATURE (S2PIE)) - SYSREG ("s2por_el1", CPENC (3,0,10,2,5), F_ARCHEXT, AARCH64_FEATURE (S2POE)) - SYSREG ("tco", CPENC (3,3,4,2,7), F_ARCHEXT, AARCH64_FEATURE (MEMTAG)) - SYSREG ("tcr_el1", CPENC (3,0,2,0,2), 0, AARCH64_NO_FEATURES) - SYSREG ("tcr_el12", CPENC (3,5,2,0,2), F_ARCHEXT, AARCH64_FEATURE (V8_1A)) - SYSREG ("tcr_el2", CPENC (3,4,2,0,2), 0, AARCH64_NO_FEATURES) - SYSREG ("tcr_el3", CPENC (3,6,2,0,2), 0, AARCH64_NO_FEATURES) - SYSREG ("tcr2_el1", CPENC (3,0,2,0,3), F_ARCHEXT, AARCH64_FEATURE (TCR2)) - SYSREG ("tcr2_el12", CPENC (3,5,2,0,3), F_ARCHEXT, AARCH64_FEATURE (TCR2)) - SYSREG ("tcr2_el2", CPENC (3,4,2,0,3), F_ARCHEXT, AARCH64_FEATURE (TCR2)) - SYSREG ("teecr32_el1", CPENC (2,2,0,0,0), 0, AARCH64_NO_FEATURES) - SYSREG ("teehbr32_el1", CPENC (2,2,1,0,0), 0, AARCH64_NO_FEATURES) - SYSREG ("tfsr_el1", CPENC (3,0,5,6,0), F_ARCHEXT, AARCH64_FEATURE (MEMTAG)) - SYSREG ("tfsr_el12", CPENC (3,5,5,6,0), F_ARCHEXT, AARCH64_FEATURE (MEMTAG)) - SYSREG ("tfsr_el2", CPENC (3,4,5,6,0), F_ARCHEXT, AARCH64_FEATURE (MEMTAG)) - SYSREG ("tfsr_el3", CPENC (3,6,5,6,0), F_ARCHEXT, AARCH64_FEATURE (MEMTAG)) - SYSREG ("tfsre0_el1", CPENC (3,0,5,6,1), F_ARCHEXT, AARCH64_FEATURE (MEMTAG)) - SYSREG ("tpidr2_el0", CPENC (3,3,13,0,5), F_ARCHEXT, AARCH64_FEATURE (SME)) - SYSREG ("tpidr_el0", CPENC (3,3,13,0,2), 0, AARCH64_NO_FEATURES) - SYSREG ("tpidr_el1", CPENC (3,0,13,0,4), 0, AARCH64_NO_FEATURES) - SYSREG ("tpidr_el2", CPENC (3,4,13,0,2), 0, AARCH64_NO_FEATURES) - SYSREG ("tpidr_el3", CPENC (3,6,13,0,2), 0, AARCH64_NO_FEATURES) - SYSREG ("tpidrro_el0", CPENC (3,3,13,0,3), 0, AARCH64_NO_FEATURES) - SYSREG ("trbbaser_el1", CPENC (3,0,9,11,2), 0, AARCH64_NO_FEATURES) - SYSREG ("trbidr_el1", CPENC (3,0,9,11,7), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("trblimitr_el1", CPENC (3,0,9,11,0), 0, AARCH64_NO_FEATURES) - SYSREG ("trbmar_el1", CPENC (3,0,9,11,4), 0, AARCH64_NO_FEATURES) - SYSREG ("trbptr_el1", CPENC (3,0,9,11,1), 0, AARCH64_NO_FEATURES) - SYSREG ("trbsr_el1", CPENC (3,0,9,11,3), 0, AARCH64_NO_FEATURES) - SYSREG ("trbtrg_el1", CPENC (3,0,9,11,6), 0, AARCH64_NO_FEATURES) - SYSREG ("trcacatr0", CPENC (2,1,2,0,2), 0, AARCH64_NO_FEATURES) - SYSREG ("trcacatr1", CPENC (2,1,2,2,2), 0, AARCH64_NO_FEATURES) - SYSREG ("trcacatr10", CPENC (2,1,2,4,3), 0, AARCH64_NO_FEATURES) - SYSREG ("trcacatr11", CPENC (2,1,2,6,3), 0, AARCH64_NO_FEATURES) - SYSREG ("trcacatr12", CPENC (2,1,2,8,3), 0, AARCH64_NO_FEATURES) - SYSREG ("trcacatr13", CPENC (2,1,2,10,3), 0, AARCH64_NO_FEATURES) - SYSREG ("trcacatr14", CPENC (2,1,2,12,3), 0, AARCH64_NO_FEATURES) - SYSREG ("trcacatr15", CPENC (2,1,2,14,3), 0, AARCH64_NO_FEATURES) - SYSREG ("trcacatr2", CPENC (2,1,2,4,2), 0, AARCH64_NO_FEATURES) - SYSREG ("trcacatr3", CPENC (2,1,2,6,2), 0, AARCH64_NO_FEATURES) - SYSREG ("trcacatr4", CPENC (2,1,2,8,2), 0, AARCH64_NO_FEATURES) - SYSREG ("trcacatr5", CPENC (2,1,2,10,2), 0, AARCH64_NO_FEATURES) - SYSREG ("trcacatr6", CPENC (2,1,2,12,2), 0, AARCH64_NO_FEATURES) - SYSREG ("trcacatr7", CPENC (2,1,2,14,2), 0, AARCH64_NO_FEATURES) - SYSREG ("trcacatr8", CPENC (2,1,2,0,3), 0, AARCH64_NO_FEATURES) - SYSREG ("trcacatr9", CPENC (2,1,2,2,3), 0, AARCH64_NO_FEATURES) - SYSREG ("trcacvr0", CPENC (2,1,2,0,0), 0, AARCH64_NO_FEATURES) - SYSREG ("trcacvr1", CPENC (2,1,2,2,0), 0, AARCH64_NO_FEATURES) - SYSREG ("trcacvr10", CPENC (2,1,2,4,1), 0, AARCH64_NO_FEATURES) - SYSREG ("trcacvr11", CPENC (2,1,2,6,1), 0, AARCH64_NO_FEATURES) - SYSREG ("trcacvr12", CPENC (2,1,2,8,1), 0, AARCH64_NO_FEATURES) - SYSREG ("trcacvr13", CPENC (2,1,2,10,1), 0, AARCH64_NO_FEATURES) - SYSREG ("trcacvr14", CPENC (2,1,2,12,1), 0, AARCH64_NO_FEATURES) - SYSREG ("trcacvr15", CPENC (2,1,2,14,1), 0, AARCH64_NO_FEATURES) - SYSREG ("trcacvr2", CPENC (2,1,2,4,0), 0, AARCH64_NO_FEATURES) - SYSREG ("trcacvr3", CPENC (2,1,2,6,0), 0, AARCH64_NO_FEATURES) - SYSREG ("trcacvr4", CPENC (2,1,2,8,0), 0, AARCH64_NO_FEATURES) - SYSREG ("trcacvr5", CPENC (2,1,2,10,0), 0, AARCH64_NO_FEATURES) - SYSREG ("trcacvr6", CPENC (2,1,2,12,0), 0, AARCH64_NO_FEATURES) - SYSREG ("trcacvr7", CPENC (2,1,2,14,0), 0, AARCH64_NO_FEATURES) - SYSREG ("trcacvr8", CPENC (2,1,2,0,1), 0, AARCH64_NO_FEATURES) - SYSREG ("trcacvr9", CPENC (2,1,2,2,1), 0, AARCH64_NO_FEATURES) - SYSREG ("trcauthstatus", CPENC (2,1,7,14,6), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("trcauxctlr", CPENC (2,1,0,6,0), 0, AARCH64_NO_FEATURES) - SYSREG ("trcbbctlr", CPENC (2,1,0,15,0), 0, AARCH64_NO_FEATURES) - SYSREG ("trcccctlr", CPENC (2,1,0,14,0), 0, AARCH64_NO_FEATURES) - SYSREG ("trccidcctlr0", CPENC (2,1,3,0,2), 0, AARCH64_NO_FEATURES) - SYSREG ("trccidcctlr1", CPENC (2,1,3,1,2), 0, AARCH64_NO_FEATURES) - SYSREG ("trccidcvr0", CPENC (2,1,3,0,0), 0, AARCH64_NO_FEATURES) - SYSREG ("trccidcvr1", CPENC (2,1,3,2,0), 0, AARCH64_NO_FEATURES) - SYSREG ("trccidcvr2", CPENC (2,1,3,4,0), 0, AARCH64_NO_FEATURES) - SYSREG ("trccidcvr3", CPENC (2,1,3,6,0), 0, AARCH64_NO_FEATURES) - SYSREG ("trccidcvr4", CPENC (2,1,3,8,0), 0, AARCH64_NO_FEATURES) - SYSREG ("trccidcvr5", CPENC (2,1,3,10,0), 0, AARCH64_NO_FEATURES) - SYSREG ("trccidcvr6", CPENC (2,1,3,12,0), 0, AARCH64_NO_FEATURES) - SYSREG ("trccidcvr7", CPENC (2,1,3,14,0), 0, AARCH64_NO_FEATURES) - SYSREG ("trccidr0", CPENC (2,1,7,12,7), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("trccidr1", CPENC (2,1,7,13,7), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("trccidr2", CPENC (2,1,7,14,7), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("trccidr3", CPENC (2,1,7,15,7), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("trcclaimclr", CPENC (2,1,7,9,6), 0, AARCH64_NO_FEATURES) - SYSREG ("trcclaimset", CPENC (2,1,7,8,6), 0, AARCH64_NO_FEATURES) - SYSREG ("trccntctlr0", CPENC (2,1,0,4,5), 0, AARCH64_NO_FEATURES) - SYSREG ("trccntctlr1", CPENC (2,1,0,5,5), 0, AARCH64_NO_FEATURES) - SYSREG ("trccntctlr2", CPENC (2,1,0,6,5), 0, AARCH64_NO_FEATURES) - SYSREG ("trccntctlr3", CPENC (2,1,0,7,5), 0, AARCH64_NO_FEATURES) - SYSREG ("trccntrldvr0", CPENC (2,1,0,0,5), 0, AARCH64_NO_FEATURES) - SYSREG ("trccntrldvr1", CPENC (2,1,0,1,5), 0, AARCH64_NO_FEATURES) - SYSREG ("trccntrldvr2", CPENC (2,1,0,2,5), 0, AARCH64_NO_FEATURES) - SYSREG ("trccntrldvr3", CPENC (2,1,0,3,5), 0, AARCH64_NO_FEATURES) - SYSREG ("trccntvr0", CPENC (2,1,0,8,5), 0, AARCH64_NO_FEATURES) - SYSREG ("trccntvr1", CPENC (2,1,0,9,5), 0, AARCH64_NO_FEATURES) - SYSREG ("trccntvr2", CPENC (2,1,0,10,5), 0, AARCH64_NO_FEATURES) - SYSREG ("trccntvr3", CPENC (2,1,0,11,5), 0, AARCH64_NO_FEATURES) - SYSREG ("trcconfigr", CPENC (2,1,0,4,0), 0, AARCH64_NO_FEATURES) - SYSREG ("trcdevaff0", CPENC (2,1,7,10,6), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("trcdevaff1", CPENC (2,1,7,11,6), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("trcdevarch", CPENC (2,1,7,15,6), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("trcdevid", CPENC (2,1,7,2,7), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("trcdevtype", CPENC (2,1,7,3,7), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("trcdvcmr0", CPENC (2,1,2,0,6), 0, AARCH64_NO_FEATURES) - SYSREG ("trcdvcmr1", CPENC (2,1,2,4,6), 0, AARCH64_NO_FEATURES) - SYSREG ("trcdvcmr2", CPENC (2,1,2,8,6), 0, AARCH64_NO_FEATURES) - SYSREG ("trcdvcmr3", CPENC (2,1,2,12,6), 0, AARCH64_NO_FEATURES) - SYSREG ("trcdvcmr4", CPENC (2,1,2,0,7), 0, AARCH64_NO_FEATURES) - SYSREG ("trcdvcmr5", CPENC (2,1,2,4,7), 0, AARCH64_NO_FEATURES) - SYSREG ("trcdvcmr6", CPENC (2,1,2,8,7), 0, AARCH64_NO_FEATURES) - SYSREG ("trcdvcmr7", CPENC (2,1,2,12,7), 0, AARCH64_NO_FEATURES) - SYSREG ("trcdvcvr0", CPENC (2,1,2,0,4), 0, AARCH64_NO_FEATURES) - SYSREG ("trcdvcvr1", CPENC (2,1,2,4,4), 0, AARCH64_NO_FEATURES) - SYSREG ("trcdvcvr2", CPENC (2,1,2,8,4), 0, AARCH64_NO_FEATURES) - SYSREG ("trcdvcvr3", CPENC (2,1,2,12,4), 0, AARCH64_NO_FEATURES) - SYSREG ("trcdvcvr4", CPENC (2,1,2,0,5), 0, AARCH64_NO_FEATURES) - SYSREG ("trcdvcvr5", CPENC (2,1,2,4,5), 0, AARCH64_NO_FEATURES) - SYSREG ("trcdvcvr6", CPENC (2,1,2,8,5), 0, AARCH64_NO_FEATURES) - SYSREG ("trcdvcvr7", CPENC (2,1,2,12,5), 0, AARCH64_NO_FEATURES) - SYSREG ("trceventctl0r", CPENC (2,1,0,8,0), 0, AARCH64_NO_FEATURES) - SYSREG ("trceventctl1r", CPENC (2,1,0,9,0), 0, AARCH64_NO_FEATURES) - SYSREG ("trcextinselr", CPENC (2,1,0,8,4), F_REG_ALIAS, AARCH64_NO_FEATURES) - SYSREG ("trcextinselr0", CPENC (2,1,0,8,4), 0, AARCH64_NO_FEATURES) - SYSREG ("trcextinselr1", CPENC (2,1,0,9,4), 0, AARCH64_NO_FEATURES) - SYSREG ("trcextinselr2", CPENC (2,1,0,10,4), 0, AARCH64_NO_FEATURES) - SYSREG ("trcextinselr3", CPENC (2,1,0,11,4), 0, AARCH64_NO_FEATURES) - SYSREG ("trcidr0", CPENC (2,1,0,8,7), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("trcidr1", CPENC (2,1,0,9,7), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("trcidr10", CPENC (2,1,0,2,6), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("trcidr11", CPENC (2,1,0,3,6), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("trcidr12", CPENC (2,1,0,4,6), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("trcidr13", CPENC (2,1,0,5,6), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("trcidr2", CPENC (2,1,0,10,7), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("trcidr3", CPENC (2,1,0,11,7), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("trcidr4", CPENC (2,1,0,12,7), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("trcidr5", CPENC (2,1,0,13,7), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("trcidr6", CPENC (2,1,0,14,7), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("trcidr7", CPENC (2,1,0,15,7), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("trcidr8", CPENC (2,1,0,0,6), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("trcidr9", CPENC (2,1,0,1,6), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("trcimspec0", CPENC (2,1,0,0,7), 0, AARCH64_NO_FEATURES) - SYSREG ("trcimspec1", CPENC (2,1,0,1,7), 0, AARCH64_NO_FEATURES) - SYSREG ("trcimspec2", CPENC (2,1,0,2,7), 0, AARCH64_NO_FEATURES) - SYSREG ("trcimspec3", CPENC (2,1,0,3,7), 0, AARCH64_NO_FEATURES) - SYSREG ("trcimspec4", CPENC (2,1,0,4,7), 0, AARCH64_NO_FEATURES) - SYSREG ("trcimspec5", CPENC (2,1,0,5,7), 0, AARCH64_NO_FEATURES) - SYSREG ("trcimspec6", CPENC (2,1,0,6,7), 0, AARCH64_NO_FEATURES) - SYSREG ("trcimspec7", CPENC (2,1,0,7,7), 0, AARCH64_NO_FEATURES) - SYSREG ("trcitctrl", CPENC (2,1,7,0,4), 0, AARCH64_NO_FEATURES) - SYSREG ("trcitecr_el1", CPENC (3,0,1,2,3), F_ARCHEXT, AARCH64_FEATURE (ITE)) - SYSREG ("trcitecr_el12", CPENC (3,5,1,2,3), F_ARCHEXT, AARCH64_FEATURE (ITE)) - SYSREG ("trcitecr_el2", CPENC (3,4,1,2,3), F_ARCHEXT, AARCH64_FEATURE (ITE)) - SYSREG ("trciteedcr", CPENC (2,1,0,2,1), F_ARCHEXT, AARCH64_FEATURE (ITE)) - SYSREG ("trclar", CPENC (2,1,7,12,6), F_REG_WRITE, AARCH64_NO_FEATURES) - SYSREG ("trclsr", CPENC (2,1,7,13,6), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("trcoslar", CPENC (2,1,1,0,4), F_REG_WRITE, AARCH64_NO_FEATURES) - SYSREG ("trcoslsr", CPENC (2,1,1,1,4), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("trcpdcr", CPENC (2,1,1,4,4), 0, AARCH64_NO_FEATURES) - SYSREG ("trcpdsr", CPENC (2,1,1,5,4), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("trcpidr0", CPENC (2,1,7,8,7), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("trcpidr1", CPENC (2,1,7,9,7), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("trcpidr2", CPENC (2,1,7,10,7), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("trcpidr3", CPENC (2,1,7,11,7), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("trcpidr4", CPENC (2,1,7,4,7), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("trcpidr5", CPENC (2,1,7,5,7), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("trcpidr6", CPENC (2,1,7,6,7), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("trcpidr7", CPENC (2,1,7,7,7), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("trcprgctlr", CPENC (2,1,0,1,0), 0, AARCH64_NO_FEATURES) - SYSREG ("trcprocselr", CPENC (2,1,0,2,0), 0, AARCH64_NO_FEATURES) - SYSREG ("trcqctlr", CPENC (2,1,0,1,1), 0, AARCH64_NO_FEATURES) - SYSREG ("trcrsctlr10", CPENC (2,1,1,10,0), 0, AARCH64_NO_FEATURES) - SYSREG ("trcrsctlr11", CPENC (2,1,1,11,0), 0, AARCH64_NO_FEATURES) - SYSREG ("trcrsctlr12", CPENC (2,1,1,12,0), 0, AARCH64_NO_FEATURES) - SYSREG ("trcrsctlr13", CPENC (2,1,1,13,0), 0, AARCH64_NO_FEATURES) - SYSREG ("trcrsctlr14", CPENC (2,1,1,14,0), 0, AARCH64_NO_FEATURES) - SYSREG ("trcrsctlr15", CPENC (2,1,1,15,0), 0, AARCH64_NO_FEATURES) - SYSREG ("trcrsctlr16", CPENC (2,1,1,0,1), 0, AARCH64_NO_FEATURES) - SYSREG ("trcrsctlr17", CPENC (2,1,1,1,1), 0, AARCH64_NO_FEATURES) - SYSREG ("trcrsctlr18", CPENC (2,1,1,2,1), 0, AARCH64_NO_FEATURES) - SYSREG ("trcrsctlr19", CPENC (2,1,1,3,1), 0, AARCH64_NO_FEATURES) - SYSREG ("trcrsctlr2", CPENC (2,1,1,2,0), 0, AARCH64_NO_FEATURES) - SYSREG ("trcrsctlr20", CPENC (2,1,1,4,1), 0, AARCH64_NO_FEATURES) - SYSREG ("trcrsctlr21", CPENC (2,1,1,5,1), 0, AARCH64_NO_FEATURES) - SYSREG ("trcrsctlr22", CPENC (2,1,1,6,1), 0, AARCH64_NO_FEATURES) - SYSREG ("trcrsctlr23", CPENC (2,1,1,7,1), 0, AARCH64_NO_FEATURES) - SYSREG ("trcrsctlr24", CPENC (2,1,1,8,1), 0, AARCH64_NO_FEATURES) - SYSREG ("trcrsctlr25", CPENC (2,1,1,9,1), 0, AARCH64_NO_FEATURES) - SYSREG ("trcrsctlr26", CPENC (2,1,1,10,1), 0, AARCH64_NO_FEATURES) - SYSREG ("trcrsctlr27", CPENC (2,1,1,11,1), 0, AARCH64_NO_FEATURES) - SYSREG ("trcrsctlr28", CPENC (2,1,1,12,1), 0, AARCH64_NO_FEATURES) - SYSREG ("trcrsctlr29", CPENC (2,1,1,13,1), 0, AARCH64_NO_FEATURES) - SYSREG ("trcrsctlr3", CPENC (2,1,1,3,0), 0, AARCH64_NO_FEATURES) - SYSREG ("trcrsctlr30", CPENC (2,1,1,14,1), 0, AARCH64_NO_FEATURES) - SYSREG ("trcrsctlr31", CPENC (2,1,1,15,1), 0, AARCH64_NO_FEATURES) - SYSREG ("trcrsctlr4", CPENC (2,1,1,4,0), 0, AARCH64_NO_FEATURES) - SYSREG ("trcrsctlr5", CPENC (2,1,1,5,0), 0, AARCH64_NO_FEATURES) - SYSREG ("trcrsctlr6", CPENC (2,1,1,6,0), 0, AARCH64_NO_FEATURES) - SYSREG ("trcrsctlr7", CPENC (2,1,1,7,0), 0, AARCH64_NO_FEATURES) - SYSREG ("trcrsctlr8", CPENC (2,1,1,8,0), 0, AARCH64_NO_FEATURES) - SYSREG ("trcrsctlr9", CPENC (2,1,1,9,0), 0, AARCH64_NO_FEATURES) - SYSREG ("trcrsr", CPENC (2,1,0,10,0), 0, AARCH64_NO_FEATURES) - SYSREG ("trcseqevr0", CPENC (2,1,0,0,4), 0, AARCH64_NO_FEATURES) - SYSREG ("trcseqevr1", CPENC (2,1,0,1,4), 0, AARCH64_NO_FEATURES) - SYSREG ("trcseqevr2", CPENC (2,1,0,2,4), 0, AARCH64_NO_FEATURES) - SYSREG ("trcseqrstevr", CPENC (2,1,0,6,4), 0, AARCH64_NO_FEATURES) - SYSREG ("trcseqstr", CPENC (2,1,0,7,4), 0, AARCH64_NO_FEATURES) - SYSREG ("trcssccr0", CPENC (2,1,1,0,2), 0, AARCH64_NO_FEATURES) - SYSREG ("trcssccr1", CPENC (2,1,1,1,2), 0, AARCH64_NO_FEATURES) - SYSREG ("trcssccr2", CPENC (2,1,1,2,2), 0, AARCH64_NO_FEATURES) - SYSREG ("trcssccr3", CPENC (2,1,1,3,2), 0, AARCH64_NO_FEATURES) - SYSREG ("trcssccr4", CPENC (2,1,1,4,2), 0, AARCH64_NO_FEATURES) - SYSREG ("trcssccr5", CPENC (2,1,1,5,2), 0, AARCH64_NO_FEATURES) - SYSREG ("trcssccr6", CPENC (2,1,1,6,2), 0, AARCH64_NO_FEATURES) - SYSREG ("trcssccr7", CPENC (2,1,1,7,2), 0, AARCH64_NO_FEATURES) - SYSREG ("trcsscsr0", CPENC (2,1,1,8,2), 0, AARCH64_NO_FEATURES) - SYSREG ("trcsscsr1", CPENC (2,1,1,9,2), 0, AARCH64_NO_FEATURES) - SYSREG ("trcsscsr2", CPENC (2,1,1,10,2), 0, AARCH64_NO_FEATURES) - SYSREG ("trcsscsr3", CPENC (2,1,1,11,2), 0, AARCH64_NO_FEATURES) - SYSREG ("trcsscsr4", CPENC (2,1,1,12,2), 0, AARCH64_NO_FEATURES) - SYSREG ("trcsscsr5", CPENC (2,1,1,13,2), 0, AARCH64_NO_FEATURES) - SYSREG ("trcsscsr6", CPENC (2,1,1,14,2), 0, AARCH64_NO_FEATURES) - SYSREG ("trcsscsr7", CPENC (2,1,1,15,2), 0, AARCH64_NO_FEATURES) - SYSREG ("trcsspcicr0", CPENC (2,1,1,0,3), 0, AARCH64_NO_FEATURES) - SYSREG ("trcsspcicr1", CPENC (2,1,1,1,3), 0, AARCH64_NO_FEATURES) - SYSREG ("trcsspcicr2", CPENC (2,1,1,2,3), 0, AARCH64_NO_FEATURES) - SYSREG ("trcsspcicr3", CPENC (2,1,1,3,3), 0, AARCH64_NO_FEATURES) - SYSREG ("trcsspcicr4", CPENC (2,1,1,4,3), 0, AARCH64_NO_FEATURES) - SYSREG ("trcsspcicr5", CPENC (2,1,1,5,3), 0, AARCH64_NO_FEATURES) - SYSREG ("trcsspcicr6", CPENC (2,1,1,6,3), 0, AARCH64_NO_FEATURES) - SYSREG ("trcsspcicr7", CPENC (2,1,1,7,3), 0, AARCH64_NO_FEATURES) - SYSREG ("trcstallctlr", CPENC (2,1,0,11,0), 0, AARCH64_NO_FEATURES) - SYSREG ("trcstatr", CPENC (2,1,0,3,0), F_REG_READ, AARCH64_NO_FEATURES) - SYSREG ("trcsyncpr", CPENC (2,1,0,13,0), 0, AARCH64_NO_FEATURES) - SYSREG ("trctraceidr", CPENC (2,1,0,0,1), 0, AARCH64_NO_FEATURES) - SYSREG ("trctsctlr", CPENC (2,1,0,12,0), 0, AARCH64_NO_FEATURES) - SYSREG ("trcvdarcctlr", CPENC (2,1,0,10,2), 0, AARCH64_NO_FEATURES) - SYSREG ("trcvdctlr", CPENC (2,1,0,8,2), 0, AARCH64_NO_FEATURES) - SYSREG ("trcvdsacctlr", CPENC (2,1,0,9,2), 0, AARCH64_NO_FEATURES) - SYSREG ("trcvictlr", CPENC (2,1,0,0,2), 0, AARCH64_NO_FEATURES) - SYSREG ("trcviiectlr", CPENC (2,1,0,1,2), 0, AARCH64_NO_FEATURES) - SYSREG ("trcvipcssctlr", CPENC (2,1,0,3,2), 0, AARCH64_NO_FEATURES) - SYSREG ("trcvissctlr", CPENC (2,1,0,2,2), 0, AARCH64_NO_FEATURES) - SYSREG ("trcvmidcctlr0", CPENC (2,1,3,2,2), 0, AARCH64_NO_FEATURES) - SYSREG ("trcvmidcctlr1", CPENC (2,1,3,3,2), 0, AARCH64_NO_FEATURES) - SYSREG ("trcvmidcvr0", CPENC (2,1,3,0,1), 0, AARCH64_NO_FEATURES) - SYSREG ("trcvmidcvr1", CPENC (2,1,3,2,1), 0, AARCH64_NO_FEATURES) - SYSREG ("trcvmidcvr2", CPENC (2,1,3,4,1), 0, AARCH64_NO_FEATURES) - SYSREG ("trcvmidcvr3", CPENC (2,1,3,6,1), 0, AARCH64_NO_FEATURES) - SYSREG ("trcvmidcvr4", CPENC (2,1,3,8,1), 0, AARCH64_NO_FEATURES) - SYSREG ("trcvmidcvr5", CPENC (2,1,3,10,1), 0, AARCH64_NO_FEATURES) - SYSREG ("trcvmidcvr6", CPENC (2,1,3,12,1), 0, AARCH64_NO_FEATURES) - SYSREG ("trcvmidcvr7", CPENC (2,1,3,14,1), 0, AARCH64_NO_FEATURES) - SYSREG ("trfcr_el1", CPENC (3,0,1,2,1), F_ARCHEXT, AARCH64_FEATURE (V8_4A)) - SYSREG ("trfcr_el12", CPENC (3,5,1,2,1), F_ARCHEXT, AARCH64_FEATURE (V8_4A)) - SYSREG ("trfcr_el2", CPENC (3,4,1,2,1), F_ARCHEXT, AARCH64_FEATURE (V8_4A)) - SYSREG ("ttbr0_el1", CPENC (3,0,2,0,0), F_REG_128, AARCH64_NO_FEATURES) - SYSREG ("ttbr0_el12", CPENC (3,5,2,0,0), F_ARCHEXT|F_REG_128, AARCH64_FEATURE (V8_1A)) - SYSREG ("ttbr0_el2", CPENC (3,4,2,0,0), F_ARCHEXT|F_REG_128, AARCH64_FEATURE (V8A)) - SYSREG ("ttbr0_el3", CPENC (3,6,2,0,0), 0, AARCH64_NO_FEATURES) - SYSREG ("ttbr1_el1", CPENC (3,0,2,0,1), F_REG_128, AARCH64_NO_FEATURES) - SYSREG ("ttbr1_el12", CPENC (3,5,2,0,1), F_ARCHEXT|F_REG_128, AARCH64_FEATURE (V8_1A)) - SYSREG ("ttbr1_el2", CPENC (3,4,2,0,1), F_ARCHEXT|F_REG_128, AARCH64_FEATURES (2, V8A, V8_1A)) - SYSREG ("uao", CPENC (3,0,4,2,4), F_ARCHEXT, AARCH64_FEATURE (V8_2A)) - SYSREG ("vbar_el1", CPENC (3,0,12,0,0), 0, AARCH64_NO_FEATURES) - SYSREG ("vbar_el12", CPENC (3,5,12,0,0), F_ARCHEXT, AARCH64_FEATURE (V8_1A)) - SYSREG ("vbar_el2", CPENC (3,4,12,0,0), 0, AARCH64_NO_FEATURES) - SYSREG ("vbar_el3", CPENC (3,6,12,0,0), 0, AARCH64_NO_FEATURES) - SYSREG ("vdisr_el2", CPENC (3,4,12,1,1), F_ARCHEXT, AARCH64_FEATURE (RAS)) - SYSREG ("vmecid_a_el2", CPENC (3,4,10,9,1), F_ARCHEXT, AARCH64_FEATURE (V8_7A)) - SYSREG ("vmecid_p_el2", CPENC (3,4,10,9,0), F_ARCHEXT, AARCH64_FEATURE (V8_7A)) - SYSREG ("vmpidr_el2", CPENC (3,4,0,0,5), 0, AARCH64_NO_FEATURES) - SYSREG ("vncr_el2", CPENC (3,4,2,2,0), F_ARCHEXT, AARCH64_FEATURE (V8_4A)) - SYSREG ("vpidr_el2", CPENC (3,4,0,0,0), 0, AARCH64_NO_FEATURES) - SYSREG ("vsctlr_el2", CPENC (3,4,2,0,0), F_ARCHEXT, AARCH64_FEATURE (V8R)) - SYSREG ("vsesr_el2", CPENC (3,4,5,2,3), F_ARCHEXT, AARCH64_FEATURE (RAS)) - SYSREG ("vstcr_el2", CPENC (3,4,2,6,2), F_ARCHEXT, AARCH64_FEATURE (V8_4A)) - SYSREG ("vsttbr_el2", CPENC (3,4,2,6,0), F_ARCHEXT, AARCH64_FEATURES (2, V8A, V8_4A)) - SYSREG ("vtcr_el2", CPENC (3,4,2,1,2), 0, AARCH64_NO_FEATURES) - SYSREG ("vttbr_el2", CPENC (3,4,2,1,0), F_ARCHEXT|F_REG_128, AARCH64_FEATURE (V8A)) - SYSREG ("zcr_el1", CPENC (3,0,1,2,0), F_ARCHEXT, AARCH64_FEATURE (SVE)) - SYSREG ("zcr_el12", CPENC (3,5,1,2,0), F_ARCHEXT, AARCH64_FEATURE (SVE)) - SYSREG ("zcr_el2", CPENC (3,4,1,2,0), F_ARCHEXT, AARCH64_FEATURE (SVE)) - SYSREG ("zcr_el3", CPENC (3,6,1,2,0), F_ARCHEXT, AARCH64_FEATURE (SVE)) + SYSREG ("accdata_el1", CPENC (3,0,13,0,5), 0, AARCH64_FEATURE (LS64)) /* LS64_ACCDATA */ + SYSREG ("actlr_el1", CPENC (3,0,1,0,1), 0, AARCH64_NO_FEATURES) + SYSREG ("actlr_el12", CPENC (3,5,1,0,1), 0, AARCH64_NO_FEATURES) + SYSREG ("actlr_el2", CPENC (3,4,1,0,1), 0, AARCH64_NO_FEATURES) + SYSREG ("actlr_el3", CPENC (3,6,1,0,1), 0, AARCH64_NO_FEATURES) + SYSREG ("actlralias_el1", CPENC (3,0,1,4,5), 0, AARCH64_FEATURE (V9_5A)) /* SRMASK */ + SYSREG ("actlrmask_el1", CPENC (3,0,1,4,1), 0, AARCH64_FEATURE (V9_5A)) /* SRMASK */ + SYSREG ("actlrmask_el12", CPENC (3,5,1,4,1), 0, AARCH64_FEATURE (V9_5A)) /* SRMASK */ + SYSREG ("actlrmask_el2", CPENC (3,4,1,4,1), 0, AARCH64_FEATURE (V9_5A)) /* SRMASK */ + SYSREG ("afsr0_el1", CPENC (3,0,5,1,0), 0, AARCH64_NO_FEATURES) + SYSREG ("afsr0_el12", CPENC (3,5,5,1,0), 0, AARCH64_NO_FEATURES) + SYSREG ("afsr0_el2", CPENC (3,4,5,1,0), 0, AARCH64_NO_FEATURES) + SYSREG ("afsr0_el3", CPENC (3,6,5,1,0), 0, AARCH64_NO_FEATURES) + SYSREG ("afsr1_el1", CPENC (3,0,5,1,1), 0, AARCH64_NO_FEATURES) + SYSREG ("afsr1_el12", CPENC (3,5,5,1,1), 0, AARCH64_NO_FEATURES) + SYSREG ("afsr1_el2", CPENC (3,4,5,1,1), 0, AARCH64_NO_FEATURES) + SYSREG ("afsr1_el3", CPENC (3,6,5,1,1), 0, AARCH64_NO_FEATURES) + SYSREG ("aidr_el1", CPENC (3,1,0,0,7), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("allint", CPENC (3,0,4,3,0), 0, AARCH64_FEATURE (V8_7A)) /* NMI */ + SYSREG ("amair_el1", CPENC (3,0,10,3,0), 0, AARCH64_NO_FEATURES) + SYSREG ("amair_el12", CPENC (3,5,10,3,0), 0, AARCH64_NO_FEATURES) + SYSREG ("amair_el2", CPENC (3,4,10,3,0), 0, AARCH64_NO_FEATURES) + SYSREG ("amair_el3", CPENC (3,6,10,3,0), 0, AARCH64_NO_FEATURES) + SYSREG ("amair2_el1", CPENC (3,0,10,3,1), 0, AARCH64_FEATURE (V8_8A)) /* AIE */ + SYSREG ("amair2_el12", CPENC (3,5,10,3,1), 0, AARCH64_FEATURE (V8_8A)) /* AIE */ + SYSREG ("amair2_el2", CPENC (3,4,10,3,1), 0, AARCH64_FEATURE (V8_8A)) /* AIE */ + SYSREG ("amair2_el3", CPENC (3,6,10,3,1), 0, AARCH64_FEATURE (V8_8A)) /* AIE */ + SYSREG ("amcfgr_el0", CPENC (3,3,13,2,1), F_REG_READ, AARCH64_FEATURE (V8_3A)) /* AMUv1 */ + SYSREG ("amcg1idr_el0", CPENC (3,3,13,2,6), F_REG_READ, AARCH64_FEATURE (V8_5A)) /* AMUv1p1 */ + SYSREG ("amcgcr_el0", CPENC (3,3,13,2,2), F_REG_READ, AARCH64_FEATURE (V8_3A)) /* AMUv1 */ + SYSREG ("amcntenclr0_el0", CPENC (3,3,13,2,4), 0, AARCH64_FEATURE (V8_3A)) /* AMUv1 */ + SYSREG ("amcntenclr1_el0", CPENC (3,3,13,3,0), 0, AARCH64_FEATURE (V8_3A)) /* AMUv1 */ + SYSREG ("amcntenset0_el0", CPENC (3,3,13,2,5), 0, AARCH64_FEATURE (V8_3A)) /* AMUv1 */ + SYSREG ("amcntenset1_el0", CPENC (3,3,13,3,1), 0, AARCH64_FEATURE (V8_3A)) /* AMUv1 */ + SYSREG ("amcr_el0", CPENC (3,3,13,2,0), 0, AARCH64_FEATURE (V8_3A)) /* AMUv1 */ + SYSREG ("amevcntr00_el0", CPENC (3,3,13,4,0), 0, AARCH64_FEATURE (V8_3A)) /* AMUv1 */ + SYSREG ("amevcntr01_el0", CPENC (3,3,13,4,1), 0, AARCH64_FEATURE (V8_3A)) /* AMUv1 */ + SYSREG ("amevcntr02_el0", CPENC (3,3,13,4,2), 0, AARCH64_FEATURE (V8_3A)) /* AMUv1 */ + SYSREG ("amevcntr03_el0", CPENC (3,3,13,4,3), 0, AARCH64_FEATURE (V8_3A)) /* AMUv1 */ + SYSREG ("amevcntr10_el0", CPENC (3,3,13,12,0), 0, AARCH64_FEATURE (V8_3A)) /* AMUv1 */ + SYSREG ("amevcntr110_el0", CPENC (3,3,13,13,2), 0, AARCH64_FEATURE (V8_3A)) /* AMUv1 */ + SYSREG ("amevcntr111_el0", CPENC (3,3,13,13,3), 0, AARCH64_FEATURE (V8_3A)) /* AMUv1 */ + SYSREG ("amevcntr112_el0", CPENC (3,3,13,13,4), 0, AARCH64_FEATURE (V8_3A)) /* AMUv1 */ + SYSREG ("amevcntr113_el0", CPENC (3,3,13,13,5), 0, AARCH64_FEATURE (V8_3A)) /* AMUv1 */ + SYSREG ("amevcntr114_el0", CPENC (3,3,13,13,6), 0, AARCH64_FEATURE (V8_3A)) /* AMUv1 */ + SYSREG ("amevcntr115_el0", CPENC (3,3,13,13,7), 0, AARCH64_FEATURE (V8_3A)) /* AMUv1 */ + SYSREG ("amevcntr11_el0", CPENC (3,3,13,12,1), 0, AARCH64_FEATURE (V8_3A)) /* AMUv1 */ + SYSREG ("amevcntr12_el0", CPENC (3,3,13,12,2), 0, AARCH64_FEATURE (V8_3A)) /* AMUv1 */ + SYSREG ("amevcntr13_el0", CPENC (3,3,13,12,3), 0, AARCH64_FEATURE (V8_3A)) /* AMUv1 */ + SYSREG ("amevcntr14_el0", CPENC (3,3,13,12,4), 0, AARCH64_FEATURE (V8_3A)) /* AMUv1 */ + SYSREG ("amevcntr15_el0", CPENC (3,3,13,12,5), 0, AARCH64_FEATURE (V8_3A)) /* AMUv1 */ + SYSREG ("amevcntr16_el0", CPENC (3,3,13,12,6), 0, AARCH64_FEATURE (V8_3A)) /* AMUv1 */ + SYSREG ("amevcntr17_el0", CPENC (3,3,13,12,7), 0, AARCH64_FEATURE (V8_3A)) /* AMUv1 */ + SYSREG ("amevcntr18_el0", CPENC (3,3,13,13,0), 0, AARCH64_FEATURE (V8_3A)) /* AMUv1 */ + SYSREG ("amevcntr19_el0", CPENC (3,3,13,13,1), 0, AARCH64_FEATURE (V8_3A)) /* AMUv1 */ + SYSREG ("amevcntvoff00_el2", CPENC (3,4,13,8,0), 0, AARCH64_FEATURE (V8_5A)) /* AMUv1p1 */ + SYSREG ("amevcntvoff010_el2", CPENC (3,4,13,9,2), 0, AARCH64_FEATURE (V8_5A)) /* AMUv1p1 */ + SYSREG ("amevcntvoff011_el2", CPENC (3,4,13,9,3), 0, AARCH64_FEATURE (V8_5A)) /* AMUv1p1 */ + SYSREG ("amevcntvoff012_el2", CPENC (3,4,13,9,4), 0, AARCH64_FEATURE (V8_5A)) /* AMUv1p1 */ + SYSREG ("amevcntvoff013_el2", CPENC (3,4,13,9,5), 0, AARCH64_FEATURE (V8_5A)) /* AMUv1p1 */ + SYSREG ("amevcntvoff014_el2", CPENC (3,4,13,9,6), 0, AARCH64_FEATURE (V8_5A)) /* AMUv1p1 */ + SYSREG ("amevcntvoff015_el2", CPENC (3,4,13,9,7), 0, AARCH64_FEATURE (V8_5A)) /* AMUv1p1 */ + SYSREG ("amevcntvoff01_el2", CPENC (3,4,13,8,1), 0, AARCH64_FEATURE (V8_5A)) /* AMUv1p1 */ + SYSREG ("amevcntvoff02_el2", CPENC (3,4,13,8,2), 0, AARCH64_FEATURE (V8_5A)) /* AMUv1p1 */ + SYSREG ("amevcntvoff03_el2", CPENC (3,4,13,8,3), 0, AARCH64_FEATURE (V8_5A)) /* AMUv1p1 */ + SYSREG ("amevcntvoff04_el2", CPENC (3,4,13,8,4), 0, AARCH64_FEATURE (V8_5A)) /* AMUv1p1 */ + SYSREG ("amevcntvoff05_el2", CPENC (3,4,13,8,5), 0, AARCH64_FEATURE (V8_5A)) /* AMUv1p1 */ + SYSREG ("amevcntvoff06_el2", CPENC (3,4,13,8,6), 0, AARCH64_FEATURE (V8_5A)) /* AMUv1p1 */ + SYSREG ("amevcntvoff07_el2", CPENC (3,4,13,8,7), 0, AARCH64_FEATURE (V8_5A)) /* AMUv1p1 */ + SYSREG ("amevcntvoff08_el2", CPENC (3,4,13,9,0), 0, AARCH64_FEATURE (V8_5A)) /* AMUv1p1 */ + SYSREG ("amevcntvoff09_el2", CPENC (3,4,13,9,1), 0, AARCH64_FEATURE (V8_5A)) /* AMUv1p1 */ + SYSREG ("amevcntvoff10_el2", CPENC (3,4,13,10,0), 0, AARCH64_FEATURE (V8_5A)) /* AMUv1p1 */ + SYSREG ("amevcntvoff110_el2", CPENC (3,4,13,11,2), 0, AARCH64_FEATURE (V8_5A)) /* AMUv1p1 */ + SYSREG ("amevcntvoff111_el2", CPENC (3,4,13,11,3), 0, AARCH64_FEATURE (V8_5A)) /* AMUv1p1 */ + SYSREG ("amevcntvoff112_el2", CPENC (3,4,13,11,4), 0, AARCH64_FEATURE (V8_5A)) /* AMUv1p1 */ + SYSREG ("amevcntvoff113_el2", CPENC (3,4,13,11,5), 0, AARCH64_FEATURE (V8_5A)) /* AMUv1p1 */ + SYSREG ("amevcntvoff114_el2", CPENC (3,4,13,11,6), 0, AARCH64_FEATURE (V8_5A)) /* AMUv1p1 */ + SYSREG ("amevcntvoff115_el2", CPENC (3,4,13,11,7), 0, AARCH64_FEATURE (V8_5A)) /* AMUv1p1 */ + SYSREG ("amevcntvoff11_el2", CPENC (3,4,13,10,1), 0, AARCH64_FEATURE (V8_5A)) /* AMUv1p1 */ + SYSREG ("amevcntvoff12_el2", CPENC (3,4,13,10,2), 0, AARCH64_FEATURE (V8_5A)) /* AMUv1p1 */ + SYSREG ("amevcntvoff13_el2", CPENC (3,4,13,10,3), 0, AARCH64_FEATURE (V8_5A)) /* AMUv1p1 */ + SYSREG ("amevcntvoff14_el2", CPENC (3,4,13,10,4), 0, AARCH64_FEATURE (V8_5A)) /* AMUv1p1 */ + SYSREG ("amevcntvoff15_el2", CPENC (3,4,13,10,5), 0, AARCH64_FEATURE (V8_5A)) /* AMUv1p1 */ + SYSREG ("amevcntvoff16_el2", CPENC (3,4,13,10,6), 0, AARCH64_FEATURE (V8_5A)) /* AMUv1p1 */ + SYSREG ("amevcntvoff17_el2", CPENC (3,4,13,10,7), 0, AARCH64_FEATURE (V8_5A)) /* AMUv1p1 */ + SYSREG ("amevcntvoff18_el2", CPENC (3,4,13,11,0), 0, AARCH64_FEATURE (V8_5A)) /* AMUv1p1 */ + SYSREG ("amevcntvoff19_el2", CPENC (3,4,13,11,1), 0, AARCH64_FEATURE (V8_5A)) /* AMUv1p1 */ + SYSREG ("amevtyper00_el0", CPENC (3,3,13,6,0), F_REG_READ, AARCH64_FEATURE (V8_3A)) /* AMUv1 */ + SYSREG ("amevtyper01_el0", CPENC (3,3,13,6,1), F_REG_READ, AARCH64_FEATURE (V8_3A)) /* AMUv1 */ + SYSREG ("amevtyper02_el0", CPENC (3,3,13,6,2), F_REG_READ, AARCH64_FEATURE (V8_3A)) /* AMUv1 */ + SYSREG ("amevtyper03_el0", CPENC (3,3,13,6,3), F_REG_READ, AARCH64_FEATURE (V8_3A)) /* AMUv1 */ + SYSREG ("amevtyper10_el0", CPENC (3,3,13,14,0), 0, AARCH64_FEATURE (V8_3A)) /* AMUv1 */ + SYSREG ("amevtyper110_el0", CPENC (3,3,13,15,2), 0, AARCH64_FEATURE (V8_3A)) /* AMUv1 */ + SYSREG ("amevtyper111_el0", CPENC (3,3,13,15,3), 0, AARCH64_FEATURE (V8_3A)) /* AMUv1 */ + SYSREG ("amevtyper112_el0", CPENC (3,3,13,15,4), 0, AARCH64_FEATURE (V8_3A)) /* AMUv1 */ + SYSREG ("amevtyper113_el0", CPENC (3,3,13,15,5), 0, AARCH64_FEATURE (V8_3A)) /* AMUv1 */ + SYSREG ("amevtyper114_el0", CPENC (3,3,13,15,6), 0, AARCH64_FEATURE (V8_3A)) /* AMUv1 */ + SYSREG ("amevtyper115_el0", CPENC (3,3,13,15,7), 0, AARCH64_FEATURE (V8_3A)) /* AMUv1 */ + SYSREG ("amevtyper11_el0", CPENC (3,3,13,14,1), 0, AARCH64_FEATURE (V8_3A)) /* AMUv1 */ + SYSREG ("amevtyper12_el0", CPENC (3,3,13,14,2), 0, AARCH64_FEATURE (V8_3A)) /* AMUv1 */ + SYSREG ("amevtyper13_el0", CPENC (3,3,13,14,3), 0, AARCH64_FEATURE (V8_3A)) /* AMUv1 */ + SYSREG ("amevtyper14_el0", CPENC (3,3,13,14,4), 0, AARCH64_FEATURE (V8_3A)) /* AMUv1 */ + SYSREG ("amevtyper15_el0", CPENC (3,3,13,14,5), 0, AARCH64_FEATURE (V8_3A)) /* AMUv1 */ + SYSREG ("amevtyper16_el0", CPENC (3,3,13,14,6), 0, AARCH64_FEATURE (V8_3A)) /* AMUv1 */ + SYSREG ("amevtyper17_el0", CPENC (3,3,13,14,7), 0, AARCH64_FEATURE (V8_3A)) /* AMUv1 */ + SYSREG ("amevtyper18_el0", CPENC (3,3,13,15,0), 0, AARCH64_FEATURE (V8_3A)) /* AMUv1 */ + SYSREG ("amevtyper19_el0", CPENC (3,3,13,15,1), 0, AARCH64_FEATURE (V8_3A)) /* AMUv1 */ + SYSREG ("amuserenr_el0", CPENC (3,3,13,2,3), 0, AARCH64_FEATURE (V8_3A)) /* AMUv1 */ + SYSREG ("apdakeyhi_el1", CPENC (3,0,2,2,1), 0, AARCH64_FEATURE (PAUTH)) + SYSREG ("apdakeylo_el1", CPENC (3,0,2,2,0), 0, AARCH64_FEATURE (PAUTH)) + SYSREG ("apdbkeyhi_el1", CPENC (3,0,2,2,3), 0, AARCH64_FEATURE (PAUTH)) + SYSREG ("apdbkeylo_el1", CPENC (3,0,2,2,2), 0, AARCH64_FEATURE (PAUTH)) + SYSREG ("apgakeyhi_el1", CPENC (3,0,2,3,1), 0, AARCH64_FEATURE (PAUTH)) + SYSREG ("apgakeylo_el1", CPENC (3,0,2,3,0), 0, AARCH64_FEATURE (PAUTH)) + SYSREG ("apiakeyhi_el1", CPENC (3,0,2,1,1), 0, AARCH64_FEATURE (PAUTH)) + SYSREG ("apiakeylo_el1", CPENC (3,0,2,1,0), 0, AARCH64_FEATURE (PAUTH)) + SYSREG ("apibkeyhi_el1", CPENC (3,0,2,1,3), 0, AARCH64_FEATURE (PAUTH)) + SYSREG ("apibkeylo_el1", CPENC (3,0,2,1,2), 0, AARCH64_FEATURE (PAUTH)) + SYSREG ("brbcr_el1", CPENC (2,1,9,0,0), 0, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbcr_el12", CPENC (2,5,9,0,0), 0, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbcr_el2", CPENC (2,4,9,0,0), 0, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbfcr_el1", CPENC (2,1,9,0,1), 0, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbidr0_el1", CPENC (2,1,9,2,0), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbinf0_el1", CPENC (2,1,8,0,0), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbinf10_el1", CPENC (2,1,8,10,0), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbinf11_el1", CPENC (2,1,8,11,0), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbinf12_el1", CPENC (2,1,8,12,0), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbinf13_el1", CPENC (2,1,8,13,0), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbinf14_el1", CPENC (2,1,8,14,0), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbinf15_el1", CPENC (2,1,8,15,0), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbinf16_el1", CPENC (2,1,8,0,4), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbinf17_el1", CPENC (2,1,8,1,4), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbinf18_el1", CPENC (2,1,8,2,4), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbinf19_el1", CPENC (2,1,8,3,4), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbinf1_el1", CPENC (2,1,8,1,0), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbinf20_el1", CPENC (2,1,8,4,4), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbinf21_el1", CPENC (2,1,8,5,4), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbinf22_el1", CPENC (2,1,8,6,4), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbinf23_el1", CPENC (2,1,8,7,4), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbinf24_el1", CPENC (2,1,8,8,4), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbinf25_el1", CPENC (2,1,8,9,4), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbinf26_el1", CPENC (2,1,8,10,4), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbinf27_el1", CPENC (2,1,8,11,4), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbinf28_el1", CPENC (2,1,8,12,4), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbinf29_el1", CPENC (2,1,8,13,4), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbinf2_el1", CPENC (2,1,8,2,0), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbinf30_el1", CPENC (2,1,8,14,4), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbinf31_el1", CPENC (2,1,8,15,4), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbinf3_el1", CPENC (2,1,8,3,0), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbinf4_el1", CPENC (2,1,8,4,0), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbinf5_el1", CPENC (2,1,8,5,0), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbinf6_el1", CPENC (2,1,8,6,0), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbinf7_el1", CPENC (2,1,8,7,0), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbinf8_el1", CPENC (2,1,8,8,0), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbinf9_el1", CPENC (2,1,8,9,0), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbinfinj_el1", CPENC (2,1,9,1,0), 0, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbsrc0_el1", CPENC (2,1,8,0,1), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbsrc10_el1", CPENC (2,1,8,10,1), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbsrc11_el1", CPENC (2,1,8,11,1), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbsrc12_el1", CPENC (2,1,8,12,1), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbsrc13_el1", CPENC (2,1,8,13,1), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbsrc14_el1", CPENC (2,1,8,14,1), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbsrc15_el1", CPENC (2,1,8,15,1), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbsrc16_el1", CPENC (2,1,8,0,5), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbsrc17_el1", CPENC (2,1,8,1,5), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbsrc18_el1", CPENC (2,1,8,2,5), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbsrc19_el1", CPENC (2,1,8,3,5), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbsrc1_el1", CPENC (2,1,8,1,1), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbsrc20_el1", CPENC (2,1,8,4,5), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbsrc21_el1", CPENC (2,1,8,5,5), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbsrc22_el1", CPENC (2,1,8,6,5), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbsrc23_el1", CPENC (2,1,8,7,5), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbsrc24_el1", CPENC (2,1,8,8,5), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbsrc25_el1", CPENC (2,1,8,9,5), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbsrc26_el1", CPENC (2,1,8,10,5), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbsrc27_el1", CPENC (2,1,8,11,5), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbsrc28_el1", CPENC (2,1,8,12,5), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbsrc29_el1", CPENC (2,1,8,13,5), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbsrc2_el1", CPENC (2,1,8,2,1), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbsrc30_el1", CPENC (2,1,8,14,5), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbsrc31_el1", CPENC (2,1,8,15,5), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbsrc3_el1", CPENC (2,1,8,3,1), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbsrc4_el1", CPENC (2,1,8,4,1), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbsrc5_el1", CPENC (2,1,8,5,1), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbsrc6_el1", CPENC (2,1,8,6,1), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbsrc7_el1", CPENC (2,1,8,7,1), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbsrc8_el1", CPENC (2,1,8,8,1), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbsrc9_el1", CPENC (2,1,8,9,1), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbsrcinj_el1", CPENC (2,1,9,1,1), 0, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbtgt0_el1", CPENC (2,1,8,0,2), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbtgt10_el1", CPENC (2,1,8,10,2), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbtgt11_el1", CPENC (2,1,8,11,2), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbtgt12_el1", CPENC (2,1,8,12,2), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbtgt13_el1", CPENC (2,1,8,13,2), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbtgt14_el1", CPENC (2,1,8,14,2), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbtgt15_el1", CPENC (2,1,8,15,2), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbtgt16_el1", CPENC (2,1,8,0,6), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbtgt17_el1", CPENC (2,1,8,1,6), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbtgt18_el1", CPENC (2,1,8,2,6), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbtgt19_el1", CPENC (2,1,8,3,6), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbtgt1_el1", CPENC (2,1,8,1,2), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbtgt20_el1", CPENC (2,1,8,4,6), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbtgt21_el1", CPENC (2,1,8,5,6), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbtgt22_el1", CPENC (2,1,8,6,6), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbtgt23_el1", CPENC (2,1,8,7,6), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbtgt24_el1", CPENC (2,1,8,8,6), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbtgt25_el1", CPENC (2,1,8,9,6), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbtgt26_el1", CPENC (2,1,8,10,6), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbtgt27_el1", CPENC (2,1,8,11,6), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbtgt28_el1", CPENC (2,1,8,12,6), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbtgt29_el1", CPENC (2,1,8,13,6), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbtgt2_el1", CPENC (2,1,8,2,2), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbtgt30_el1", CPENC (2,1,8,14,6), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbtgt31_el1", CPENC (2,1,8,15,6), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbtgt3_el1", CPENC (2,1,8,3,2), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbtgt4_el1", CPENC (2,1,8,4,2), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbtgt5_el1", CPENC (2,1,8,5,2), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbtgt6_el1", CPENC (2,1,8,6,2), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbtgt7_el1", CPENC (2,1,8,7,2), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbtgt8_el1", CPENC (2,1,8,8,2), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbtgt9_el1", CPENC (2,1,8,9,2), F_REG_READ, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbtgtinj_el1", CPENC (2,1,9,1,2), 0, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("brbts_el1", CPENC (2,1,9,0,2), 0, AARCH64_FEATURE (V9_1A)) /* BRBE */ + SYSREG ("ccsidr2_el1", CPENC (3,1,0,0,2), F_REG_READ, AARCH64_FEATURE (V8_2A)) /* CCIDX */ + SYSREG ("ccsidr_el1", CPENC (3,1,0,0,0), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("clidr_el1", CPENC (3,1,0,0,1), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("cntfrq_el0", CPENC (3,3,14,0,0), 0, AARCH64_NO_FEATURES) + SYSREG ("cnthctl_el2", CPENC (3,4,14,1,0), 0, AARCH64_NO_FEATURES) + SYSREG ("cnthp_ctl_el2", CPENC (3,4,14,2,1), 0, AARCH64_NO_FEATURES) + SYSREG ("cnthp_cval_el2", CPENC (3,4,14,2,2), 0, AARCH64_NO_FEATURES) + SYSREG ("cnthp_tval_el2", CPENC (3,4,14,2,0), 0, AARCH64_NO_FEATURES) + SYSREG ("cnthps_ctl_el2", CPENC (3,4,14,5,1), 0, AARCH64_FEATURE (V8_3A)) /* SEL2 */ + SYSREG ("cnthps_cval_el2", CPENC (3,4,14,5,2), 0, AARCH64_FEATURE (V8_3A)) /* SEL2 */ + SYSREG ("cnthps_tval_el2", CPENC (3,4,14,5,0), 0, AARCH64_FEATURE (V8_3A)) /* SEL2 */ + SYSREG ("cnthv_ctl_el2", CPENC (3,4,14,3,1), 0, AARCH64_NO_FEATURES) + SYSREG ("cnthv_cval_el2", CPENC (3,4,14,3,2), 0, AARCH64_NO_FEATURES) + SYSREG ("cnthv_tval_el2", CPENC (3,4,14,3,0), 0, AARCH64_NO_FEATURES) + SYSREG ("cnthvs_ctl_el2", CPENC (3,4,14,4,1), 0, AARCH64_FEATURE (V8_3A)) /* SEL2 */ + SYSREG ("cnthvs_cval_el2", CPENC (3,4,14,4,2), 0, AARCH64_FEATURE (V8_3A)) /* SEL2 */ + SYSREG ("cnthvs_tval_el2", CPENC (3,4,14,4,0), 0, AARCH64_FEATURE (V8_3A)) /* SEL2 */ + SYSREG ("cntkctl_el1", CPENC (3,0,14,1,0), 0, AARCH64_NO_FEATURES) + SYSREG ("cntkctl_el12", CPENC (3,5,14,1,0), 0, AARCH64_NO_FEATURES) + SYSREG ("cntp_ctl_el0", CPENC (3,3,14,2,1), 0, AARCH64_NO_FEATURES) + SYSREG ("cntp_ctl_el02", CPENC (3,5,14,2,1), 0, AARCH64_NO_FEATURES) + SYSREG ("cntp_cval_el0", CPENC (3,3,14,2,2), 0, AARCH64_NO_FEATURES) + SYSREG ("cntp_cval_el02", CPENC (3,5,14,2,2), 0, AARCH64_NO_FEATURES) + SYSREG ("cntp_tval_el0", CPENC (3,3,14,2,0), 0, AARCH64_NO_FEATURES) + SYSREG ("cntp_tval_el02", CPENC (3,5,14,2,0), 0, AARCH64_NO_FEATURES) + SYSREG ("cntpct_el0", CPENC (3,3,14,0,1), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("cntpctss_el0", CPENC (3,3,14,0,5), F_REG_READ, AARCH64_FEATURE (V8_5A)) /* ECV */ + SYSREG ("cntpoff_el2", CPENC (3,4,14,0,6), 0, AARCH64_FEATURE (V8_5A)) /* ECV_POFF */ + SYSREG ("cntps_ctl_el1", CPENC (3,7,14,2,1), 0, AARCH64_NO_FEATURES) + SYSREG ("cntps_cval_el1", CPENC (3,7,14,2,2), 0, AARCH64_NO_FEATURES) + SYSREG ("cntps_tval_el1", CPENC (3,7,14,2,0), 0, AARCH64_NO_FEATURES) + SYSREG ("cntv_ctl_el0", CPENC (3,3,14,3,1), 0, AARCH64_NO_FEATURES) + SYSREG ("cntv_ctl_el02", CPENC (3,5,14,3,1), 0, AARCH64_NO_FEATURES) + SYSREG ("cntv_cval_el0", CPENC (3,3,14,3,2), 0, AARCH64_NO_FEATURES) + SYSREG ("cntv_cval_el02", CPENC (3,5,14,3,2), 0, AARCH64_NO_FEATURES) + SYSREG ("cntv_tval_el0", CPENC (3,3,14,3,0), 0, AARCH64_NO_FEATURES) + SYSREG ("cntv_tval_el02", CPENC (3,5,14,3,0), 0, AARCH64_NO_FEATURES) + SYSREG ("cntvct_el0", CPENC (3,3,14,0,2), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("cntvctss_el0", CPENC (3,3,14,0,6), F_REG_READ, AARCH64_FEATURE (V8_5A)) /* ECV */ + SYSREG ("cntvoff_el2", CPENC (3,4,14,0,3), 0, AARCH64_NO_FEATURES) + SYSREG ("contextidr_el1", CPENC (3,0,13,0,1), 0, AARCH64_NO_FEATURES) + SYSREG ("contextidr_el12", CPENC (3,5,13,0,1), 0, AARCH64_NO_FEATURES) + SYSREG ("contextidr_el2", CPENC (3,4,13,0,1), 0, AARCH64_NO_FEATURES) + SYSREG ("cpacr_el1", CPENC (3,0,1,0,2), 0, AARCH64_NO_FEATURES) + SYSREG ("cpacr_el12", CPENC (3,5,1,0,2), 0, AARCH64_NO_FEATURES) + SYSREG ("cpacralias_el1", CPENC (3,0,1,4,4), 0, AARCH64_FEATURE (V9_5A)) /* SRMASK */ + SYSREG ("cpacrmask_el1", CPENC (3,0,1,4,2), 0, AARCH64_FEATURE (V9_5A)) /* SRMASK */ + SYSREG ("cpacrmask_el12", CPENC (3,5,1,4,2), 0, AARCH64_FEATURE (V9_5A)) /* SRMASK */ + SYSREG ("cptr_el2", CPENC (3,4,1,1,2), 0, AARCH64_NO_FEATURES) + SYSREG ("cptr_el3", CPENC (3,6,1,1,2), 0, AARCH64_NO_FEATURES) + SYSREG ("cptrmask_el2", CPENC (3,4,1,4,2), 0, AARCH64_FEATURE (V9_5A)) /* SRMASK */ + SYSREG ("csselr_el1", CPENC (3,2,0,0,0), 0, AARCH64_NO_FEATURES) + SYSREG ("ctr_el0", CPENC (3,3,0,0,1), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("currentel", CPENC (3,0,4,2,2), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("dacr32_el2", CPENC (3,4,3,0,0), 0, AARCH64_NO_FEATURES) + SYSREG ("daif", CPENC (3,3,4,2,1), 0, AARCH64_NO_FEATURES) + SYSREG ("dbgauthstatus_el1", CPENC (2,0,7,14,6), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("dbgbcr0_el1", CPENC (2,0,0,0,5), 0, AARCH64_NO_FEATURES) + SYSREG ("dbgbcr10_el1", CPENC (2,0,0,10,5), 0, AARCH64_NO_FEATURES) + SYSREG ("dbgbcr11_el1", CPENC (2,0,0,11,5), 0, AARCH64_NO_FEATURES) + SYSREG ("dbgbcr12_el1", CPENC (2,0,0,12,5), 0, AARCH64_NO_FEATURES) + SYSREG ("dbgbcr13_el1", CPENC (2,0,0,13,5), 0, AARCH64_NO_FEATURES) + SYSREG ("dbgbcr14_el1", CPENC (2,0,0,14,5), 0, AARCH64_NO_FEATURES) + SYSREG ("dbgbcr15_el1", CPENC (2,0,0,15,5), 0, AARCH64_NO_FEATURES) + SYSREG ("dbgbcr1_el1", CPENC (2,0,0,1,5), 0, AARCH64_NO_FEATURES) + SYSREG ("dbgbcr2_el1", CPENC (2,0,0,2,5), 0, AARCH64_NO_FEATURES) + SYSREG ("dbgbcr3_el1", CPENC (2,0,0,3,5), 0, AARCH64_NO_FEATURES) + SYSREG ("dbgbcr4_el1", CPENC (2,0,0,4,5), 0, AARCH64_NO_FEATURES) + SYSREG ("dbgbcr5_el1", CPENC (2,0,0,5,5), 0, AARCH64_NO_FEATURES) + SYSREG ("dbgbcr6_el1", CPENC (2,0,0,6,5), 0, AARCH64_NO_FEATURES) + SYSREG ("dbgbcr7_el1", CPENC (2,0,0,7,5), 0, AARCH64_NO_FEATURES) + SYSREG ("dbgbcr8_el1", CPENC (2,0,0,8,5), 0, AARCH64_NO_FEATURES) + SYSREG ("dbgbcr9_el1", CPENC (2,0,0,9,5), 0, AARCH64_NO_FEATURES) + SYSREG ("dbgbvr0_el1", CPENC (2,0,0,0,4), 0, AARCH64_NO_FEATURES) + SYSREG ("dbgbvr10_el1", CPENC (2,0,0,10,4), 0, AARCH64_NO_FEATURES) + SYSREG ("dbgbvr11_el1", CPENC (2,0,0,11,4), 0, AARCH64_NO_FEATURES) + SYSREG ("dbgbvr12_el1", CPENC (2,0,0,12,4), 0, AARCH64_NO_FEATURES) + SYSREG ("dbgbvr13_el1", CPENC (2,0,0,13,4), 0, AARCH64_NO_FEATURES) + SYSREG ("dbgbvr14_el1", CPENC (2,0,0,14,4), 0, AARCH64_NO_FEATURES) + SYSREG ("dbgbvr15_el1", CPENC (2,0,0,15,4), 0, AARCH64_NO_FEATURES) + SYSREG ("dbgbvr1_el1", CPENC (2,0,0,1,4), 0, AARCH64_NO_FEATURES) + SYSREG ("dbgbvr2_el1", CPENC (2,0,0,2,4), 0, AARCH64_NO_FEATURES) + SYSREG ("dbgbvr3_el1", CPENC (2,0,0,3,4), 0, AARCH64_NO_FEATURES) + SYSREG ("dbgbvr4_el1", CPENC (2,0,0,4,4), 0, AARCH64_NO_FEATURES) + SYSREG ("dbgbvr5_el1", CPENC (2,0,0,5,4), 0, AARCH64_NO_FEATURES) + SYSREG ("dbgbvr6_el1", CPENC (2,0,0,6,4), 0, AARCH64_NO_FEATURES) + SYSREG ("dbgbvr7_el1", CPENC (2,0,0,7,4), 0, AARCH64_NO_FEATURES) + SYSREG ("dbgbvr8_el1", CPENC (2,0,0,8,4), 0, AARCH64_NO_FEATURES) + SYSREG ("dbgbvr9_el1", CPENC (2,0,0,9,4), 0, AARCH64_NO_FEATURES) + SYSREG ("dbgclaimclr_el1", CPENC (2,0,7,9,6), 0, AARCH64_NO_FEATURES) + SYSREG ("dbgclaimset_el1", CPENC (2,0,7,8,6), 0, AARCH64_NO_FEATURES) + SYSREG ("dbgdtr_el0", CPENC (2,3,0,4,0), 0, AARCH64_NO_FEATURES) + SYSREG ("dbgdtrrx_el0", CPENC (2,3,0,5,0), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("dbgdtrtx_el0", CPENC (2,3,0,5,0), F_REG_WRITE, AARCH64_NO_FEATURES) + SYSREG ("dbgprcr_el1", CPENC (2,0,1,4,4), 0, AARCH64_NO_FEATURES) + SYSREG ("dbgvcr32_el2", CPENC (2,4,0,7,0), 0, AARCH64_NO_FEATURES) + SYSREG ("dbgwcr0_el1", CPENC (2,0,0,0,7), 0, AARCH64_NO_FEATURES) + SYSREG ("dbgwcr10_el1", CPENC (2,0,0,10,7), 0, AARCH64_NO_FEATURES) + SYSREG ("dbgwcr11_el1", CPENC (2,0,0,11,7), 0, AARCH64_NO_FEATURES) + SYSREG ("dbgwcr12_el1", CPENC (2,0,0,12,7), 0, AARCH64_NO_FEATURES) + SYSREG ("dbgwcr13_el1", CPENC (2,0,0,13,7), 0, AARCH64_NO_FEATURES) + SYSREG ("dbgwcr14_el1", CPENC (2,0,0,14,7), 0, AARCH64_NO_FEATURES) + SYSREG ("dbgwcr15_el1", CPENC (2,0,0,15,7), 0, AARCH64_NO_FEATURES) + SYSREG ("dbgwcr1_el1", CPENC (2,0,0,1,7), 0, AARCH64_NO_FEATURES) + SYSREG ("dbgwcr2_el1", CPENC (2,0,0,2,7), 0, AARCH64_NO_FEATURES) + SYSREG ("dbgwcr3_el1", CPENC (2,0,0,3,7), 0, AARCH64_NO_FEATURES) + SYSREG ("dbgwcr4_el1", CPENC (2,0,0,4,7), 0, AARCH64_NO_FEATURES) + SYSREG ("dbgwcr5_el1", CPENC (2,0,0,5,7), 0, AARCH64_NO_FEATURES) + SYSREG ("dbgwcr6_el1", CPENC (2,0,0,6,7), 0, AARCH64_NO_FEATURES) + SYSREG ("dbgwcr7_el1", CPENC (2,0,0,7,7), 0, AARCH64_NO_FEATURES) + SYSREG ("dbgwcr8_el1", CPENC (2,0,0,8,7), 0, AARCH64_NO_FEATURES) + SYSREG ("dbgwcr9_el1", CPENC (2,0,0,9,7), 0, AARCH64_NO_FEATURES) + SYSREG ("dbgwvr0_el1", CPENC (2,0,0,0,6), 0, AARCH64_NO_FEATURES) + SYSREG ("dbgwvr10_el1", CPENC (2,0,0,10,6), 0, AARCH64_NO_FEATURES) + SYSREG ("dbgwvr11_el1", CPENC (2,0,0,11,6), 0, AARCH64_NO_FEATURES) + SYSREG ("dbgwvr12_el1", CPENC (2,0,0,12,6), 0, AARCH64_NO_FEATURES) + SYSREG ("dbgwvr13_el1", CPENC (2,0,0,13,6), 0, AARCH64_NO_FEATURES) + SYSREG ("dbgwvr14_el1", CPENC (2,0,0,14,6), 0, AARCH64_NO_FEATURES) + SYSREG ("dbgwvr15_el1", CPENC (2,0,0,15,6), 0, AARCH64_NO_FEATURES) + SYSREG ("dbgwvr1_el1", CPENC (2,0,0,1,6), 0, AARCH64_NO_FEATURES) + SYSREG ("dbgwvr2_el1", CPENC (2,0,0,2,6), 0, AARCH64_NO_FEATURES) + SYSREG ("dbgwvr3_el1", CPENC (2,0,0,3,6), 0, AARCH64_NO_FEATURES) + SYSREG ("dbgwvr4_el1", CPENC (2,0,0,4,6), 0, AARCH64_NO_FEATURES) + SYSREG ("dbgwvr5_el1", CPENC (2,0,0,5,6), 0, AARCH64_NO_FEATURES) + SYSREG ("dbgwvr6_el1", CPENC (2,0,0,6,6), 0, AARCH64_NO_FEATURES) + SYSREG ("dbgwvr7_el1", CPENC (2,0,0,7,6), 0, AARCH64_NO_FEATURES) + SYSREG ("dbgwvr8_el1", CPENC (2,0,0,8,6), 0, AARCH64_NO_FEATURES) + SYSREG ("dbgwvr9_el1", CPENC (2,0,0,9,6), 0, AARCH64_NO_FEATURES) + SYSREG ("dczid_el0", CPENC (3,3,0,0,7), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("disr_el1", CPENC (3,0,12,1,1), 0, AARCH64_FEATURE (RAS)) + SYSREG ("dit", CPENC (3,3,4,2,5), 0, AARCH64_FEATURE (V8_3A)) /* DIT */ + SYSREG ("dlr_el0", CPENC (3,3,4,5,1), 0, AARCH64_NO_FEATURES) + SYSREG ("dspsr_el0", CPENC (3,3,4,5,0), 0, AARCH64_NO_FEATURES) + SYSREG ("elr_el1", CPENC (3,0,4,0,1), 0, AARCH64_NO_FEATURES) + SYSREG ("elr_el12", CPENC (3,5,4,0,1), 0, AARCH64_NO_FEATURES) + SYSREG ("elr_el2", CPENC (3,4,4,0,1), 0, AARCH64_NO_FEATURES) + SYSREG ("elr_el3", CPENC (3,6,4,0,1), 0, AARCH64_NO_FEATURES) + SYSREG ("erridr_el1", CPENC (3,0,5,3,0), F_REG_READ, AARCH64_FEATURE (RAS)) + SYSREG ("errselr_el1", CPENC (3,0,5,3,1), 0, AARCH64_FEATURE (RAS)) + SYSREG ("erxaddr_el1", CPENC (3,0,5,4,3), 0, AARCH64_FEATURE (RAS)) + SYSREG ("erxctlr_el1", CPENC (3,0,5,4,1), 0, AARCH64_FEATURE (RAS)) + SYSREG ("erxfr_el1", CPENC (3,0,5,4,0), F_REG_READ, AARCH64_FEATURE (RAS)) + SYSREG ("erxgsr_el1", CPENC (3,0,5,3,2), F_REG_READ, AARCH64_FEATURE (RASv2)) + SYSREG ("erxmisc0_el1", CPENC (3,0,5,5,0), 0, AARCH64_FEATURE (RAS)) + SYSREG ("erxmisc1_el1", CPENC (3,0,5,5,1), 0, AARCH64_FEATURE (RAS)) + SYSREG ("erxmisc2_el1", CPENC (3,0,5,5,2), 0, AARCH64_FEATURE (RAS)) /* RASv1p1 */ + SYSREG ("erxmisc3_el1", CPENC (3,0,5,5,3), 0, AARCH64_FEATURE (RAS)) /* RASv1p1 */ + SYSREG ("erxpfgcdn_el1", CPENC (3,0,5,4,6), 0, AARCH64_FEATURE (RAS)) /* RASv1p1 */ + SYSREG ("erxpfgctl_el1", CPENC (3,0,5,4,5), 0, AARCH64_FEATURE (RAS)) /* RASv1p1 */ + SYSREG ("erxpfgf_el1", CPENC (3,0,5,4,4), F_REG_READ, AARCH64_FEATURE (RAS)) /* RASv1p1 */ + SYSREG ("erxstatus_el1", CPENC (3,0,5,4,2), 0, AARCH64_FEATURE (RAS)) + SYSREG ("esr_el1", CPENC (3,0,5,2,0), 0, AARCH64_NO_FEATURES) + SYSREG ("esr_el12", CPENC (3,5,5,2,0), 0, AARCH64_NO_FEATURES) + SYSREG ("esr_el2", CPENC (3,4,5,2,0), 0, AARCH64_NO_FEATURES) + SYSREG ("esr_el3", CPENC (3,6,5,2,0), 0, AARCH64_NO_FEATURES) + SYSREG ("far_el1", CPENC (3,0,6,0,0), 0, AARCH64_NO_FEATURES) + SYSREG ("far_el12", CPENC (3,5,6,0,0), 0, AARCH64_NO_FEATURES) + SYSREG ("far_el2", CPENC (3,4,6,0,0), 0, AARCH64_NO_FEATURES) + SYSREG ("far_el3", CPENC (3,6,6,0,0), 0, AARCH64_NO_FEATURES) + SYSREG ("fgwte3_el3", CPENC (3,6,1,1,5), 0, AARCH64_FEATURE (V9_4A)) /* FGWTE3 */ + SYSREG ("fpcr", CPENC (3,3,4,4,0), 0, AARCH64_NO_FEATURES) + SYSREG ("fpexc32_el2", CPENC (3,4,5,3,0), 0, AARCH64_NO_FEATURES) + SYSREG ("fpmr", CPENC (3,3,4,4,2), 0, AARCH64_FEATURE (FP8)) + SYSREG ("fpsr", CPENC (3,3,4,4,1), 0, AARCH64_NO_FEATURES) + SYSREG ("gcr_el1", CPENC (3,0,1,0,6), 0, AARCH64_FEATURE (MEMTAG)) + SYSREG ("gcscr_el1", CPENC (3,0,2,5,0), 0, AARCH64_FEATURE (GCS)) + SYSREG ("gcscr_el12", CPENC (3,5,2,5,0), 0, AARCH64_FEATURE (GCS)) + SYSREG ("gcscr_el2", CPENC (3,4,2,5,0), 0, AARCH64_FEATURE (GCS)) + SYSREG ("gcscr_el3", CPENC (3,6,2,5,0), 0, AARCH64_FEATURE (GCS)) + SYSREG ("gcscre0_el1", CPENC (3,0,2,5,2), 0, AARCH64_FEATURE (GCS)) + SYSREG ("gcspr_el0", CPENC (3,3,2,5,1), 0, AARCH64_FEATURE (GCS)) + SYSREG ("gcspr_el1", CPENC (3,0,2,5,1), 0, AARCH64_FEATURE (GCS)) + SYSREG ("gcspr_el12", CPENC (3,5,2,5,1), 0, AARCH64_FEATURE (GCS)) + SYSREG ("gcspr_el2", CPENC (3,4,2,5,1), 0, AARCH64_FEATURE (GCS)) + SYSREG ("gcspr_el3", CPENC (3,6,2,5,1), 0, AARCH64_FEATURE (GCS)) + SYSREG ("gmid_el1", CPENC (3,1,0,0,4), F_REG_READ, AARCH64_FEATURE (MEMTAG)) + SYSREG ("gpcbw_el3", CPENC (3,6,2,1,5), 0, AARCH64_FEATURE (V9_5A)) /* RME_GPC3 */ + SYSREG ("gpccr_el3", CPENC (3,6,2,1,6), 0, AARCH64_FEATURE (V9_1A)) /* RME */ + SYSREG ("gptbr_el3", CPENC (3,6,2,1,4), 0, AARCH64_FEATURE (V9_1A)) /* RME */ + SYSREG ("hacdbsbr_el2", CPENC (3,4,2,3,4), 0, AARCH64_FEATURE (V9_4A)) /* HACDBS */ + SYSREG ("hacdbscons_el2", CPENC (3,4,2,3,5), 0, AARCH64_FEATURE (V9_4A)) /* HACDBS */ + SYSREG ("hacr_el2", CPENC (3,4,1,1,7), 0, AARCH64_NO_FEATURES) + SYSREG ("hafgrtr_el2", CPENC (3,4,3,1,6), 0, AARCH64_FEATURE (V8_5A)) /* AMUv1 && FGT */ + SYSREG ("hcr_el2", CPENC (3,4,1,1,0), 0, AARCH64_NO_FEATURES) + SYSREG ("hcrx_el2", CPENC (3,4,1,2,2), 0, AARCH64_FEATURE (V8_6A)) /* HCX */ + SYSREG ("hdbssbr_el2", CPENC (3,4,2,3,2), 0, AARCH64_FEATURE (V9_4A)) /* HDBSS */ + SYSREG ("hdbssprod_el2", CPENC (3,4,2,3,3), 0, AARCH64_FEATURE (V9_4A)) /* HDBSS */ + SYSREG ("hdfgrtr_el2", CPENC (3,4,3,1,4), 0, AARCH64_FEATURE (V8_5A)) /* FGT */ + SYSREG ("hdfgrtr2_el2", CPENC (3,4,3,1,0), 0, AARCH64_FEATURE (V8_8A)) /* FGT2 */ + SYSREG ("hdfgwtr_el2", CPENC (3,4,3,1,5), 0, AARCH64_FEATURE (V8_5A)) /* FGT */ + SYSREG ("hdfgwtr2_el2", CPENC (3,4,3,1,1), 0, AARCH64_FEATURE (V8_8A)) /* FGT2 */ + SYSREG ("hfgitr_el2", CPENC (3,4,1,1,6), 0, AARCH64_FEATURE (V8_5A)) /* FGT */ + SYSREG ("hfgitr2_el2", CPENC (3,4,3,1,7), 0, AARCH64_FEATURE (V8_8A)) /* FGT2 */ + SYSREG ("hfgrtr_el2", CPENC (3,4,1,1,4), 0, AARCH64_FEATURE (V8_5A)) /* FGT */ + SYSREG ("hfgrtr2_el2", CPENC (3,4,3,1,2), 0, AARCH64_FEATURE (V8_8A)) /* FGT2 */ + SYSREG ("hfgwtr_el2", CPENC (3,4,1,1,5), 0, AARCH64_FEATURE (V8_5A)) /* FGT */ + SYSREG ("hfgwtr2_el2", CPENC (3,4,3,1,3), 0, AARCH64_FEATURE (V8_8A)) /* FGT2 */ + SYSREG ("hpfar_el2", CPENC (3,4,6,0,4), 0, AARCH64_NO_FEATURES) + SYSREG ("hstr_el2", CPENC (3,4,1,1,3), 0, AARCH64_NO_FEATURES) + SYSREG ("icc_ap0r0_el1", CPENC (3,0,12,8,4), 0, AARCH64_NO_FEATURES) + SYSREG ("icc_ap0r1_el1", CPENC (3,0,12,8,5), 0, AARCH64_NO_FEATURES) + SYSREG ("icc_ap0r2_el1", CPENC (3,0,12,8,6), 0, AARCH64_NO_FEATURES) + SYSREG ("icc_ap0r3_el1", CPENC (3,0,12,8,7), 0, AARCH64_NO_FEATURES) + SYSREG ("icc_ap1r0_el1", CPENC (3,0,12,9,0), 0, AARCH64_NO_FEATURES) + SYSREG ("icc_ap1r1_el1", CPENC (3,0,12,9,1), 0, AARCH64_NO_FEATURES) + SYSREG ("icc_ap1r2_el1", CPENC (3,0,12,9,2), 0, AARCH64_NO_FEATURES) + SYSREG ("icc_ap1r3_el1", CPENC (3,0,12,9,3), 0, AARCH64_NO_FEATURES) + SYSREG ("icc_asgi1r_el1", CPENC (3,0,12,11,6), F_REG_WRITE, AARCH64_NO_FEATURES) + SYSREG ("icc_bpr0_el1", CPENC (3,0,12,8,3), 0, AARCH64_NO_FEATURES) + SYSREG ("icc_bpr1_el1", CPENC (3,0,12,12,3), 0, AARCH64_NO_FEATURES) + SYSREG ("icc_ctlr_el1", CPENC (3,0,12,12,4), 0, AARCH64_NO_FEATURES) + SYSREG ("icc_ctlr_el3", CPENC (3,6,12,12,4), 0, AARCH64_NO_FEATURES) + SYSREG ("icc_dir_el1", CPENC (3,0,12,11,1), F_REG_WRITE, AARCH64_NO_FEATURES) + SYSREG ("icc_eoir0_el1", CPENC (3,0,12,8,1), F_REG_WRITE, AARCH64_NO_FEATURES) + SYSREG ("icc_eoir1_el1", CPENC (3,0,12,12,1), F_REG_WRITE, AARCH64_NO_FEATURES) + SYSREG ("icc_hppir0_el1", CPENC (3,0,12,8,2), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("icc_hppir1_el1", CPENC (3,0,12,12,2), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("icc_iar0_el1", CPENC (3,0,12,8,0), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("icc_iar1_el1", CPENC (3,0,12,12,0), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("icc_igrpen0_el1", CPENC (3,0,12,12,6), 0, AARCH64_NO_FEATURES) + SYSREG ("icc_igrpen1_el1", CPENC (3,0,12,12,7), 0, AARCH64_NO_FEATURES) + SYSREG ("icc_igrpen1_el3", CPENC (3,6,12,12,7), 0, AARCH64_NO_FEATURES) + SYSREG ("icc_nmiar1_el1", CPENC (3,0,12,9,5), F_REG_READ, AARCH64_FEATURE (V8_7A)) /* GICv3_NMI */ + SYSREG ("icc_pmr_el1", CPENC (3,0,4,6,0), 0, AARCH64_NO_FEATURES) + SYSREG ("icc_rpr_el1", CPENC (3,0,12,11,3), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("icc_sgi0r_el1", CPENC (3,0,12,11,7), F_REG_WRITE, AARCH64_NO_FEATURES) + SYSREG ("icc_sgi1r_el1", CPENC (3,0,12,11,5), F_REG_WRITE, AARCH64_NO_FEATURES) + SYSREG ("icc_sre_el1", CPENC (3,0,12,12,5), 0, AARCH64_NO_FEATURES) + SYSREG ("icc_sre_el2", CPENC (3,4,12,9,5), 0, AARCH64_NO_FEATURES) + SYSREG ("icc_sre_el3", CPENC (3,6,12,12,5), 0, AARCH64_NO_FEATURES) + SYSREG ("ich_ap0r0_el2", CPENC (3,4,12,8,0), 0, AARCH64_NO_FEATURES) + SYSREG ("ich_ap0r1_el2", CPENC (3,4,12,8,1), 0, AARCH64_NO_FEATURES) + SYSREG ("ich_ap0r2_el2", CPENC (3,4,12,8,2), 0, AARCH64_NO_FEATURES) + SYSREG ("ich_ap0r3_el2", CPENC (3,4,12,8,3), 0, AARCH64_NO_FEATURES) + SYSREG ("ich_ap1r0_el2", CPENC (3,4,12,9,0), 0, AARCH64_NO_FEATURES) + SYSREG ("ich_ap1r1_el2", CPENC (3,4,12,9,1), 0, AARCH64_NO_FEATURES) + SYSREG ("ich_ap1r2_el2", CPENC (3,4,12,9,2), 0, AARCH64_NO_FEATURES) + SYSREG ("ich_ap1r3_el2", CPENC (3,4,12,9,3), 0, AARCH64_NO_FEATURES) + SYSREG ("ich_eisr_el2", CPENC (3,4,12,11,3), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("ich_elrsr_el2", CPENC (3,4,12,11,5), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("ich_hcr_el2", CPENC (3,4,12,11,0), 0, AARCH64_NO_FEATURES) + SYSREG ("ich_lr0_el2", CPENC (3,4,12,12,0), 0, AARCH64_NO_FEATURES) + SYSREG ("ich_lr10_el2", CPENC (3,4,12,13,2), 0, AARCH64_NO_FEATURES) + SYSREG ("ich_lr11_el2", CPENC (3,4,12,13,3), 0, AARCH64_NO_FEATURES) + SYSREG ("ich_lr12_el2", CPENC (3,4,12,13,4), 0, AARCH64_NO_FEATURES) + SYSREG ("ich_lr13_el2", CPENC (3,4,12,13,5), 0, AARCH64_NO_FEATURES) + SYSREG ("ich_lr14_el2", CPENC (3,4,12,13,6), 0, AARCH64_NO_FEATURES) + SYSREG ("ich_lr15_el2", CPENC (3,4,12,13,7), 0, AARCH64_NO_FEATURES) + SYSREG ("ich_lr1_el2", CPENC (3,4,12,12,1), 0, AARCH64_NO_FEATURES) + SYSREG ("ich_lr2_el2", CPENC (3,4,12,12,2), 0, AARCH64_NO_FEATURES) + SYSREG ("ich_lr3_el2", CPENC (3,4,12,12,3), 0, AARCH64_NO_FEATURES) + SYSREG ("ich_lr4_el2", CPENC (3,4,12,12,4), 0, AARCH64_NO_FEATURES) + SYSREG ("ich_lr5_el2", CPENC (3,4,12,12,5), 0, AARCH64_NO_FEATURES) + SYSREG ("ich_lr6_el2", CPENC (3,4,12,12,6), 0, AARCH64_NO_FEATURES) + SYSREG ("ich_lr7_el2", CPENC (3,4,12,12,7), 0, AARCH64_NO_FEATURES) + SYSREG ("ich_lr8_el2", CPENC (3,4,12,13,0), 0, AARCH64_NO_FEATURES) + SYSREG ("ich_lr9_el2", CPENC (3,4,12,13,1), 0, AARCH64_NO_FEATURES) + SYSREG ("ich_misr_el2", CPENC (3,4,12,11,2), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("ich_vmcr_el2", CPENC (3,4,12,11,7), 0, AARCH64_NO_FEATURES) + SYSREG ("ich_vtr_el2", CPENC (3,4,12,11,1), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("id_aa64afr0_el1", CPENC (3,0,0,5,4), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("id_aa64afr1_el1", CPENC (3,0,0,5,5), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("id_aa64dfr0_el1", CPENC (3,0,0,5,0), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("id_aa64dfr1_el1", CPENC (3,0,0,5,1), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("id_aa64dfr2_el1", CPENC (3,0,0,5,2), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("id_aa64fpfr0_el1", CPENC (3,0,0,4,7), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("id_aa64isar0_el1", CPENC (3,0,0,6,0), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("id_aa64isar1_el1", CPENC (3,0,0,6,1), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("id_aa64isar2_el1", CPENC (3,0,0,6,2), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("id_aa64isar3_el1", CPENC (3,0,0,6,3), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("id_aa64mmfr0_el1", CPENC (3,0,0,7,0), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("id_aa64mmfr1_el1", CPENC (3,0,0,7,1), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("id_aa64mmfr2_el1", CPENC (3,0,0,7,2), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("id_aa64mmfr3_el1", CPENC (3,0,0,7,3), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("id_aa64mmfr4_el1", CPENC (3,0,0,7,4), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("id_aa64pfr0_el1", CPENC (3,0,0,4,0), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("id_aa64pfr1_el1", CPENC (3,0,0,4,1), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("id_aa64pfr2_el1", CPENC (3,0,0,4,2), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("id_aa64smfr0_el1", CPENC (3,0,0,4,5), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("id_aa64zfr0_el1", CPENC (3,0,0,4,4), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("id_afr0_el1", CPENC (3,0,0,1,3), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("id_dfr0_el1", CPENC (3,0,0,1,2), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("id_dfr1_el1", CPENC (3,0,0,3,5), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("id_isar0_el1", CPENC (3,0,0,2,0), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("id_isar1_el1", CPENC (3,0,0,2,1), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("id_isar2_el1", CPENC (3,0,0,2,2), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("id_isar3_el1", CPENC (3,0,0,2,3), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("id_isar4_el1", CPENC (3,0,0,2,4), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("id_isar5_el1", CPENC (3,0,0,2,5), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("id_isar6_el1", CPENC (3,0,0,2,7), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("id_mmfr0_el1", CPENC (3,0,0,1,4), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("id_mmfr1_el1", CPENC (3,0,0,1,5), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("id_mmfr2_el1", CPENC (3,0,0,1,6), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("id_mmfr3_el1", CPENC (3,0,0,1,7), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("id_mmfr4_el1", CPENC (3,0,0,2,6), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("id_mmfr5_el1", CPENC (3,0,0,3,6), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("id_pfr0_el1", CPENC (3,0,0,1,0), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("id_pfr1_el1", CPENC (3,0,0,1,1), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("id_pfr2_el1", CPENC (3,0,0,3,4), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("ifsr32_el2", CPENC (3,4,5,0,1), 0, AARCH64_NO_FEATURES) + SYSREG ("isr_el1", CPENC (3,0,12,1,0), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("lorc_el1", CPENC (3,0,10,4,3), 0, AARCH64_FEATURE (LOR)) + SYSREG ("lorea_el1", CPENC (3,0,10,4,1), 0, AARCH64_FEATURE (LOR)) + SYSREG ("lorid_el1", CPENC (3,0,10,4,7), F_REG_READ, AARCH64_FEATURE (LOR)) + SYSREG ("lorn_el1", CPENC (3,0,10,4,2), 0, AARCH64_FEATURE (LOR)) + SYSREG ("lorsa_el1", CPENC (3,0,10,4,0), 0, AARCH64_FEATURE (LOR)) + SYSREG ("mair_el1", CPENC (3,0,10,2,0), 0, AARCH64_NO_FEATURES) + SYSREG ("mair_el12", CPENC (3,5,10,2,0), 0, AARCH64_NO_FEATURES) + SYSREG ("mair_el2", CPENC (3,4,10,2,0), 0, AARCH64_NO_FEATURES) + SYSREG ("mair_el3", CPENC (3,6,10,2,0), 0, AARCH64_NO_FEATURES) + SYSREG ("mair2_el1", CPENC (3,0,10,2,1), 0, AARCH64_FEATURE (V8_8A)) /* AIE */ + SYSREG ("mair2_el12", CPENC (3,5,10,2,1), 0, AARCH64_FEATURE (V8_8A)) /* AIE */ + SYSREG ("mair2_el2", CPENC (3,4,10,1,1), 0, AARCH64_FEATURE (V8_8A)) /* AIE */ + SYSREG ("mair2_el3", CPENC (3,6,10,1,1), 0, AARCH64_FEATURE (V8_8A)) /* AIE */ + SYSREG ("mdccint_el1", CPENC (2,0,0,2,0), 0, AARCH64_NO_FEATURES) + SYSREG ("mdccsr_el0", CPENC (2,3,0,1,0), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("mdcr_el2", CPENC (3,4,1,1,1), 0, AARCH64_NO_FEATURES) + SYSREG ("mdcr_el3", CPENC (3,6,1,3,1), 0, AARCH64_NO_FEATURES) + SYSREG ("mdrar_el1", CPENC (2,0,1,0,0), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("mdscr_el1", CPENC (2,0,0,2,2), 0, AARCH64_NO_FEATURES) + SYSREG ("mdselr_el1", CPENC (2,0,0,4,2), 0, AARCH64_FEATURE (V8_8A)) /* Debugv8p9 */ + SYSREG ("mdstepop_el1", CPENC (2,0,0,5,2), 0, AARCH64_FEATURE (V9_4A)) /* STEP2 */ + SYSREG ("mecid_a0_el2", CPENC (3,4,10,8,1), 0, AARCH64_FEATURE (V9_2A)) /* MEC */ + SYSREG ("mecid_a1_el2", CPENC (3,4,10,8,3), 0, AARCH64_FEATURE (V9_2A)) /* MEC */ + SYSREG ("mecid_p0_el2", CPENC (3,4,10,8,0), 0, AARCH64_FEATURE (V9_2A)) /* MEC */ + SYSREG ("mecid_p1_el2", CPENC (3,4,10,8,2), 0, AARCH64_FEATURE (V9_2A)) /* MEC */ + SYSREG ("mecid_rl_a_el3", CPENC (3,6,10,10,1), 0, AARCH64_FEATURE (V9_2A)) /* MEC */ + SYSREG ("mecidr_el2", CPENC (3,4,10,8,7), F_REG_READ, AARCH64_FEATURE (V9_2A)) /* MEC */ + SYSREG ("mfar_el3", CPENC (3,6,6,0,5), 0, AARCH64_FEATURE (V8_6A)) /* PFAR=>8.8 || RME=>9.1 */ + SYSREG ("midr_el1", CPENC (3,0,0,0,0), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("mpam0_el1", CPENC (3,0,10,5,1), 0, AARCH64_FEATURE (V8_2A)) /* MPAM */ + SYSREG ("mpam1_el1", CPENC (3,0,10,5,0), 0, AARCH64_FEATURE (V8_2A)) /* MPAM */ + SYSREG ("mpam1_el12", CPENC (3,5,10,5,0), 0, AARCH64_FEATURE (V8_2A)) /* MPAM */ + SYSREG ("mpam2_el2", CPENC (3,4,10,5,0), 0, AARCH64_FEATURE (V8_2A)) /* MPAM */ + SYSREG ("mpam3_el3", CPENC (3,6,10,5,0), 0, AARCH64_FEATURE (V8_2A)) /* MPAM */ + SYSREG ("mpambw0_el1", CPENC (3,0,10,5,5), 0, AARCH64_FEATURE (V9_3A)) /* MPAM_PE_BW_CTRL */ + SYSREG ("mpambw1_el1", CPENC (3,0,10,5,4), 0, AARCH64_FEATURE (V9_3A)) /* MPAM_PE_BW_CTRL */ + SYSREG ("mpambw1_el12", CPENC (3,5,10,5,4), 0, AARCH64_FEATURE (V9_3A)) /* MPAM_PE_BW_CTRL */ + SYSREG ("mpambw2_el2", CPENC (3,4,10,5,4), 0, AARCH64_FEATURE (V9_3A)) /* MPAM_PE_BW_CTRL */ + SYSREG ("mpambw3_el3", CPENC (3,6,10,5,4), 0, AARCH64_FEATURE (V9_3A)) /* MPAM_PE_BW_CTRL */ + SYSREG ("mpambwcap_el2", CPENC (3,4,10,5,6), 0, AARCH64_FEATURE (V9_3A)) /* MPAM_PE_BW_CTRL */ + SYSREG ("mpambwidr_el1", CPENC (3,0,10,4,5), F_REG_READ, AARCH64_FEATURE (V9_3A)) /* MPAM_PE_BW_CTRL */ + SYSREG ("mpambwsm_el1", CPENC (3,0,10,5,7), 0, AARCH64_FEATURES (2, SME, V9_3A)) /* SME && MPAM_PE_BW_CTRL */ + SYSREG ("mpamhcr_el2", CPENC (3,4,10,4,0), 0, AARCH64_FEATURE (V8_2A)) /* MPAM */ + SYSREG ("mpamidr_el1", CPENC (3,0,10,4,4), F_REG_READ, AARCH64_FEATURE (V8_2A)) /* MPAM */ + SYSREG ("mpamsm_el1", CPENC (3,0,10,5,3), 0, AARCH64_FEATURES (2, SME, V8_2A)) /* SME && MPAM */ + SYSREG ("mpamvpm0_el2", CPENC (3,4,10,6,0), 0, AARCH64_FEATURE (V8_2A)) /* MPAM */ + SYSREG ("mpamvpm1_el2", CPENC (3,4,10,6,1), 0, AARCH64_FEATURE (V8_2A)) /* MPAM */ + SYSREG ("mpamvpm2_el2", CPENC (3,4,10,6,2), 0, AARCH64_FEATURE (V8_2A)) /* MPAM */ + SYSREG ("mpamvpm3_el2", CPENC (3,4,10,6,3), 0, AARCH64_FEATURE (V8_2A)) /* MPAM */ + SYSREG ("mpamvpm4_el2", CPENC (3,4,10,6,4), 0, AARCH64_FEATURE (V8_2A)) /* MPAM */ + SYSREG ("mpamvpm5_el2", CPENC (3,4,10,6,5), 0, AARCH64_FEATURE (V8_2A)) /* MPAM */ + SYSREG ("mpamvpm6_el2", CPENC (3,4,10,6,6), 0, AARCH64_FEATURE (V8_2A)) /* MPAM */ + SYSREG ("mpamvpm7_el2", CPENC (3,4,10,6,7), 0, AARCH64_FEATURE (V8_2A)) /* MPAM */ + SYSREG ("mpamvpmv_el2", CPENC (3,4,10,4,1), 0, AARCH64_FEATURE (V8_2A)) /* MPAM */ + SYSREG ("mpidr_el1", CPENC (3,0,0,0,5), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("mpuir_el1", CPENC (3,0,0,0,4), F_REG_READ, AARCH64_FEATURE (V8R)) + SYSREG ("mpuir_el2", CPENC (3,4,0,0,4), F_REG_READ, AARCH64_FEATURE (V8R)) + SYSREG ("mvfr0_el1", CPENC (3,0,0,3,0), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("mvfr1_el1", CPENC (3,0,0,3,1), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("mvfr2_el1", CPENC (3,0,0,3,2), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("nzcv", CPENC (3,3,4,2,0), 0, AARCH64_NO_FEATURES) + SYSREG ("osdlr_el1", CPENC (2,0,1,3,4), 0, AARCH64_NO_FEATURES) + SYSREG ("osdtrrx_el1", CPENC (2,0,0,0,2), 0, AARCH64_NO_FEATURES) + SYSREG ("osdtrtx_el1", CPENC (2,0,0,3,2), 0, AARCH64_NO_FEATURES) + SYSREG ("oseccr_el1", CPENC (2,0,0,6,2), 0, AARCH64_NO_FEATURES) + SYSREG ("oslar_el1", CPENC (2,0,1,0,4), F_REG_WRITE, AARCH64_NO_FEATURES) + SYSREG ("oslsr_el1", CPENC (2,0,1,1,4), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("pan", CPENC (3,0,4,2,3), 0, AARCH64_FEATURE (PAN)) + SYSREG ("par_el1", CPENC (3,0,7,4,0), F_REG_128, AARCH64_NO_FEATURES) + SYSREG ("pfar_el1", CPENC (3,0,6,0,5), 0, AARCH64_FEATURE (V8_8A)) /* PFAR */ + SYSREG ("pfar_el12", CPENC (3,5,6,0,5), 0, AARCH64_FEATURE (V8_8A)) /* PFAR */ + SYSREG ("pfar_el2", CPENC (3,4,6,0,5), 0, AARCH64_FEATURE (V8_8A)) /* PFAR */ + SYSREG ("pir_el1", CPENC (3,0,10,2,3), 0, AARCH64_FEATURE (V8_8A)) /* S1PIE */ + SYSREG ("pir_el12", CPENC (3,5,10,2,3), 0, AARCH64_FEATURE (V8_8A)) /* S1PIE */ + SYSREG ("pir_el2", CPENC (3,4,10,2,3), 0, AARCH64_FEATURE (V8_8A)) /* S1PIE */ + SYSREG ("pir_el3", CPENC (3,6,10,2,3), 0, AARCH64_FEATURE (V8_8A)) /* S1PIE */ + SYSREG ("pire0_el1", CPENC (3,0,10,2,2), 0, AARCH64_FEATURE (V8_8A)) /* S1PIE */ + SYSREG ("pire0_el12", CPENC (3,5,10,2,2), 0, AARCH64_FEATURE (V8_8A)) /* S1PIE */ + SYSREG ("pire0_el2", CPENC (3,4,10,2,2), 0, AARCH64_FEATURE (V8_8A)) /* S1PIE */ + SYSREG ("pm", CPENC (3,0,4,3,1), 0, AARCH64_FEATURE (V9_3A)) /* EBEP */ + SYSREG ("pmbidr_el1", CPENC (3,0,9,10,7), F_REG_READ, AARCH64_FEATURE (PROFILE)) + SYSREG ("pmblimitr_el1", CPENC (3,0,9,10,0), 0, AARCH64_FEATURE (PROFILE)) + SYSREG ("pmbmar_el1", CPENC (3,0,9,10,5), 0, AARCH64_FEATURES (2, PROFILE, V9_5A)) /* SPE_nVM */ + SYSREG ("pmbptr_el1", CPENC (3,0,9,10,1), 0, AARCH64_FEATURE (PROFILE)) + SYSREG ("pmbsr_el1", CPENC (3,0,9,10,3), 0, AARCH64_FEATURE (PROFILE)) + SYSREG ("pmbsr_el12", CPENC (3,5,9,10,3), 0, AARCH64_FEATURES (2, V9_5A, PROFILE)) /* SPE_EXC */ + SYSREG ("pmbsr_el2", CPENC (3,4,9,10,3), 0, AARCH64_FEATURES (2, V9_5A, PROFILE)) /* SPE_EXC */ + SYSREG ("pmbsr_el3", CPENC (3,6,9,10,3), 0, AARCH64_FEATURES (2, V9_5A, PROFILE)) /* SPE_EXC */ + SYSREG ("pmccfiltr_el0", CPENC (3,3,14,15,7), 0, AARCH64_NO_FEATURES) + SYSREG ("pmccntr_el0", CPENC (3,3,9,13,0), 0, AARCH64_NO_FEATURES) + SYSREG ("pmccntsvr_el1", CPENC (2,0,14,11,7), F_REG_READ, AARCH64_FEATURE (V8_8A)) /* PMUv3_SS */ + SYSREG ("pmceid0_el0", CPENC (3,3,9,12,6), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("pmceid1_el0", CPENC (3,3,9,12,7), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("pmcntenclr_el0", CPENC (3,3,9,12,2), 0, AARCH64_NO_FEATURES) + SYSREG ("pmcntenset_el0", CPENC (3,3,9,12,1), 0, AARCH64_NO_FEATURES) + SYSREG ("pmcr_el0", CPENC (3,3,9,12,0), 0, AARCH64_NO_FEATURES) + SYSREG ("pmecr_el1", CPENC (3,0,9,14,5), 0, AARCH64_FEATURE (V8_8A)) /* EBEP || PMUv3_SS */ + SYSREG ("pmevcntr0_el0", CPENC (3,3,14,8,0), 0, AARCH64_NO_FEATURES) + SYSREG ("pmevcntr10_el0", CPENC (3,3,14,9,2), 0, AARCH64_NO_FEATURES) + SYSREG ("pmevcntr11_el0", CPENC (3,3,14,9,3), 0, AARCH64_NO_FEATURES) + SYSREG ("pmevcntr12_el0", CPENC (3,3,14,9,4), 0, AARCH64_NO_FEATURES) + SYSREG ("pmevcntr13_el0", CPENC (3,3,14,9,5), 0, AARCH64_NO_FEATURES) + SYSREG ("pmevcntr14_el0", CPENC (3,3,14,9,6), 0, AARCH64_NO_FEATURES) + SYSREG ("pmevcntr15_el0", CPENC (3,3,14,9,7), 0, AARCH64_NO_FEATURES) + SYSREG ("pmevcntr16_el0", CPENC (3,3,14,10,0), 0, AARCH64_NO_FEATURES) + SYSREG ("pmevcntr17_el0", CPENC (3,3,14,10,1), 0, AARCH64_NO_FEATURES) + SYSREG ("pmevcntr18_el0", CPENC (3,3,14,10,2), 0, AARCH64_NO_FEATURES) + SYSREG ("pmevcntr19_el0", CPENC (3,3,14,10,3), 0, AARCH64_NO_FEATURES) + SYSREG ("pmevcntr1_el0", CPENC (3,3,14,8,1), 0, AARCH64_NO_FEATURES) + SYSREG ("pmevcntr20_el0", CPENC (3,3,14,10,4), 0, AARCH64_NO_FEATURES) + SYSREG ("pmevcntr21_el0", CPENC (3,3,14,10,5), 0, AARCH64_NO_FEATURES) + SYSREG ("pmevcntr22_el0", CPENC (3,3,14,10,6), 0, AARCH64_NO_FEATURES) + SYSREG ("pmevcntr23_el0", CPENC (3,3,14,10,7), 0, AARCH64_NO_FEATURES) + SYSREG ("pmevcntr24_el0", CPENC (3,3,14,11,0), 0, AARCH64_NO_FEATURES) + SYSREG ("pmevcntr25_el0", CPENC (3,3,14,11,1), 0, AARCH64_NO_FEATURES) + SYSREG ("pmevcntr26_el0", CPENC (3,3,14,11,2), 0, AARCH64_NO_FEATURES) + SYSREG ("pmevcntr27_el0", CPENC (3,3,14,11,3), 0, AARCH64_NO_FEATURES) + SYSREG ("pmevcntr28_el0", CPENC (3,3,14,11,4), 0, AARCH64_NO_FEATURES) + SYSREG ("pmevcntr29_el0", CPENC (3,3,14,11,5), 0, AARCH64_NO_FEATURES) + SYSREG ("pmevcntr2_el0", CPENC (3,3,14,8,2), 0, AARCH64_NO_FEATURES) + SYSREG ("pmevcntr30_el0", CPENC (3,3,14,11,6), 0, AARCH64_NO_FEATURES) + SYSREG ("pmevcntr3_el0", CPENC (3,3,14,8,3), 0, AARCH64_NO_FEATURES) + SYSREG ("pmevcntr4_el0", CPENC (3,3,14,8,4), 0, AARCH64_NO_FEATURES) + SYSREG ("pmevcntr5_el0", CPENC (3,3,14,8,5), 0, AARCH64_NO_FEATURES) + SYSREG ("pmevcntr6_el0", CPENC (3,3,14,8,6), 0, AARCH64_NO_FEATURES) + SYSREG ("pmevcntr7_el0", CPENC (3,3,14,8,7), 0, AARCH64_NO_FEATURES) + SYSREG ("pmevcntr8_el0", CPENC (3,3,14,9,0), 0, AARCH64_NO_FEATURES) + SYSREG ("pmevcntr9_el0", CPENC (3,3,14,9,1), 0, AARCH64_NO_FEATURES) + SYSREG ("pmevcntsvr0_el1", CPENC (2,0,14,8,0), F_REG_READ, AARCH64_FEATURE (V8_8A)) /* PMUv3_SS */ + SYSREG ("pmevcntsvr10_el1", CPENC (2,0,14,9,2), F_REG_READ, AARCH64_FEATURE (V8_8A)) /* PMUv3_SS */ + SYSREG ("pmevcntsvr11_el1", CPENC (2,0,14,9,3), F_REG_READ, AARCH64_FEATURE (V8_8A)) /* PMUv3_SS */ + SYSREG ("pmevcntsvr12_el1", CPENC (2,0,14,9,4), F_REG_READ, AARCH64_FEATURE (V8_8A)) /* PMUv3_SS */ + SYSREG ("pmevcntsvr13_el1", CPENC (2,0,14,9,5), F_REG_READ, AARCH64_FEATURE (V8_8A)) /* PMUv3_SS */ + SYSREG ("pmevcntsvr14_el1", CPENC (2,0,14,9,6), F_REG_READ, AARCH64_FEATURE (V8_8A)) /* PMUv3_SS */ + SYSREG ("pmevcntsvr15_el1", CPENC (2,0,14,9,7), F_REG_READ, AARCH64_FEATURE (V8_8A)) /* PMUv3_SS */ + SYSREG ("pmevcntsvr16_el1", CPENC (2,0,14,10,0), F_REG_READ, AARCH64_FEATURE (V8_8A)) /* PMUv3_SS */ + SYSREG ("pmevcntsvr17_el1", CPENC (2,0,14,10,1), F_REG_READ, AARCH64_FEATURE (V8_8A)) /* PMUv3_SS */ + SYSREG ("pmevcntsvr18_el1", CPENC (2,0,14,10,2), F_REG_READ, AARCH64_FEATURE (V8_8A)) /* PMUv3_SS */ + SYSREG ("pmevcntsvr19_el1", CPENC (2,0,14,10,3), F_REG_READ, AARCH64_FEATURE (V8_8A)) /* PMUv3_SS */ + SYSREG ("pmevcntsvr1_el1", CPENC (2,0,14,8,1), F_REG_READ, AARCH64_FEATURE (V8_8A)) /* PMUv3_SS */ + SYSREG ("pmevcntsvr20_el1", CPENC (2,0,14,10,4), F_REG_READ, AARCH64_FEATURE (V8_8A)) /* PMUv3_SS */ + SYSREG ("pmevcntsvr21_el1", CPENC (2,0,14,10,5), F_REG_READ, AARCH64_FEATURE (V8_8A)) /* PMUv3_SS */ + SYSREG ("pmevcntsvr22_el1", CPENC (2,0,14,10,6), F_REG_READ, AARCH64_FEATURE (V8_8A)) /* PMUv3_SS */ + SYSREG ("pmevcntsvr23_el1", CPENC (2,0,14,10,7), F_REG_READ, AARCH64_FEATURE (V8_8A)) /* PMUv3_SS */ + SYSREG ("pmevcntsvr24_el1", CPENC (2,0,14,11,0), F_REG_READ, AARCH64_FEATURE (V8_8A)) /* PMUv3_SS */ + SYSREG ("pmevcntsvr25_el1", CPENC (2,0,14,11,1), F_REG_READ, AARCH64_FEATURE (V8_8A)) /* PMUv3_SS */ + SYSREG ("pmevcntsvr26_el1", CPENC (2,0,14,11,2), F_REG_READ, AARCH64_FEATURE (V8_8A)) /* PMUv3_SS */ + SYSREG ("pmevcntsvr27_el1", CPENC (2,0,14,11,3), F_REG_READ, AARCH64_FEATURE (V8_8A)) /* PMUv3_SS */ + SYSREG ("pmevcntsvr28_el1", CPENC (2,0,14,11,4), F_REG_READ, AARCH64_FEATURE (V8_8A)) /* PMUv3_SS */ + SYSREG ("pmevcntsvr29_el1", CPENC (2,0,14,11,5), F_REG_READ, AARCH64_FEATURE (V8_8A)) /* PMUv3_SS */ + SYSREG ("pmevcntsvr2_el1", CPENC (2,0,14,8,2), F_REG_READ, AARCH64_FEATURE (V8_8A)) /* PMUv3_SS */ + SYSREG ("pmevcntsvr30_el1", CPENC (2,0,14,11,6), F_REG_READ, AARCH64_FEATURE (V8_8A)) /* PMUv3_SS */ + SYSREG ("pmevcntsvr3_el1", CPENC (2,0,14,8,3), F_REG_READ, AARCH64_FEATURE (V8_8A)) /* PMUv3_SS */ + SYSREG ("pmevcntsvr4_el1", CPENC (2,0,14,8,4), F_REG_READ, AARCH64_FEATURE (V8_8A)) /* PMUv3_SS */ + SYSREG ("pmevcntsvr5_el1", CPENC (2,0,14,8,5), F_REG_READ, AARCH64_FEATURE (V8_8A)) /* PMUv3_SS */ + SYSREG ("pmevcntsvr6_el1", CPENC (2,0,14,8,6), F_REG_READ, AARCH64_FEATURE (V8_8A)) /* PMUv3_SS */ + SYSREG ("pmevcntsvr7_el1", CPENC (2,0,14,8,7), F_REG_READ, AARCH64_FEATURE (V8_8A)) /* PMUv3_SS */ + SYSREG ("pmevcntsvr8_el1", CPENC (2,0,14,9,0), F_REG_READ, AARCH64_FEATURE (V8_8A)) /* PMUv3_SS */ + SYSREG ("pmevcntsvr9_el1", CPENC (2,0,14,9,1), F_REG_READ, AARCH64_FEATURE (V8_8A)) /* PMUv3_SS */ + SYSREG ("pmevtyper0_el0", CPENC (3,3,14,12,0), 0, AARCH64_NO_FEATURES) + SYSREG ("pmevtyper10_el0", CPENC (3,3,14,13,2), 0, AARCH64_NO_FEATURES) + SYSREG ("pmevtyper11_el0", CPENC (3,3,14,13,3), 0, AARCH64_NO_FEATURES) + SYSREG ("pmevtyper12_el0", CPENC (3,3,14,13,4), 0, AARCH64_NO_FEATURES) + SYSREG ("pmevtyper13_el0", CPENC (3,3,14,13,5), 0, AARCH64_NO_FEATURES) + SYSREG ("pmevtyper14_el0", CPENC (3,3,14,13,6), 0, AARCH64_NO_FEATURES) + SYSREG ("pmevtyper15_el0", CPENC (3,3,14,13,7), 0, AARCH64_NO_FEATURES) + SYSREG ("pmevtyper16_el0", CPENC (3,3,14,14,0), 0, AARCH64_NO_FEATURES) + SYSREG ("pmevtyper17_el0", CPENC (3,3,14,14,1), 0, AARCH64_NO_FEATURES) + SYSREG ("pmevtyper18_el0", CPENC (3,3,14,14,2), 0, AARCH64_NO_FEATURES) + SYSREG ("pmevtyper19_el0", CPENC (3,3,14,14,3), 0, AARCH64_NO_FEATURES) + SYSREG ("pmevtyper1_el0", CPENC (3,3,14,12,1), 0, AARCH64_NO_FEATURES) + SYSREG ("pmevtyper20_el0", CPENC (3,3,14,14,4), 0, AARCH64_NO_FEATURES) + SYSREG ("pmevtyper21_el0", CPENC (3,3,14,14,5), 0, AARCH64_NO_FEATURES) + SYSREG ("pmevtyper22_el0", CPENC (3,3,14,14,6), 0, AARCH64_NO_FEATURES) + SYSREG ("pmevtyper23_el0", CPENC (3,3,14,14,7), 0, AARCH64_NO_FEATURES) + SYSREG ("pmevtyper24_el0", CPENC (3,3,14,15,0), 0, AARCH64_NO_FEATURES) + SYSREG ("pmevtyper25_el0", CPENC (3,3,14,15,1), 0, AARCH64_NO_FEATURES) + SYSREG ("pmevtyper26_el0", CPENC (3,3,14,15,2), 0, AARCH64_NO_FEATURES) + SYSREG ("pmevtyper27_el0", CPENC (3,3,14,15,3), 0, AARCH64_NO_FEATURES) + SYSREG ("pmevtyper28_el0", CPENC (3,3,14,15,4), 0, AARCH64_NO_FEATURES) + SYSREG ("pmevtyper29_el0", CPENC (3,3,14,15,5), 0, AARCH64_NO_FEATURES) + SYSREG ("pmevtyper2_el0", CPENC (3,3,14,12,2), 0, AARCH64_NO_FEATURES) + SYSREG ("pmevtyper30_el0", CPENC (3,3,14,15,6), 0, AARCH64_NO_FEATURES) + SYSREG ("pmevtyper3_el0", CPENC (3,3,14,12,3), 0, AARCH64_NO_FEATURES) + SYSREG ("pmevtyper4_el0", CPENC (3,3,14,12,4), 0, AARCH64_NO_FEATURES) + SYSREG ("pmevtyper5_el0", CPENC (3,3,14,12,5), 0, AARCH64_NO_FEATURES) + SYSREG ("pmevtyper6_el0", CPENC (3,3,14,12,6), 0, AARCH64_NO_FEATURES) + SYSREG ("pmevtyper7_el0", CPENC (3,3,14,12,7), 0, AARCH64_NO_FEATURES) + SYSREG ("pmevtyper8_el0", CPENC (3,3,14,13,0), 0, AARCH64_NO_FEATURES) + SYSREG ("pmevtyper9_el0", CPENC (3,3,14,13,1), 0, AARCH64_NO_FEATURES) + SYSREG ("pmiar_el1", CPENC (3,0,9,14,7), 0, AARCH64_FEATURE (V9_3A)) /* SEBEP */ + SYSREG ("pmicfiltr_el0", CPENC (3,3,9,6,0), 0, AARCH64_FEATURE (V8_8A)) /* PMUv3_ICNTR */ + SYSREG ("pmicntr_el0", CPENC (3,3,9,4,0), 0, AARCH64_FEATURE (V8_8A)) /* PMUv3_ICNTR */ + SYSREG ("pmicntsvr_el1", CPENC (2,0,14,12,0), F_REG_READ, AARCH64_FEATURE (V8_8A)) /* PMUv3_ICNTR && PMUv3_SS */ + SYSREG ("pmintenclr_el1", CPENC (3,0,9,14,2), 0, AARCH64_NO_FEATURES) + SYSREG ("pmintenset_el1", CPENC (3,0,9,14,1), 0, AARCH64_NO_FEATURES) + SYSREG ("pmmir_el1", CPENC (3,0,9,14,6), F_REG_READ, AARCH64_FEATURE (V8_3A)) /* PMUv3p4 */ + SYSREG ("pmovsclr_el0", CPENC (3,3,9,12,3), 0, AARCH64_NO_FEATURES) + SYSREG ("pmovsset_el0", CPENC (3,3,9,14,3), 0, AARCH64_NO_FEATURES) + SYSREG ("pmscr_el1", CPENC (3,0,9,9,0), 0, AARCH64_FEATURE (PROFILE)) + SYSREG ("pmscr_el12", CPENC (3,5,9,9,0), 0, AARCH64_FEATURE (PROFILE)) + SYSREG ("pmscr_el2", CPENC (3,4,9,9,0), 0, AARCH64_FEATURE (PROFILE)) + SYSREG ("pmsdsfr_el1", CPENC (3,0,9,10,4), 0, AARCH64_FEATURES (2, PROFILE, V8_8A)) /* SPE_FDS */ + SYSREG ("pmselr_el0", CPENC (3,3,9,12,5), 0, AARCH64_NO_FEATURES) + SYSREG ("pmsevfr_el1", CPENC (3,0,9,9,5), 0, AARCH64_FEATURE (PROFILE)) + SYSREG ("pmsfcr_el1", CPENC (3,0,9,9,4), 0, AARCH64_FEATURE (PROFILE)) + SYSREG ("pmsicr_el1", CPENC (3,0,9,9,2), 0, AARCH64_FEATURE (PROFILE)) + SYSREG ("pmsidr_el1", CPENC (3,0,9,9,7), F_REG_READ, AARCH64_FEATURE (PROFILE)) + SYSREG ("pmsirr_el1", CPENC (3,0,9,9,3), 0, AARCH64_FEATURE (PROFILE)) + SYSREG ("pmslatfr_el1", CPENC (3,0,9,9,6), 0, AARCH64_FEATURE (PROFILE)) + SYSREG ("pmsnevfr_el1", CPENC (3,0,9,9,1), 0, AARCH64_FEATURES (2, PROFILE, V8_6A)) /* SPE_FnE */ + SYSREG ("pmsscr_el1", CPENC (3,0,9,13,3), 0, AARCH64_FEATURE (V8_8A)) /* PMUv3_SS */ + SYSREG ("pmswinc_el0", CPENC (3,3,9,12,4), F_REG_WRITE, AARCH64_NO_FEATURES) + SYSREG ("pmuacr_el1", CPENC (3,0,9,14,4), 0, AARCH64_FEATURE (V8_8A)) /* PMUv3p9 */ + SYSREG ("pmuserenr_el0", CPENC (3,3,9,14,0), 0, AARCH64_NO_FEATURES) + SYSREG ("pmxevcntr_el0", CPENC (3,3,9,13,2), 0, AARCH64_NO_FEATURES) + SYSREG ("pmxevtyper_el0", CPENC (3,3,9,13,1), 0, AARCH64_NO_FEATURES) + SYSREG ("pmzr_el0", CPENC (3,3,9,13,4), F_REG_WRITE, AARCH64_FEATURE (V8_8A)) /* PMUv3p9 */ + SYSREG ("por_el0", CPENC (3,3,10,2,4), 0, AARCH64_FEATURE (V8_8A)) /* S1POE */ + SYSREG ("por_el1", CPENC (3,0,10,2,4), 0, AARCH64_FEATURE (V8_8A)) /* S1POE */ + SYSREG ("por_el12", CPENC (3,5,10,2,4), 0, AARCH64_FEATURE (V8_8A)) /* S1POE */ + SYSREG ("por_el2", CPENC (3,4,10,2,4), 0, AARCH64_FEATURE (V8_8A)) /* S1POE */ + SYSREG ("por_el3", CPENC (3,6,10,2,4), 0, AARCH64_FEATURE (V8_8A)) /* S1POE */ + SYSREG ("prbar10_el1", CPENC (3,0,6,13,0), 0, AARCH64_FEATURE (V8R)) + SYSREG ("prbar10_el2", CPENC (3,4,6,13,0), 0, AARCH64_FEATURE (V8R)) + SYSREG ("prbar11_el1", CPENC (3,0,6,13,4), 0, AARCH64_FEATURE (V8R)) + SYSREG ("prbar11_el2", CPENC (3,4,6,13,4), 0, AARCH64_FEATURE (V8R)) + SYSREG ("prbar12_el1", CPENC (3,0,6,14,0), 0, AARCH64_FEATURE (V8R)) + SYSREG ("prbar12_el2", CPENC (3,4,6,14,0), 0, AARCH64_FEATURE (V8R)) + SYSREG ("prbar13_el1", CPENC (3,0,6,14,4), 0, AARCH64_FEATURE (V8R)) + SYSREG ("prbar13_el2", CPENC (3,4,6,14,4), 0, AARCH64_FEATURE (V8R)) + SYSREG ("prbar14_el1", CPENC (3,0,6,15,0), 0, AARCH64_FEATURE (V8R)) + SYSREG ("prbar14_el2", CPENC (3,4,6,15,0), 0, AARCH64_FEATURE (V8R)) + SYSREG ("prbar15_el1", CPENC (3,0,6,15,4), 0, AARCH64_FEATURE (V8R)) + SYSREG ("prbar15_el2", CPENC (3,4,6,15,4), 0, AARCH64_FEATURE (V8R)) + SYSREG ("prbar1_el1", CPENC (3,0,6,8,4), 0, AARCH64_FEATURE (V8R)) + SYSREG ("prbar1_el2", CPENC (3,4,6,8,4), 0, AARCH64_FEATURE (V8R)) + SYSREG ("prbar2_el1", CPENC (3,0,6,9,0), 0, AARCH64_FEATURE (V8R)) + SYSREG ("prbar2_el2", CPENC (3,4,6,9,0), 0, AARCH64_FEATURE (V8R)) + SYSREG ("prbar3_el1", CPENC (3,0,6,9,4), 0, AARCH64_FEATURE (V8R)) + SYSREG ("prbar3_el2", CPENC (3,4,6,9,4), 0, AARCH64_FEATURE (V8R)) + SYSREG ("prbar4_el1", CPENC (3,0,6,10,0), 0, AARCH64_FEATURE (V8R)) + SYSREG ("prbar4_el2", CPENC (3,4,6,10,0), 0, AARCH64_FEATURE (V8R)) + SYSREG ("prbar5_el1", CPENC (3,0,6,10,4), 0, AARCH64_FEATURE (V8R)) + SYSREG ("prbar5_el2", CPENC (3,4,6,10,4), 0, AARCH64_FEATURE (V8R)) + SYSREG ("prbar6_el1", CPENC (3,0,6,11,0), 0, AARCH64_FEATURE (V8R)) + SYSREG ("prbar6_el2", CPENC (3,4,6,11,0), 0, AARCH64_FEATURE (V8R)) + SYSREG ("prbar7_el1", CPENC (3,0,6,11,4), 0, AARCH64_FEATURE (V8R)) + SYSREG ("prbar7_el2", CPENC (3,4,6,11,4), 0, AARCH64_FEATURE (V8R)) + SYSREG ("prbar8_el1", CPENC (3,0,6,12,0), 0, AARCH64_FEATURE (V8R)) + SYSREG ("prbar8_el2", CPENC (3,4,6,12,0), 0, AARCH64_FEATURE (V8R)) + SYSREG ("prbar9_el1", CPENC (3,0,6,12,4), 0, AARCH64_FEATURE (V8R)) + SYSREG ("prbar9_el2", CPENC (3,4,6,12,4), 0, AARCH64_FEATURE (V8R)) + SYSREG ("prbar_el1", CPENC (3,0,6,8,0), 0, AARCH64_FEATURE (V8R)) + SYSREG ("prbar_el2", CPENC (3,4,6,8,0), 0, AARCH64_FEATURE (V8R)) + SYSREG ("prenr_el1", CPENC (3,0,6,1,1), 0, AARCH64_FEATURE (V8R)) + SYSREG ("prenr_el2", CPENC (3,4,6,1,1), 0, AARCH64_FEATURE (V8R)) + SYSREG ("prlar10_el1", CPENC (3,0,6,13,1), 0, AARCH64_FEATURE (V8R)) + SYSREG ("prlar10_el2", CPENC (3,4,6,13,1), 0, AARCH64_FEATURE (V8R)) + SYSREG ("prlar11_el1", CPENC (3,0,6,13,5), 0, AARCH64_FEATURE (V8R)) + SYSREG ("prlar11_el2", CPENC (3,4,6,13,5), 0, AARCH64_FEATURE (V8R)) + SYSREG ("prlar12_el1", CPENC (3,0,6,14,1), 0, AARCH64_FEATURE (V8R)) + SYSREG ("prlar12_el2", CPENC (3,4,6,14,1), 0, AARCH64_FEATURE (V8R)) + SYSREG ("prlar13_el1", CPENC (3,0,6,14,5), 0, AARCH64_FEATURE (V8R)) + SYSREG ("prlar13_el2", CPENC (3,4,6,14,5), 0, AARCH64_FEATURE (V8R)) + SYSREG ("prlar14_el1", CPENC (3,0,6,15,1), 0, AARCH64_FEATURE (V8R)) + SYSREG ("prlar14_el2", CPENC (3,4,6,15,1), 0, AARCH64_FEATURE (V8R)) + SYSREG ("prlar15_el1", CPENC (3,0,6,15,5), 0, AARCH64_FEATURE (V8R)) + SYSREG ("prlar15_el2", CPENC (3,4,6,15,5), 0, AARCH64_FEATURE (V8R)) + SYSREG ("prlar1_el1", CPENC (3,0,6,8,5), 0, AARCH64_FEATURE (V8R)) + SYSREG ("prlar1_el2", CPENC (3,4,6,8,5), 0, AARCH64_FEATURE (V8R)) + SYSREG ("prlar2_el1", CPENC (3,0,6,9,1), 0, AARCH64_FEATURE (V8R)) + SYSREG ("prlar2_el2", CPENC (3,4,6,9,1), 0, AARCH64_FEATURE (V8R)) + SYSREG ("prlar3_el1", CPENC (3,0,6,9,5), 0, AARCH64_FEATURE (V8R)) + SYSREG ("prlar3_el2", CPENC (3,4,6,9,5), 0, AARCH64_FEATURE (V8R)) + SYSREG ("prlar4_el1", CPENC (3,0,6,10,1), 0, AARCH64_FEATURE (V8R)) + SYSREG ("prlar4_el2", CPENC (3,4,6,10,1), 0, AARCH64_FEATURE (V8R)) + SYSREG ("prlar5_el1", CPENC (3,0,6,10,5), 0, AARCH64_FEATURE (V8R)) + SYSREG ("prlar5_el2", CPENC (3,4,6,10,5), 0, AARCH64_FEATURE (V8R)) + SYSREG ("prlar6_el1", CPENC (3,0,6,11,1), 0, AARCH64_FEATURE (V8R)) + SYSREG ("prlar6_el2", CPENC (3,4,6,11,1), 0, AARCH64_FEATURE (V8R)) + SYSREG ("prlar7_el1", CPENC (3,0,6,11,5), 0, AARCH64_FEATURE (V8R)) + SYSREG ("prlar7_el2", CPENC (3,4,6,11,5), 0, AARCH64_FEATURE (V8R)) + SYSREG ("prlar8_el1", CPENC (3,0,6,12,1), 0, AARCH64_FEATURE (V8R)) + SYSREG ("prlar8_el2", CPENC (3,4,6,12,1), 0, AARCH64_FEATURE (V8R)) + SYSREG ("prlar9_el1", CPENC (3,0,6,12,5), 0, AARCH64_FEATURE (V8R)) + SYSREG ("prlar9_el2", CPENC (3,4,6,12,5), 0, AARCH64_FEATURE (V8R)) + SYSREG ("prlar_el1", CPENC (3,0,6,8,1), 0, AARCH64_FEATURE (V8R)) + SYSREG ("prlar_el2", CPENC (3,4,6,8,1), 0, AARCH64_FEATURE (V8R)) + SYSREG ("prselr_el1", CPENC (3,0,6,2,1), 0, AARCH64_FEATURE (V8R)) + SYSREG ("prselr_el2", CPENC (3,4,6,2,1), 0, AARCH64_FEATURE (V8R)) + SYSREG ("rcwmask_el1", CPENC (3,0,13,0,6), F_REG_128, AARCH64_FEATURE (THE)) + SYSREG ("rcwsmask_el1", CPENC (3,0,13,0,3), F_REG_128, AARCH64_FEATURE (THE)) + SYSREG ("revidr_el1", CPENC (3,0,0,0,6), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("rgsr_el1", CPENC (3,0,1,0,5), 0, AARCH64_FEATURE (MEMTAG)) + SYSREG ("rmr_el1", CPENC (3,0,12,0,2), 0, AARCH64_NO_FEATURES) + SYSREG ("rmr_el2", CPENC (3,4,12,0,2), 0, AARCH64_NO_FEATURES) + SYSREG ("rmr_el3", CPENC (3,6,12,0,2), 0, AARCH64_NO_FEATURES) + SYSREG ("rndr", CPENC (3,3,2,4,0), F_REG_READ, AARCH64_FEATURE (RNG)) + SYSREG ("rndrrs", CPENC (3,3,2,4,1), F_REG_READ, AARCH64_FEATURE (RNG)) + SYSREG ("rvbar_el1", CPENC (3,0,12,0,1), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("rvbar_el2", CPENC (3,4,12,0,1), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("rvbar_el3", CPENC (3,6,12,0,1), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("s2pir_el2", CPENC (3,4,10,2,5), 0, AARCH64_FEATURE (V8_8A)) /* S2PIE */ + SYSREG ("s2por_el1", CPENC (3,0,10,2,5), 0, AARCH64_FEATURE (V8_8A)) /* S2POE */ + SYSREG ("scr_el3", CPENC (3,6,1,1,0), 0, AARCH64_NO_FEATURES) + SYSREG ("sctlr_el1", CPENC (3,0,1,0,0), 0, AARCH64_NO_FEATURES) + SYSREG ("sctlr_el12", CPENC (3,5,1,0,0), 0, AARCH64_NO_FEATURES) + SYSREG ("sctlr_el2", CPENC (3,4,1,0,0), 0, AARCH64_NO_FEATURES) + SYSREG ("sctlr_el3", CPENC (3,6,1,0,0), 0, AARCH64_NO_FEATURES) + SYSREG ("sctlr2_el1", CPENC (3,0,1,0,3), 0, AARCH64_NO_FEATURES) + SYSREG ("sctlr2_el12", CPENC (3,5,1,0,3), 0, AARCH64_NO_FEATURES) + SYSREG ("sctlr2_el2", CPENC (3,4,1,0,3), 0, AARCH64_NO_FEATURES) + SYSREG ("sctlr2_el3", CPENC (3,6,1,0,3), 0, AARCH64_NO_FEATURES) + SYSREG ("sctlr2alias_el1", CPENC (3,0,1,4,7), 0, AARCH64_FEATURE (V9_5A)) /* SRMASK */ + SYSREG ("sctlr2mask_el1", CPENC (3,0,1,4,3), 0, AARCH64_FEATURE (V9_5A)) /* SRMASK */ + SYSREG ("sctlr2mask_el12", CPENC (3,5,1,4,3), 0, AARCH64_FEATURE (V9_5A)) /* SRMASK */ + SYSREG ("sctlr2mask_el2", CPENC (3,4,1,4,3), 0, AARCH64_FEATURE (V9_5A)) /* SRMASK */ + SYSREG ("sctlralias_el1", CPENC (3,0,1,4,6), 0, AARCH64_FEATURE (V9_5A)) /* SRMASK */ + SYSREG ("sctlrmask_el1", CPENC (3,0,1,4,0), 0, AARCH64_FEATURE (V9_5A)) /* SRMASK */ + SYSREG ("sctlrmask_el12", CPENC (3,5,1,4,0), 0, AARCH64_FEATURE (V9_5A)) /* SRMASK */ + SYSREG ("sctlrmask_el2", CPENC (3,4,1,4,0), 0, AARCH64_FEATURE (V9_5A)) /* SRMASK */ + SYSREG ("scxtnum_el0", CPENC (3,3,13,0,7), 0, AARCH64_NO_FEATURES) /* CSV2_2 || CSV2_1p2 */ + SYSREG ("scxtnum_el1", CPENC (3,0,13,0,7), 0, AARCH64_NO_FEATURES) /* CSV2_2 || CSV2_1p2 */ + SYSREG ("scxtnum_el12", CPENC (3,5,13,0,7), 0, AARCH64_NO_FEATURES) /* CSV2_2 || CSV2_1p2 */ + SYSREG ("scxtnum_el2", CPENC (3,4,13,0,7), 0, AARCH64_NO_FEATURES) /* CSV2_2 || CSV2_1p2 */ + SYSREG ("scxtnum_el3", CPENC (3,6,13,0,7), 0, AARCH64_NO_FEATURES) /* CSV2_2 || CSV2_1p2 */ + SYSREG ("sder32_el2", CPENC (3,4,1,3,1), 0, AARCH64_FEATURE (V8_3A)) /* SEL2 */ + SYSREG ("sder32_el3", CPENC (3,6,1,1,1), 0, AARCH64_NO_FEATURES) + SYSREG ("smcr_el1", CPENC (3,0,1,2,6), 0, AARCH64_FEATURE (SME)) + SYSREG ("smcr_el12", CPENC (3,5,1,2,6), 0, AARCH64_FEATURE (SME)) + SYSREG ("smcr_el2", CPENC (3,4,1,2,6), 0, AARCH64_FEATURE (SME)) + SYSREG ("smcr_el3", CPENC (3,6,1,2,6), 0, AARCH64_FEATURE (SME)) + SYSREG ("smidr_el1", CPENC (3,1,0,0,6), F_REG_READ, AARCH64_FEATURE (SME)) + SYSREG ("smpri_el1", CPENC (3,0,1,2,4), 0, AARCH64_FEATURE (SME)) + SYSREG ("smprimap_el2", CPENC (3,4,1,2,5), 0, AARCH64_FEATURE (SME)) + SYSREG ("sp_el0", CPENC (3,0,4,1,0), 0, AARCH64_NO_FEATURES) + SYSREG ("sp_el1", CPENC (3,4,4,1,0), 0, AARCH64_NO_FEATURES) + SYSREG ("sp_el2", CPENC (3,6,4,1,0), 0, AARCH64_NO_FEATURES) + SYSREG ("spmaccessr_el1", CPENC (2,0,9,13,3), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmaccessr_el12", CPENC (2,5,9,13,3), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmaccessr_el2", CPENC (2,4,9,13,3), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmaccessr_el3", CPENC (2,6,9,13,3), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmcfgr_el1", CPENC (2,0,9,13,7), F_REG_READ, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmcgcr0_el1", CPENC (2,0,9,13,0), F_REG_READ, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmcgcr1_el1", CPENC (2,0,9,13,1), F_REG_READ, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmcntenclr_el0", CPENC (2,3,9,12,2), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmcntenset_el0", CPENC (2,3,9,12,1), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmcr_el0", CPENC (2,3,9,12,0), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmdevaff_el1", CPENC (2,0,9,13,6), F_REG_READ, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmdevarch_el1", CPENC (2,0,9,13,5), F_REG_READ, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmevcntr0_el0", CPENC (2,3,14,0,0), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmevcntr1_el0", CPENC (2,3,14,0,1), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmevcntr2_el0", CPENC (2,3,14,0,2), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmevcntr3_el0", CPENC (2,3,14,0,3), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmevcntr4_el0", CPENC (2,3,14,0,4), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmevcntr5_el0", CPENC (2,3,14,0,5), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmevcntr6_el0", CPENC (2,3,14,0,6), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmevcntr7_el0", CPENC (2,3,14,0,7), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmevcntr8_el0", CPENC (2,3,14,1,0), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmevcntr9_el0", CPENC (2,3,14,1,1), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmevcntr10_el0", CPENC (2,3,14,1,2), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmevcntr11_el0", CPENC (2,3,14,1,3), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmevcntr12_el0", CPENC (2,3,14,1,4), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmevcntr13_el0", CPENC (2,3,14,1,5), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmevcntr14_el0", CPENC (2,3,14,1,6), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmevcntr15_el0", CPENC (2,3,14,1,7), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmevfilt2r0_el0", CPENC (2,3,14,6,0), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmevfilt2r1_el0", CPENC (2,3,14,6,1), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmevfilt2r2_el0", CPENC (2,3,14,6,2), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmevfilt2r3_el0", CPENC (2,3,14,6,3), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmevfilt2r4_el0", CPENC (2,3,14,6,4), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmevfilt2r5_el0", CPENC (2,3,14,6,5), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmevfilt2r6_el0", CPENC (2,3,14,6,6), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmevfilt2r7_el0", CPENC (2,3,14,6,7), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmevfilt2r8_el0", CPENC (2,3,14,7,0), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmevfilt2r9_el0", CPENC (2,3,14,7,1), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmevfilt2r10_el0", CPENC (2,3,14,7,2), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmevfilt2r11_el0", CPENC (2,3,14,7,3), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmevfilt2r12_el0", CPENC (2,3,14,7,4), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmevfilt2r13_el0", CPENC (2,3,14,7,5), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmevfilt2r14_el0", CPENC (2,3,14,7,6), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmevfilt2r15_el0", CPENC (2,3,14,7,7), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmevfiltr0_el0", CPENC (2,3,14,4,0), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmevfiltr1_el0", CPENC (2,3,14,4,1), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmevfiltr2_el0", CPENC (2,3,14,4,2), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmevfiltr3_el0", CPENC (2,3,14,4,3), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmevfiltr4_el0", CPENC (2,3,14,4,4), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmevfiltr5_el0", CPENC (2,3,14,4,5), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmevfiltr6_el0", CPENC (2,3,14,4,6), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmevfiltr7_el0", CPENC (2,3,14,4,7), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmevfiltr8_el0", CPENC (2,3,14,5,0), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmevfiltr9_el0", CPENC (2,3,14,5,1), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmevfiltr10_el0", CPENC (2,3,14,5,2), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmevfiltr11_el0", CPENC (2,3,14,5,3), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmevfiltr12_el0", CPENC (2,3,14,5,4), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmevfiltr13_el0", CPENC (2,3,14,5,5), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmevfiltr14_el0", CPENC (2,3,14,5,6), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmevfiltr15_el0", CPENC (2,3,14,5,7), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmevtyper0_el0", CPENC (2,3,14,2,0), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmevtyper1_el0", CPENC (2,3,14,2,1), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmevtyper2_el0", CPENC (2,3,14,2,2), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmevtyper3_el0", CPENC (2,3,14,2,3), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmevtyper4_el0", CPENC (2,3,14,2,4), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmevtyper5_el0", CPENC (2,3,14,2,5), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmevtyper6_el0", CPENC (2,3,14,2,6), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmevtyper7_el0", CPENC (2,3,14,2,7), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmevtyper8_el0", CPENC (2,3,14,3,0), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmevtyper9_el0", CPENC (2,3,14,3,1), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmevtyper10_el0", CPENC (2,3,14,3,2), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmevtyper11_el0", CPENC (2,3,14,3,3), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmevtyper12_el0", CPENC (2,3,14,3,4), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmevtyper13_el0", CPENC (2,3,14,3,5), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmevtyper14_el0", CPENC (2,3,14,3,6), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmevtyper15_el0", CPENC (2,3,14,3,7), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmiidr_el1", CPENC (2,0,9,13,4), F_REG_READ, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmintenclr_el1", CPENC (2,0,9,14,2), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmintenset_el1", CPENC (2,0,9,14,1), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmovsclr_el0", CPENC (2,3,9,12,3), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmovsset_el0", CPENC (2,3,9,14,3), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmrootcr_el3", CPENC (2,6,9,14,7), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmscr_el1", CPENC (2,7,9,14,7), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmselr_el0", CPENC (2,3,9,12,5), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ + SYSREG ("spmzr_el0", CPENC (2,3,9,12,4), F_REG_WRITE, AARCH64_FEATURE (V9_4A)) /* SPMU2 */ + SYSREG ("spsel", CPENC (3,0,4,2,0), 0, AARCH64_NO_FEATURES) + SYSREG ("spsr_abt", CPENC (3,4,4,3,1), 0, AARCH64_NO_FEATURES) + SYSREG ("spsr_el1", CPENC (3,0,4,0,0), 0, AARCH64_NO_FEATURES) + SYSREG ("spsr_el12", CPENC (3,5,4,0,0), 0, AARCH64_NO_FEATURES) + SYSREG ("spsr_el2", CPENC (3,4,4,0,0), 0, AARCH64_NO_FEATURES) + SYSREG ("spsr_el3", CPENC (3,6,4,0,0), 0, AARCH64_NO_FEATURES) + SYSREG ("spsr_fiq", CPENC (3,4,4,3,3), 0, AARCH64_NO_FEATURES) + SYSREG ("spsr_hyp", CPENC (3,4,4,0,0), F_DEPRECATED, AARCH64_NO_FEATURES) + SYSREG ("spsr_irq", CPENC (3,4,4,3,0), 0, AARCH64_NO_FEATURES) + SYSREG ("spsr_svc", CPENC (3,0,4,0,0), F_DEPRECATED, AARCH64_NO_FEATURES) + SYSREG ("spsr_und", CPENC (3,4,4,3,2), 0, AARCH64_NO_FEATURES) + SYSREG ("ssbs", CPENC (3,3,4,2,6), 0, AARCH64_FEATURE (SSBS)) + SYSREG ("svcr", CPENC (3,3,4,2,2), 0, AARCH64_FEATURE (SME)) + SYSREG ("tco", CPENC (3,3,4,2,7), 0, AARCH64_FEATURE (MEMTAG)) + SYSREG ("tcr_el1", CPENC (3,0,2,0,2), 0, AARCH64_NO_FEATURES) + SYSREG ("tcr_el12", CPENC (3,5,2,0,2), 0, AARCH64_NO_FEATURES) + SYSREG ("tcr_el2", CPENC (3,4,2,0,2), 0, AARCH64_NO_FEATURES) + SYSREG ("tcr_el3", CPENC (3,6,2,0,2), 0, AARCH64_NO_FEATURES) + SYSREG ("tcr2_el1", CPENC (3,0,2,0,3), 0, AARCH64_NO_FEATURES) + SYSREG ("tcr2_el12", CPENC (3,5,2,0,3), 0, AARCH64_NO_FEATURES) + SYSREG ("tcr2_el2", CPENC (3,4,2,0,3), 0, AARCH64_NO_FEATURES) + SYSREG ("tcr2alias_el1", CPENC (3,0,2,7,7), 0, AARCH64_FEATURE (V9_5A)) /* SRMASK */ + SYSREG ("tcr2mask_el1", CPENC (3,0,2,7,3), 0, AARCH64_FEATURE (V9_5A)) /* SRMASK */ + SYSREG ("tcr2mask_el12", CPENC (3,5,2,7,3), 0, AARCH64_FEATURE (V9_5A)) /* SRMASK */ + SYSREG ("tcr2mask_el2", CPENC (3,4,2,7,3), 0, AARCH64_FEATURE (V9_5A)) /* SRMASK */ + SYSREG ("tcralias_el1", CPENC (3,0,2,7,6), 0, AARCH64_FEATURE (V9_5A)) /* SRMASK */ + SYSREG ("tcrmask_el1", CPENC (3,0,2,7,2), 0, AARCH64_FEATURE (V9_5A)) /* SRMASK */ + SYSREG ("tcrmask_el12", CPENC (3,5,2,7,2), 0, AARCH64_FEATURE (V9_5A)) /* SRMASK */ + SYSREG ("tcrmask_el2", CPENC (3,4,2,7,2), 0, AARCH64_FEATURE (V9_5A)) /* SRMASK */ + SYSREG ("tfsr_el1", CPENC (3,0,5,6,0), 0, AARCH64_FEATURE (MEMTAG)) + SYSREG ("tfsr_el12", CPENC (3,5,5,6,0), 0, AARCH64_FEATURE (MEMTAG)) + SYSREG ("tfsr_el2", CPENC (3,4,5,6,0), 0, AARCH64_FEATURE (MEMTAG)) + SYSREG ("tfsr_el3", CPENC (3,6,5,6,0), 0, AARCH64_FEATURE (MEMTAG)) + SYSREG ("tfsre0_el1", CPENC (3,0,5,6,1), 0, AARCH64_FEATURE (MEMTAG)) + SYSREG ("tpidr2_el0", CPENC (3,3,13,0,5), 0, AARCH64_FEATURE (SME)) + SYSREG ("tpidr_el0", CPENC (3,3,13,0,2), 0, AARCH64_NO_FEATURES) + SYSREG ("tpidr_el1", CPENC (3,0,13,0,4), 0, AARCH64_NO_FEATURES) + SYSREG ("tpidr_el2", CPENC (3,4,13,0,2), 0, AARCH64_NO_FEATURES) + SYSREG ("tpidr_el3", CPENC (3,6,13,0,2), 0, AARCH64_NO_FEATURES) + SYSREG ("tpidrro_el0", CPENC (3,3,13,0,3), 0, AARCH64_NO_FEATURES) + SYSREG ("trbbaser_el1", CPENC (3,0,9,11,2), 0, AARCH64_FEATURE (V9A)) /* TRBE */ + SYSREG ("trbidr_el1", CPENC (3,0,9,11,7), F_REG_READ, AARCH64_FEATURE (V9A)) /* TRBE */ + SYSREG ("trblimitr_el1", CPENC (3,0,9,11,0), 0, AARCH64_FEATURE (V9A)) /* TRBE */ + SYSREG ("trbmar_el1", CPENC (3,0,9,11,4), 0, AARCH64_FEATURE (V9A)) /* TRBE */ + SYSREG ("trbmpam_el1", CPENC (3,0,9,11,5), 0, AARCH64_FEATURE (V9_3A)) /* TRBE_MPAM */ + SYSREG ("trbptr_el1", CPENC (3,0,9,11,1), 0, AARCH64_FEATURE (V9A)) /* TRBE */ + SYSREG ("trbsr_el1", CPENC (3,0,9,11,3), 0, AARCH64_FEATURE (V9A)) /* TRBE */ + SYSREG ("trbsr_el12", CPENC (3,5,9,11,3), 0, AARCH64_FEATURE (V9_5A)) /* TRBE_EXC */ + SYSREG ("trbsr_el2", CPENC (3,4,9,11,3), 0, AARCH64_FEATURE (V9_5A)) /* TRBE_EXC */ + SYSREG ("trbsr_el3", CPENC (3,6,9,11,3), 0, AARCH64_FEATURE (V9_5A)) /* TRBE_EXC */ + SYSREG ("trbtrg_el1", CPENC (3,0,9,11,6), 0, AARCH64_FEATURE (V9A)) /* TRBE */ + SYSREG ("trcacatr0", CPENC (2,1,2,0,2), 0, AARCH64_NO_FEATURES) + SYSREG ("trcacatr1", CPENC (2,1,2,2,2), 0, AARCH64_NO_FEATURES) + SYSREG ("trcacatr10", CPENC (2,1,2,4,3), 0, AARCH64_NO_FEATURES) + SYSREG ("trcacatr11", CPENC (2,1,2,6,3), 0, AARCH64_NO_FEATURES) + SYSREG ("trcacatr12", CPENC (2,1,2,8,3), 0, AARCH64_NO_FEATURES) + SYSREG ("trcacatr13", CPENC (2,1,2,10,3), 0, AARCH64_NO_FEATURES) + SYSREG ("trcacatr14", CPENC (2,1,2,12,3), 0, AARCH64_NO_FEATURES) + SYSREG ("trcacatr15", CPENC (2,1,2,14,3), 0, AARCH64_NO_FEATURES) + SYSREG ("trcacatr2", CPENC (2,1,2,4,2), 0, AARCH64_NO_FEATURES) + SYSREG ("trcacatr3", CPENC (2,1,2,6,2), 0, AARCH64_NO_FEATURES) + SYSREG ("trcacatr4", CPENC (2,1,2,8,2), 0, AARCH64_NO_FEATURES) + SYSREG ("trcacatr5", CPENC (2,1,2,10,2), 0, AARCH64_NO_FEATURES) + SYSREG ("trcacatr6", CPENC (2,1,2,12,2), 0, AARCH64_NO_FEATURES) + SYSREG ("trcacatr7", CPENC (2,1,2,14,2), 0, AARCH64_NO_FEATURES) + SYSREG ("trcacatr8", CPENC (2,1,2,0,3), 0, AARCH64_NO_FEATURES) + SYSREG ("trcacatr9", CPENC (2,1,2,2,3), 0, AARCH64_NO_FEATURES) + SYSREG ("trcacvr0", CPENC (2,1,2,0,0), 0, AARCH64_NO_FEATURES) + SYSREG ("trcacvr1", CPENC (2,1,2,2,0), 0, AARCH64_NO_FEATURES) + SYSREG ("trcacvr10", CPENC (2,1,2,4,1), 0, AARCH64_NO_FEATURES) + SYSREG ("trcacvr11", CPENC (2,1,2,6,1), 0, AARCH64_NO_FEATURES) + SYSREG ("trcacvr12", CPENC (2,1,2,8,1), 0, AARCH64_NO_FEATURES) + SYSREG ("trcacvr13", CPENC (2,1,2,10,1), 0, AARCH64_NO_FEATURES) + SYSREG ("trcacvr14", CPENC (2,1,2,12,1), 0, AARCH64_NO_FEATURES) + SYSREG ("trcacvr15", CPENC (2,1,2,14,1), 0, AARCH64_NO_FEATURES) + SYSREG ("trcacvr2", CPENC (2,1,2,4,0), 0, AARCH64_NO_FEATURES) + SYSREG ("trcacvr3", CPENC (2,1,2,6,0), 0, AARCH64_NO_FEATURES) + SYSREG ("trcacvr4", CPENC (2,1,2,8,0), 0, AARCH64_NO_FEATURES) + SYSREG ("trcacvr5", CPENC (2,1,2,10,0), 0, AARCH64_NO_FEATURES) + SYSREG ("trcacvr6", CPENC (2,1,2,12,0), 0, AARCH64_NO_FEATURES) + SYSREG ("trcacvr7", CPENC (2,1,2,14,0), 0, AARCH64_NO_FEATURES) + SYSREG ("trcacvr8", CPENC (2,1,2,0,1), 0, AARCH64_NO_FEATURES) + SYSREG ("trcacvr9", CPENC (2,1,2,2,1), 0, AARCH64_NO_FEATURES) + SYSREG ("trcauthstatus", CPENC (2,1,7,14,6), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("trcauxctlr", CPENC (2,1,0,6,0), 0, AARCH64_NO_FEATURES) + SYSREG ("trcbbctlr", CPENC (2,1,0,15,0), 0, AARCH64_NO_FEATURES) + SYSREG ("trcccctlr", CPENC (2,1,0,14,0), 0, AARCH64_NO_FEATURES) + SYSREG ("trccidcctlr0", CPENC (2,1,3,0,2), 0, AARCH64_NO_FEATURES) + SYSREG ("trccidcctlr1", CPENC (2,1,3,1,2), 0, AARCH64_NO_FEATURES) + SYSREG ("trccidcvr0", CPENC (2,1,3,0,0), 0, AARCH64_NO_FEATURES) + SYSREG ("trccidcvr1", CPENC (2,1,3,2,0), 0, AARCH64_NO_FEATURES) + SYSREG ("trccidcvr2", CPENC (2,1,3,4,0), 0, AARCH64_NO_FEATURES) + SYSREG ("trccidcvr3", CPENC (2,1,3,6,0), 0, AARCH64_NO_FEATURES) + SYSREG ("trccidcvr4", CPENC (2,1,3,8,0), 0, AARCH64_NO_FEATURES) + SYSREG ("trccidcvr5", CPENC (2,1,3,10,0), 0, AARCH64_NO_FEATURES) + SYSREG ("trccidcvr6", CPENC (2,1,3,12,0), 0, AARCH64_NO_FEATURES) + SYSREG ("trccidcvr7", CPENC (2,1,3,14,0), 0, AARCH64_NO_FEATURES) + SYSREG ("trccidr0", CPENC (2,1,7,12,7), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("trccidr1", CPENC (2,1,7,13,7), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("trccidr2", CPENC (2,1,7,14,7), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("trccidr3", CPENC (2,1,7,15,7), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("trcclaimclr", CPENC (2,1,7,9,6), 0, AARCH64_NO_FEATURES) + SYSREG ("trcclaimset", CPENC (2,1,7,8,6), 0, AARCH64_NO_FEATURES) + SYSREG ("trccntctlr0", CPENC (2,1,0,4,5), 0, AARCH64_NO_FEATURES) + SYSREG ("trccntctlr1", CPENC (2,1,0,5,5), 0, AARCH64_NO_FEATURES) + SYSREG ("trccntctlr2", CPENC (2,1,0,6,5), 0, AARCH64_NO_FEATURES) + SYSREG ("trccntctlr3", CPENC (2,1,0,7,5), 0, AARCH64_NO_FEATURES) + SYSREG ("trccntrldvr0", CPENC (2,1,0,0,5), 0, AARCH64_NO_FEATURES) + SYSREG ("trccntrldvr1", CPENC (2,1,0,1,5), 0, AARCH64_NO_FEATURES) + SYSREG ("trccntrldvr2", CPENC (2,1,0,2,5), 0, AARCH64_NO_FEATURES) + SYSREG ("trccntrldvr3", CPENC (2,1,0,3,5), 0, AARCH64_NO_FEATURES) + SYSREG ("trccntvr0", CPENC (2,1,0,8,5), 0, AARCH64_NO_FEATURES) + SYSREG ("trccntvr1", CPENC (2,1,0,9,5), 0, AARCH64_NO_FEATURES) + SYSREG ("trccntvr2", CPENC (2,1,0,10,5), 0, AARCH64_NO_FEATURES) + SYSREG ("trccntvr3", CPENC (2,1,0,11,5), 0, AARCH64_NO_FEATURES) + SYSREG ("trcconfigr", CPENC (2,1,0,4,0), 0, AARCH64_NO_FEATURES) + SYSREG ("trcdevaff0", CPENC (2,1,7,10,6), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("trcdevaff1", CPENC (2,1,7,11,6), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("trcdevarch", CPENC (2,1,7,15,6), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("trcdevid", CPENC (2,1,7,2,7), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("trcdevtype", CPENC (2,1,7,3,7), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("trcdvcmr0", CPENC (2,1,2,0,6), 0, AARCH64_NO_FEATURES) + SYSREG ("trcdvcmr1", CPENC (2,1,2,4,6), 0, AARCH64_NO_FEATURES) + SYSREG ("trcdvcmr2", CPENC (2,1,2,8,6), 0, AARCH64_NO_FEATURES) + SYSREG ("trcdvcmr3", CPENC (2,1,2,12,6), 0, AARCH64_NO_FEATURES) + SYSREG ("trcdvcmr4", CPENC (2,1,2,0,7), 0, AARCH64_NO_FEATURES) + SYSREG ("trcdvcmr5", CPENC (2,1,2,4,7), 0, AARCH64_NO_FEATURES) + SYSREG ("trcdvcmr6", CPENC (2,1,2,8,7), 0, AARCH64_NO_FEATURES) + SYSREG ("trcdvcmr7", CPENC (2,1,2,12,7), 0, AARCH64_NO_FEATURES) + SYSREG ("trcdvcvr0", CPENC (2,1,2,0,4), 0, AARCH64_NO_FEATURES) + SYSREG ("trcdvcvr1", CPENC (2,1,2,4,4), 0, AARCH64_NO_FEATURES) + SYSREG ("trcdvcvr2", CPENC (2,1,2,8,4), 0, AARCH64_NO_FEATURES) + SYSREG ("trcdvcvr3", CPENC (2,1,2,12,4), 0, AARCH64_NO_FEATURES) + SYSREG ("trcdvcvr4", CPENC (2,1,2,0,5), 0, AARCH64_NO_FEATURES) + SYSREG ("trcdvcvr5", CPENC (2,1,2,4,5), 0, AARCH64_NO_FEATURES) + SYSREG ("trcdvcvr6", CPENC (2,1,2,8,5), 0, AARCH64_NO_FEATURES) + SYSREG ("trcdvcvr7", CPENC (2,1,2,12,5), 0, AARCH64_NO_FEATURES) + SYSREG ("trceventctl0r", CPENC (2,1,0,8,0), 0, AARCH64_NO_FEATURES) + SYSREG ("trceventctl1r", CPENC (2,1,0,9,0), 0, AARCH64_NO_FEATURES) + SYSREG ("trcextinselr", CPENC (2,1,0,8,4), F_REG_ALIAS, AARCH64_NO_FEATURES) + SYSREG ("trcextinselr0", CPENC (2,1,0,8,4), 0, AARCH64_NO_FEATURES) + SYSREG ("trcextinselr1", CPENC (2,1,0,9,4), 0, AARCH64_NO_FEATURES) + SYSREG ("trcextinselr2", CPENC (2,1,0,10,4), 0, AARCH64_NO_FEATURES) + SYSREG ("trcextinselr3", CPENC (2,1,0,11,4), 0, AARCH64_NO_FEATURES) + SYSREG ("trcidr0", CPENC (2,1,0,8,7), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("trcidr1", CPENC (2,1,0,9,7), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("trcidr10", CPENC (2,1,0,2,6), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("trcidr11", CPENC (2,1,0,3,6), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("trcidr12", CPENC (2,1,0,4,6), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("trcidr13", CPENC (2,1,0,5,6), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("trcidr2", CPENC (2,1,0,10,7), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("trcidr3", CPENC (2,1,0,11,7), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("trcidr4", CPENC (2,1,0,12,7), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("trcidr5", CPENC (2,1,0,13,7), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("trcidr6", CPENC (2,1,0,14,7), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("trcidr7", CPENC (2,1,0,15,7), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("trcidr8", CPENC (2,1,0,0,6), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("trcidr9", CPENC (2,1,0,1,6), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("trcimspec0", CPENC (2,1,0,0,7), 0, AARCH64_NO_FEATURES) + SYSREG ("trcimspec1", CPENC (2,1,0,1,7), 0, AARCH64_NO_FEATURES) + SYSREG ("trcimspec2", CPENC (2,1,0,2,7), 0, AARCH64_NO_FEATURES) + SYSREG ("trcimspec3", CPENC (2,1,0,3,7), 0, AARCH64_NO_FEATURES) + SYSREG ("trcimspec4", CPENC (2,1,0,4,7), 0, AARCH64_NO_FEATURES) + SYSREG ("trcimspec5", CPENC (2,1,0,5,7), 0, AARCH64_NO_FEATURES) + SYSREG ("trcimspec6", CPENC (2,1,0,6,7), 0, AARCH64_NO_FEATURES) + SYSREG ("trcimspec7", CPENC (2,1,0,7,7), 0, AARCH64_NO_FEATURES) + SYSREG ("trcitctrl", CPENC (2,1,7,0,4), 0, AARCH64_NO_FEATURES) + SYSREG ("trcitecr_el1", CPENC (3,0,1,2,3), 0, AARCH64_FEATURE (ITE)) + SYSREG ("trcitecr_el12", CPENC (3,5,1,2,3), 0, AARCH64_FEATURE (ITE)) + SYSREG ("trcitecr_el2", CPENC (3,4,1,2,3), 0, AARCH64_FEATURE (ITE)) + SYSREG ("trciteedcr", CPENC (2,1,0,2,1), 0, AARCH64_FEATURE (ITE)) + SYSREG ("trclar", CPENC (2,1,7,12,6), F_REG_WRITE, AARCH64_NO_FEATURES) + SYSREG ("trclsr", CPENC (2,1,7,13,6), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("trcoslar", CPENC (2,1,1,0,4), F_REG_WRITE, AARCH64_NO_FEATURES) + SYSREG ("trcoslsr", CPENC (2,1,1,1,4), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("trcpdcr", CPENC (2,1,1,4,4), 0, AARCH64_NO_FEATURES) + SYSREG ("trcpdsr", CPENC (2,1,1,5,4), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("trcpidr0", CPENC (2,1,7,8,7), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("trcpidr1", CPENC (2,1,7,9,7), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("trcpidr2", CPENC (2,1,7,10,7), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("trcpidr3", CPENC (2,1,7,11,7), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("trcpidr4", CPENC (2,1,7,4,7), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("trcpidr5", CPENC (2,1,7,5,7), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("trcpidr6", CPENC (2,1,7,6,7), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("trcpidr7", CPENC (2,1,7,7,7), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("trcprgctlr", CPENC (2,1,0,1,0), 0, AARCH64_NO_FEATURES) + SYSREG ("trcprocselr", CPENC (2,1,0,2,0), 0, AARCH64_NO_FEATURES) + SYSREG ("trcqctlr", CPENC (2,1,0,1,1), 0, AARCH64_NO_FEATURES) + SYSREG ("trcrsctlr10", CPENC (2,1,1,10,0), 0, AARCH64_NO_FEATURES) + SYSREG ("trcrsctlr11", CPENC (2,1,1,11,0), 0, AARCH64_NO_FEATURES) + SYSREG ("trcrsctlr12", CPENC (2,1,1,12,0), 0, AARCH64_NO_FEATURES) + SYSREG ("trcrsctlr13", CPENC (2,1,1,13,0), 0, AARCH64_NO_FEATURES) + SYSREG ("trcrsctlr14", CPENC (2,1,1,14,0), 0, AARCH64_NO_FEATURES) + SYSREG ("trcrsctlr15", CPENC (2,1,1,15,0), 0, AARCH64_NO_FEATURES) + SYSREG ("trcrsctlr16", CPENC (2,1,1,0,1), 0, AARCH64_NO_FEATURES) + SYSREG ("trcrsctlr17", CPENC (2,1,1,1,1), 0, AARCH64_NO_FEATURES) + SYSREG ("trcrsctlr18", CPENC (2,1,1,2,1), 0, AARCH64_NO_FEATURES) + SYSREG ("trcrsctlr19", CPENC (2,1,1,3,1), 0, AARCH64_NO_FEATURES) + SYSREG ("trcrsctlr2", CPENC (2,1,1,2,0), 0, AARCH64_NO_FEATURES) + SYSREG ("trcrsctlr20", CPENC (2,1,1,4,1), 0, AARCH64_NO_FEATURES) + SYSREG ("trcrsctlr21", CPENC (2,1,1,5,1), 0, AARCH64_NO_FEATURES) + SYSREG ("trcrsctlr22", CPENC (2,1,1,6,1), 0, AARCH64_NO_FEATURES) + SYSREG ("trcrsctlr23", CPENC (2,1,1,7,1), 0, AARCH64_NO_FEATURES) + SYSREG ("trcrsctlr24", CPENC (2,1,1,8,1), 0, AARCH64_NO_FEATURES) + SYSREG ("trcrsctlr25", CPENC (2,1,1,9,1), 0, AARCH64_NO_FEATURES) + SYSREG ("trcrsctlr26", CPENC (2,1,1,10,1), 0, AARCH64_NO_FEATURES) + SYSREG ("trcrsctlr27", CPENC (2,1,1,11,1), 0, AARCH64_NO_FEATURES) + SYSREG ("trcrsctlr28", CPENC (2,1,1,12,1), 0, AARCH64_NO_FEATURES) + SYSREG ("trcrsctlr29", CPENC (2,1,1,13,1), 0, AARCH64_NO_FEATURES) + SYSREG ("trcrsctlr3", CPENC (2,1,1,3,0), 0, AARCH64_NO_FEATURES) + SYSREG ("trcrsctlr30", CPENC (2,1,1,14,1), 0, AARCH64_NO_FEATURES) + SYSREG ("trcrsctlr31", CPENC (2,1,1,15,1), 0, AARCH64_NO_FEATURES) + SYSREG ("trcrsctlr4", CPENC (2,1,1,4,0), 0, AARCH64_NO_FEATURES) + SYSREG ("trcrsctlr5", CPENC (2,1,1,5,0), 0, AARCH64_NO_FEATURES) + SYSREG ("trcrsctlr6", CPENC (2,1,1,6,0), 0, AARCH64_NO_FEATURES) + SYSREG ("trcrsctlr7", CPENC (2,1,1,7,0), 0, AARCH64_NO_FEATURES) + SYSREG ("trcrsctlr8", CPENC (2,1,1,8,0), 0, AARCH64_NO_FEATURES) + SYSREG ("trcrsctlr9", CPENC (2,1,1,9,0), 0, AARCH64_NO_FEATURES) + SYSREG ("trcrsr", CPENC (2,1,0,10,0), 0, AARCH64_NO_FEATURES) + SYSREG ("trcseqevr0", CPENC (2,1,0,0,4), 0, AARCH64_NO_FEATURES) + SYSREG ("trcseqevr1", CPENC (2,1,0,1,4), 0, AARCH64_NO_FEATURES) + SYSREG ("trcseqevr2", CPENC (2,1,0,2,4), 0, AARCH64_NO_FEATURES) + SYSREG ("trcseqrstevr", CPENC (2,1,0,6,4), 0, AARCH64_NO_FEATURES) + SYSREG ("trcseqstr", CPENC (2,1,0,7,4), 0, AARCH64_NO_FEATURES) + SYSREG ("trcssccr0", CPENC (2,1,1,0,2), 0, AARCH64_NO_FEATURES) + SYSREG ("trcssccr1", CPENC (2,1,1,1,2), 0, AARCH64_NO_FEATURES) + SYSREG ("trcssccr2", CPENC (2,1,1,2,2), 0, AARCH64_NO_FEATURES) + SYSREG ("trcssccr3", CPENC (2,1,1,3,2), 0, AARCH64_NO_FEATURES) + SYSREG ("trcssccr4", CPENC (2,1,1,4,2), 0, AARCH64_NO_FEATURES) + SYSREG ("trcssccr5", CPENC (2,1,1,5,2), 0, AARCH64_NO_FEATURES) + SYSREG ("trcssccr6", CPENC (2,1,1,6,2), 0, AARCH64_NO_FEATURES) + SYSREG ("trcssccr7", CPENC (2,1,1,7,2), 0, AARCH64_NO_FEATURES) + SYSREG ("trcsscsr0", CPENC (2,1,1,8,2), 0, AARCH64_NO_FEATURES) + SYSREG ("trcsscsr1", CPENC (2,1,1,9,2), 0, AARCH64_NO_FEATURES) + SYSREG ("trcsscsr2", CPENC (2,1,1,10,2), 0, AARCH64_NO_FEATURES) + SYSREG ("trcsscsr3", CPENC (2,1,1,11,2), 0, AARCH64_NO_FEATURES) + SYSREG ("trcsscsr4", CPENC (2,1,1,12,2), 0, AARCH64_NO_FEATURES) + SYSREG ("trcsscsr5", CPENC (2,1,1,13,2), 0, AARCH64_NO_FEATURES) + SYSREG ("trcsscsr6", CPENC (2,1,1,14,2), 0, AARCH64_NO_FEATURES) + SYSREG ("trcsscsr7", CPENC (2,1,1,15,2), 0, AARCH64_NO_FEATURES) + SYSREG ("trcsspcicr0", CPENC (2,1,1,0,3), 0, AARCH64_NO_FEATURES) + SYSREG ("trcsspcicr1", CPENC (2,1,1,1,3), 0, AARCH64_NO_FEATURES) + SYSREG ("trcsspcicr2", CPENC (2,1,1,2,3), 0, AARCH64_NO_FEATURES) + SYSREG ("trcsspcicr3", CPENC (2,1,1,3,3), 0, AARCH64_NO_FEATURES) + SYSREG ("trcsspcicr4", CPENC (2,1,1,4,3), 0, AARCH64_NO_FEATURES) + SYSREG ("trcsspcicr5", CPENC (2,1,1,5,3), 0, AARCH64_NO_FEATURES) + SYSREG ("trcsspcicr6", CPENC (2,1,1,6,3), 0, AARCH64_NO_FEATURES) + SYSREG ("trcsspcicr7", CPENC (2,1,1,7,3), 0, AARCH64_NO_FEATURES) + SYSREG ("trcstallctlr", CPENC (2,1,0,11,0), 0, AARCH64_NO_FEATURES) + SYSREG ("trcstatr", CPENC (2,1,0,3,0), F_REG_READ, AARCH64_NO_FEATURES) + SYSREG ("trcsyncpr", CPENC (2,1,0,13,0), 0, AARCH64_NO_FEATURES) + SYSREG ("trctraceidr", CPENC (2,1,0,0,1), 0, AARCH64_NO_FEATURES) + SYSREG ("trctsctlr", CPENC (2,1,0,12,0), 0, AARCH64_NO_FEATURES) + SYSREG ("trcvdarcctlr", CPENC (2,1,0,10,2), 0, AARCH64_NO_FEATURES) + SYSREG ("trcvdctlr", CPENC (2,1,0,8,2), 0, AARCH64_NO_FEATURES) + SYSREG ("trcvdsacctlr", CPENC (2,1,0,9,2), 0, AARCH64_NO_FEATURES) + SYSREG ("trcvictlr", CPENC (2,1,0,0,2), 0, AARCH64_NO_FEATURES) + SYSREG ("trcviiectlr", CPENC (2,1,0,1,2), 0, AARCH64_NO_FEATURES) + SYSREG ("trcvipcssctlr", CPENC (2,1,0,3,2), 0, AARCH64_NO_FEATURES) + SYSREG ("trcvissctlr", CPENC (2,1,0,2,2), 0, AARCH64_NO_FEATURES) + SYSREG ("trcvmidcctlr0", CPENC (2,1,3,2,2), 0, AARCH64_NO_FEATURES) + SYSREG ("trcvmidcctlr1", CPENC (2,1,3,3,2), 0, AARCH64_NO_FEATURES) + SYSREG ("trcvmidcvr0", CPENC (2,1,3,0,1), 0, AARCH64_NO_FEATURES) + SYSREG ("trcvmidcvr1", CPENC (2,1,3,2,1), 0, AARCH64_NO_FEATURES) + SYSREG ("trcvmidcvr2", CPENC (2,1,3,4,1), 0, AARCH64_NO_FEATURES) + SYSREG ("trcvmidcvr3", CPENC (2,1,3,6,1), 0, AARCH64_NO_FEATURES) + SYSREG ("trcvmidcvr4", CPENC (2,1,3,8,1), 0, AARCH64_NO_FEATURES) + SYSREG ("trcvmidcvr5", CPENC (2,1,3,10,1), 0, AARCH64_NO_FEATURES) + SYSREG ("trcvmidcvr6", CPENC (2,1,3,12,1), 0, AARCH64_NO_FEATURES) + SYSREG ("trcvmidcvr7", CPENC (2,1,3,14,1), 0, AARCH64_NO_FEATURES) + SYSREG ("trfcr_el1", CPENC (3,0,1,2,1), 0, AARCH64_FEATURE (V8_3A)) /* TRF */ + SYSREG ("trfcr_el12", CPENC (3,5,1,2,1), 0, AARCH64_FEATURE (V8_3A)) /* TRF */ + SYSREG ("trfcr_el2", CPENC (3,4,1,2,1), 0, AARCH64_FEATURE (V8_3A)) /* TRF */ + SYSREG ("ttbr0_el1", CPENC (3,0,2,0,0), F_REG_128, AARCH64_NO_FEATURES) + SYSREG ("ttbr0_el12", CPENC (3,5,2,0,0), F_REG_128, AARCH64_NO_FEATURES) + SYSREG ("ttbr0_el2", CPENC (3,4,2,0,0), F_REG_128, AARCH64_FEATURE (V8A)) + SYSREG ("ttbr0_el3", CPENC (3,6,2,0,0), 0, AARCH64_NO_FEATURES) + SYSREG ("ttbr1_el1", CPENC (3,0,2,0,1), F_REG_128, AARCH64_NO_FEATURES) + SYSREG ("ttbr1_el12", CPENC (3,5,2,0,1), F_REG_128, AARCH64_NO_FEATURES) + SYSREG ("ttbr1_el2", CPENC (3,4,2,0,1), F_REG_128, AARCH64_FEATURE (V8A)) + SYSREG ("uao", CPENC (3,0,4,2,4), 0, AARCH64_FEATURE (V8_1A)) /* UAO */ + SYSREG ("vbar_el1", CPENC (3,0,12,0,0), 0, AARCH64_NO_FEATURES) + SYSREG ("vbar_el12", CPENC (3,5,12,0,0), 0, AARCH64_NO_FEATURES) + SYSREG ("vbar_el2", CPENC (3,4,12,0,0), 0, AARCH64_NO_FEATURES) + SYSREG ("vbar_el3", CPENC (3,6,12,0,0), 0, AARCH64_NO_FEATURES) + SYSREG ("vdisr_el2", CPENC (3,4,12,1,1), 0, AARCH64_FEATURE (RAS)) + SYSREG ("vdisr_el3", CPENC (3,6,12,1,1), 0, AARCH64_FEATURE (V9_4A)) /* E3DSE */ + SYSREG ("vmecid_a_el2", CPENC (3,4,10,9,1), 0, AARCH64_FEATURE (V9_2A)) /* MEC */ + SYSREG ("vmecid_p_el2", CPENC (3,4,10,9,0), 0, AARCH64_FEATURE (V9_2A)) /* MEC */ + SYSREG ("vmpidr_el2", CPENC (3,4,0,0,5), 0, AARCH64_NO_FEATURES) + SYSREG ("vncr_el2", CPENC (3,4,2,2,0), 0, AARCH64_FEATURE (V8_3A)) /* NV2 */ + SYSREG ("vpidr_el2", CPENC (3,4,0,0,0), 0, AARCH64_NO_FEATURES) + SYSREG ("vsctlr_el2", CPENC (3,4,2,0,0), 0, AARCH64_FEATURE (V8R)) + SYSREG ("vsesr_el2", CPENC (3,4,5,2,3), 0, AARCH64_FEATURE (RAS)) + SYSREG ("vsesr_el3", CPENC (3,6,5,2,3), 0, AARCH64_FEATURE (V9_4A)) /* E3DSE */ + SYSREG ("vstcr_el2", CPENC (3,4,2,6,2), 0, AARCH64_FEATURE (V8_3A)) /* SEL2 */ + SYSREG ("vsttbr_el2", CPENC (3,4,2,6,0), 0, AARCH64_FEATURES (2, V8A, V8_3A)) /* SEL2 */ + SYSREG ("vtcr_el2", CPENC (3,4,2,1,2), 0, AARCH64_NO_FEATURES) + SYSREG ("vttbr_el2", CPENC (3,4,2,1,0), F_REG_128, AARCH64_FEATURE (V8A)) + SYSREG ("zcr_el1", CPENC (3,0,1,2,0), 0, AARCH64_FEATURE (SVE)) + SYSREG ("zcr_el12", CPENC (3,5,1,2,0), 0, AARCH64_FEATURE (SVE)) + SYSREG ("zcr_el2", CPENC (3,4,1,2,0), 0, AARCH64_FEATURE (SVE)) + SYSREG ("zcr_el3", CPENC (3,6,1,2,0), 0, AARCH64_FEATURE (SVE)) diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc index 9d2c343..f28d670 100644 --- a/gcc/config/aarch64/aarch64.cc +++ b/gcc/config/aarch64/aarch64.cc @@ -519,7 +519,6 @@ typedef struct { #define F_DEPRECATED (1 << 1) #define F_REG_READ (1 << 2) #define F_REG_WRITE (1 << 3) -#define F_ARCHEXT (1 << 4) /* Flag indicating register name is alias for another system register. */ #define F_REG_ALIAS (1 << 5) /* Flag indicatinig registers which may be implemented with 128-bits. */ diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h index 2b6075d..2cd929d 100644 --- a/gcc/config/aarch64/aarch64.h +++ b/gcc/config/aarch64/aarch64.h @@ -240,44 +240,22 @@ constexpr auto AARCH64_FL_DEFAULT_ISA_MODE ATTRIBUTE_UNUSED #define TARGET_SIMD (TARGET_BASE_SIMD && TARGET_NON_STREAMING) #define TARGET_FLOAT AARCH64_HAVE_ISA (FP) -/* AARCH64_FL options necessary for system register implementation. */ - /* Define AARCH64_FL aliases for architectural features which are protected by -march flags in binutils but which receive no special treatment by GCC. + These features are used in the aarch64-sys-regs.def file, which is copied + from Binutils. - Such flags are inherited from the Binutils definition of system registers - and are mapped to the architecture in which the feature is implemented. */ + We should try to eliminate these inconsistencies in future. */ #define AARCH64_FL_RAS AARCH64_FL_V8A #define AARCH64_FL_LOR AARCH64_FL_V8_1A #define AARCH64_FL_PAN AARCH64_FL_V8_1A -#define AARCH64_FL_AMU AARCH64_FL_V8_4A -#define AARCH64_FL_SCXTNUM AARCH64_FL_V8_5A -#define AARCH64_FL_ID_PFR2 AARCH64_FL_V8_5A - -/* Armv8.9-A extension feature bits defined in Binutils but absent from GCC, - aliased to their base architecture. */ -#define AARCH64_FL_AIE AARCH64_FL_V8_9A -#define AARCH64_FL_DEBUGv8p9 AARCH64_FL_V8_9A -#define AARCH64_FL_FGT2 AARCH64_FL_V8_9A #define AARCH64_FL_ITE AARCH64_FL_V8_9A -#define AARCH64_FL_PFAR AARCH64_FL_V8_9A -#define AARCH64_FL_PMUv3_ICNTR AARCH64_FL_V8_9A -#define AARCH64_FL_PMUv3_SS AARCH64_FL_V8_9A -#define AARCH64_FL_PMUv3p9 AARCH64_FL_V8_9A #define AARCH64_FL_RASv2 AARCH64_FL_V8_9A -#define AARCH64_FL_S1PIE AARCH64_FL_V8_9A -#define AARCH64_FL_S1POE AARCH64_FL_V8_9A -#define AARCH64_FL_S2PIE AARCH64_FL_V8_9A -#define AARCH64_FL_S2POE AARCH64_FL_V8_9A -#define AARCH64_FL_SCTLR2 AARCH64_FL_V8_9A -#define AARCH64_FL_SEBEP AARCH64_FL_V8_9A -#define AARCH64_FL_SPE_FDS AARCH64_FL_V8_9A -#define AARCH64_FL_TCR2 AARCH64_FL_V8_9A + #define TARGET_V8R AARCH64_HAVE_ISA (V8R) #define TARGET_V9A AARCH64_HAVE_ISA (V9A) - /* SHA2 is an optional extension to AdvSIMD. */ #define TARGET_SHA2 AARCH64_HAVE_ISA (SHA2) diff --git a/gcc/config/arm/arm.cc b/gcc/config/arm/arm.cc index da28d96..6df2fa0 100644 --- a/gcc/config/arm/arm.cc +++ b/gcc/config/arm/arm.cc @@ -5696,6 +5696,22 @@ arm_canonicalize_comparison (int *code, rtx *op0, rtx *op1, maxval = (HOST_WIDE_INT_1U << (GET_MODE_BITSIZE (mode) - 1)) - 1; + /* For floating-point comparisons, prefer >= and > over <= and < since + the former are supported by VSEL on some architectures. Only do this + if both operands are registers. */ + if (GET_MODE_CLASS (mode) == MODE_FLOAT + && (*code == LE + || *code == LT + || *code == UNGT + || *code == UNGE) + && register_operand (*op0, mode) + && register_operand (*op1, mode)) + { + std::swap (*op0, *op1); + *code = (int) swap_condition ((rtx_code)*code); + return; + } + /* For DImode, we have GE/LT/GEU/LTU comparisons (with cmp/sbc). In ARM mode we can also use cmp/cmpeq for GTU/LEU. GT/LE must be either reversed or (for constant OP1) adjusted to GE/LT. @@ -32478,6 +32494,9 @@ arm_validize_comparison (rtx *comparison, rtx * op1, rtx * op2) case E_HFmode: if (!TARGET_VFP_FP16INST) break; + if (!arm_vsel_comparison_operator (*comparison, mode)) + return false; + /* FP16 comparisons are done in SF mode. */ mode = SFmode; *op1 = convert_to_mode (mode, *op1, 1); diff --git a/gcc/config/arm/iterators.md b/gcc/config/arm/iterators.md index 0c163ed..eb519e7 100644 --- a/gcc/config/arm/iterators.md +++ b/gcc/config/arm/iterators.md @@ -3014,3 +3014,20 @@ ;; Define iterators for VCMLA operations as MUL (define_int_iterator VCMUL_OP [UNSPEC_VCMUL UNSPEC_VCMUL_CONJ]) + +(define_int_attr VxCIQ_carry [(VADCIQ_U "VADCIQ_U_carry") + (VADCIQ_S "VADCIQ_S_carry") + (VSBCIQ_U "VSBCIQ_U_carry") + (VSBCIQ_S "VSBCIQ_S_carry")]) +(define_int_attr VxCIQ_M_carry [(VADCIQ_M_U "VADCIQ_M_U_carry") + (VADCIQ_M_S "VADCIQ_M_S_carry") + (VSBCIQ_M_U "VSBCIQ_M_U_carry") + (VSBCIQ_M_S "VSBCIQ_M_S_carry")]) +(define_int_attr VxCQ_carry [(VADCQ_U "VADCQ_U_carry") + (VADCQ_S "VADCQ_S_carry") + (VSBCQ_U "VSBCQ_U_carry") + (VSBCQ_S "VSBCQ_S_carry")]) +(define_int_attr VxCQ_M_carry [(VADCQ_M_U "VADCQ_M_U_carry") + (VADCQ_M_S "VADCQ_M_S_carry") + (VSBCQ_M_U "VSBCQ_M_U_carry") + (VSBCQ_M_S "VSBCQ_M_S_carry")]) diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md index bd3db24..87b45b2 100644 --- a/gcc/config/arm/mve.md +++ b/gcc/config/arm/mve.md @@ -3965,14 +3965,14 @@ (define_insn "get_fpscr_nzcvqc" [(set (match_operand:SI 0 "register_operand" "=r") - (unspec_volatile:SI [(reg:SI VFPCC_REGNUM)] UNSPEC_GET_FPSCR_NZCVQC))] + (unspec:SI [(reg:SI VFPCC_REGNUM)] UNSPEC_GET_FPSCR_NZCVQC))] "TARGET_HAVE_MVE" "vmrs\\t%0, FPSCR_nzcvqc" [(set_attr "type" "mve_move")]) (define_insn "set_fpscr_nzcvqc" [(set (reg:SI VFPCC_REGNUM) - (unspec_volatile:SI [(match_operand:SI 0 "register_operand" "r")] + (unspec:SI [(match_operand:SI 0 "register_operand" "r")] VUNSPEC_SET_FPSCR_NZCVQC))] "TARGET_HAVE_MVE" "vmsr\\tFPSCR_nzcvqc, %0" @@ -3988,8 +3988,9 @@ (match_operand:V4SI 2 "s_register_operand" "w")] VxCIQ)) (set (reg:SI VFPCC_REGNUM) - (unspec:SI [(const_int 0)] - VxCIQ)) + (unspec:SI [(match_dup 1) + (match_dup 2)] + <VxCIQ_carry>)) ] "TARGET_HAVE_MVE" "<mve_insn>.i32\t%q0, %q1, %q2" @@ -4009,8 +4010,11 @@ (match_operand:V4BI 4 "vpr_register_operand" "Up")] VxCIQ_M)) (set (reg:SI VFPCC_REGNUM) - (unspec:SI [(const_int 0)] - VxCIQ_M)) + (unspec:SI [(match_dup 1) + (match_dup 2) + (match_dup 3) + (match_dup 4)] + <VxCIQ_M_carry>)) ] "TARGET_HAVE_MVE" "vpst\;<mve_insn>t.i32\t%q0, %q2, %q3" @@ -4025,11 +4029,14 @@ (define_insn "@mve_<mve_insn>q_<supf>v4si" [(set (match_operand:V4SI 0 "s_register_operand" "=w") (unspec:V4SI [(match_operand:V4SI 1 "s_register_operand" "w") - (match_operand:V4SI 2 "s_register_operand" "w")] + (match_operand:V4SI 2 "s_register_operand" "w") + (reg:SI VFPCC_REGNUM)] VxCQ)) (set (reg:SI VFPCC_REGNUM) - (unspec:SI [(reg:SI VFPCC_REGNUM)] - VxCQ)) + (unspec:SI [(match_dup 1) + (match_dup 2) + (reg:SI VFPCC_REGNUM)] + <VxCQ_carry>)) ] "TARGET_HAVE_MVE" "<mve_insn>.i32\t%q0, %q1, %q2" @@ -4047,11 +4054,16 @@ (unspec:V4SI [(match_operand:V4SI 1 "s_register_operand" "0") (match_operand:V4SI 2 "s_register_operand" "w") (match_operand:V4SI 3 "s_register_operand" "w") - (match_operand:V4BI 4 "vpr_register_operand" "Up")] + (match_operand:V4BI 4 "vpr_register_operand" "Up") + (reg:SI VFPCC_REGNUM)] VxCQ_M)) (set (reg:SI VFPCC_REGNUM) - (unspec:SI [(reg:SI VFPCC_REGNUM)] - VxCQ_M)) + (unspec:SI [(match_dup 1) + (match_dup 2) + (match_dup 3) + (match_dup 4) + (reg:SI VFPCC_REGNUM)] + <VxCQ_M_carry>)) ] "TARGET_HAVE_MVE" "vpst\;<mve_insn>t.i32\t%q0, %q2, %q3" diff --git a/gcc/config/arm/unspecs.md b/gcc/config/arm/unspecs.md index c1ee972..17af152 100644 --- a/gcc/config/arm/unspecs.md +++ b/gcc/config/arm/unspecs.md @@ -1160,21 +1160,37 @@ VLDRGBWBQ VLDRGBWBQ_Z VADCQ_U + VADCQ_U_carry VADCQ_M_U + VADCQ_M_U_carry VADCQ_S + VADCQ_S_carry VADCQ_M_S + VADCQ_M_S_carry VSBCIQ_U + VSBCIQ_U_carry VSBCIQ_S + VSBCIQ_S_carry VSBCIQ_M_U + VSBCIQ_M_U_carry VSBCIQ_M_S + VSBCIQ_M_S_carry VSBCQ_U + VSBCQ_U_carry VSBCQ_S + VSBCQ_S_carry VSBCQ_M_U + VSBCQ_M_U_carry VSBCQ_M_S + VSBCQ_M_S_carry VADCIQ_U + VADCIQ_U_carry VADCIQ_M_U + VADCIQ_M_U_carry VADCIQ_S + VADCIQ_S_carry VADCIQ_M_S + VADCIQ_M_S_carry VLD2Q VLD4Q VST2Q diff --git a/gcc/config/gcn/gcn-devices.def b/gcc/config/gcn/gcn-devices.def index b27385b..9277d41 100644 --- a/gcc/config/gcn/gcn-devices.def +++ b/gcc/config/gcn/gcn-devices.def @@ -179,7 +179,7 @@ GCN_DEVICE(gfx942, GFX942, 0x4c, ISA_CDNA3, /* Max ISA VGPRs */ 512, /* Generic code obj version */ 0, /* non-generic */ /* Architecture Family */ GFX9, - /* Generic Name */ NONE + /* Generic Name */ GFX9_4_GENERIC ) GCN_DEVICE(gfx950, GFX950, 0x4f, ISA_CDNA3, @@ -190,7 +190,7 @@ GCN_DEVICE(gfx950, GFX950, 0x4f, ISA_CDNA3, /* Max ISA VGPRs */ 512, /* Generic code obj version */ 0, /* non-generic */ /* Architecture Family */ GFX9, - /* Generic Name */ NONE + /* Generic Name */ GFX9_4_GENERIC ) GCN_DEVICE(gfx9-generic, GFX9_GENERIC, 0x051, ISA_GCN5, diff --git a/gcc/config/gcn/t-omp-device b/gcc/config/gcn/t-omp-device index cae6bd3..38d99d0 100644 --- a/gcc/config/gcn/t-omp-device +++ b/gcc/config/gcn/t-omp-device @@ -1,4 +1,4 @@ omp-device-properties-gcn: $(srcdir)/config/gcn/gcn-devices.def echo kind: gpu > $@ echo arch: amdgcn gcn >> $@ - echo isa: `grep -o -P '(?<=GCN_DEVICE\()gfx[0-9a-f]+(?=,)' $<` >> $@ + echo isa: `grep -o -P '(?<=GCN_DEVICE\()gfx[-0-9a-f]+(|-generic)(?=,)' $<` >> $@ diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h index fbd8d9a..3a66d78 100644 --- a/gcc/config/i386/i386.h +++ b/gcc/config/i386/i386.h @@ -2481,12 +2481,12 @@ constexpr wide_int_bitmask PTA_CLEARWATERFOREST = (PTA_SIERRAFOREST & (~(PTA_KL | PTA_WIDEKL))) | PTA_AVXVNNIINT16 | PTA_SHA512 | PTA_SM3 | PTA_SM4 | PTA_USER_MSR | PTA_PREFETCHI; constexpr wide_int_bitmask PTA_PANTHERLAKE = - (PTA_ARROWLAKE_S & (~(PTA_KL | PTA_WIDEKL))) | PTA_PREFETCHI; + (PTA_ARROWLAKE_S & (~(PTA_KL | PTA_WIDEKL))); constexpr wide_int_bitmask PTA_DIAMONDRAPIDS = PTA_GRANITERAPIDS_D | PTA_AVXIFMA | PTA_AVXNECONVERT | PTA_AVXVNNIINT16 | PTA_AVXVNNIINT8 | PTA_CMPCCXADD | PTA_SHA512 | PTA_SM3 | PTA_SM4 | PTA_AVX10_2 | PTA_APX_F | PTA_AMX_AVX512 | PTA_AMX_FP8 | PTA_AMX_TF32 | PTA_MOVRS - | PTA_AMX_MOVRS | PTA_USER_MSR; + | PTA_AMX_MOVRS; constexpr wide_int_bitmask PTA_BDVER1 = PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3 | PTA_SSE4A | PTA_CX16 | PTA_POPCNT | PTA_LZCNT diff --git a/gcc/config/riscv/autovec-opt.md b/gcc/config/riscv/autovec-opt.md index 3d6e0a1..d2705cf 100644 --- a/gcc/config/riscv/autovec-opt.md +++ b/gcc/config/riscv/autovec-opt.md @@ -1913,7 +1913,7 @@ (define_insn_and_split "*widen_waddu_wx_<mode>" [(set (match_operand:VWEXTI_D 0 "register_operand") - (any_widen_binop:VWEXTI_D + (plus:VWEXTI_D (vec_duplicate:VWEXTI_D (any_extend:<VEL> (match_operand:<VSUBEL> 2 "register_operand"))) @@ -1933,7 +1933,7 @@ (define_insn_and_split "*widen_wsubu_wx_<mode>" [(set (match_operand:VWEXTI_D 0 "register_operand") - (any_widen_binop:VWEXTI_D + (minus:VWEXTI_D (match_operand:VWEXTI_D 1 "register_operand") (vec_duplicate:VWEXTI_D (any_extend:<VEL> diff --git a/gcc/config/rs6000/aix.h b/gcc/config/rs6000/aix.h index 9e7edbb..c83eace 100644 --- a/gcc/config/rs6000/aix.h +++ b/gcc/config/rs6000/aix.h @@ -281,4 +281,6 @@ #undef SUBTARGET_DRIVER_SELF_SPECS #define SUBTARGET_DRIVER_SELF_SPECS \ "%{m64:-maix64} %<m64", \ -"%{m32:-maix32} %<m32" +"%{m32:-maix32} %<m32", \ +"%{fstack-protector*: %<fstack-protector* \ + %estack-protector not supported on AIX}" diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 6bd5128..3f53986 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -659,7 +659,7 @@ Objective-C and Objective-C++ Dialects}. -ftree-phiprop -ftree-loop-distribution -ftree-loop-distribute-patterns -ftree-loop-ivcanon -ftree-loop-linear -ftree-loop-optimize -ftree-loop-vectorize --ftree-parallelize-loops=@var{n} -ftree-pre -ftree-partial-pre -ftree-pta +-ftree-parallelize-loops[=@var{n}] -ftree-pre -ftree-partial-pre -ftree-pta -ftree-reassoc -ftree-scev-cprop -ftree-sink -ftree-slsr -ftree-sra -ftree-switch-conversion -ftree-tail-merge -ftree-ter -ftree-vectorize -ftree-vrp -ftrivial-auto-var-init @@ -14691,8 +14691,9 @@ variable merging and induction variable elimination) on trees. Enabled by default at @option{-O1} and higher. @opindex ftree-parallelize-loops -@item -ftree-parallelize-loops=n -Parallelize loops, i.e., split their iteration space to run in n threads. +@item -ftree-parallelize-loops +@itemx -ftree-parallelize-loops=@var{n} +Parallelize loops, i.e., split their iteration space to run in multiple threads. This is only possible for loops whose iterations are independent and can be arbitrarily reordered. The optimization is only profitable on multiprocessor machines, for loops that are CPU-intensive, @@ -14700,6 +14701,17 @@ rather than constrained e.g.@: by memory bandwidth. This option implies @option{-pthread}, and thus is only supported on targets that have support for @option{-pthread}. +When a positive value @var{n} is specified, the number of threads is fixed +at compile time and cannot be changed after compilation. The compiler +generates ``#pragma omp parallel num_threads(@var{n})''. + +When used without @code{=@var{n}} (i.e., @option{-ftree-parallelize-loops}), +the number of threads is determined at program execution time via the +@env{OMP_NUM_THREADS} environment variable. If @env{OMP_NUM_THREADS} is not +set, the OpenMP runtime automatically detects the number of available +processors and uses that value. This enables creating binaries that +adapt to different hardware configurations without recompilation. + @opindex ftree-pta @item -ftree-pta Perform function-local points-to analysis on trees. This flag is @@ -35143,13 +35155,14 @@ AVXIFMA, AVXVNNIINT8, AVXNECONVERT, CMPCCXADD, AVXVNNIINT16, SHA512, SM3 and SM4 instruction set support. @item pantherlake -Intel Panther Lake CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, -SSSE3, SSE4.1, SSE4.2, POPCNT, AES, PREFETCHW, PCLMUL, RDRND, XSAVE, XSAVEC, -XSAVES, XSAVEOPT, FSGSBASE, PTWRITE, RDPID, SGX, GFNI-SSE, CLWB, MOVDIRI, -MOVDIR64B, WAITPKG, ADCX, AVX, AVX2, BMI, BMI2, F16C, FMA, LZCNT, PCONFIG, PKU, -VAES, VPCLMULQDQ, SERIALIZE, HRESET, AVX-VNNI, UINTR, AVXIFMA, AVXVNNIINT8, -AVXNECONVERT, CMPCCXADD, AVXVNNIINT16, SHA512, SM3, SM4 and PREFETCHI -instruction set support. +@itemx wildcatlake +Intel Panther Lake/Wildcat Lake CPU with 64-bit extensions, MOVBE, MMX, SSE, +SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, POPCNT, AES, PREFETCHW, PCLMUL, RDRND, +XSAVE, XSAVEC, XSAVES, XSAVEOPT, FSGSBASE, PTWRITE, RDPID, SGX, GFNI-SSE, +CLWB, MOVDIRI, MOVDIR64B, WAITPKG, ADCX, AVX, AVX2, BMI, BMI2, F16C, FMA, +LZCNT, PCONFIG, PKU, VAES, VPCLMULQDQ, SERIALIZE, HRESET, AVX-VNNI, UINTR, +AVXIFMA, AVXVNNIINT8, AVXNECONVERT, CMPCCXADD, AVXVNNIINT16, SHA512, SM3 and +SM4 instruction set support. @item sapphirerapids @itemx emeraldrapids @@ -35196,8 +35209,7 @@ MOVDIRI, MOVDIR64B, ENQCMD, CLDEMOTE, PTWRITE, WAITPKG, SERIALIZE, TSXLDTRK, UINTR, AMX-BF16, AMX-TILE, AMX-INT8, AVX-VNNI, AVX512FP16, AVX512BF16, AMX-FP16, PREFETCHI, AMX-COMPLEX, AVX10.1-512, AVX-IFMA, AVX-NE-CONVERT, AVX-VNNI-INT16, AVX-VNNI-INT8, CMPccXADD, SHA512, SM3, SM4, AVX10.2-512, APX_F, AMX-AVX512, -AMX-FP8, AMX-TF32, AMX-TRANSPOSE, MOVRS, AMX-MOVRS and USER_MSR instruction set -support. +AMX-FP8, AMX-TF32, MOVRS and AMX-MOVRS instruction set support. @item bonnell @itemx atom diff --git a/gcc/ipa-fnsummary.cc b/gcc/ipa-fnsummary.cc index dd41de9..28f79aa 100644 --- a/gcc/ipa-fnsummary.cc +++ b/gcc/ipa-fnsummary.cc @@ -2356,7 +2356,8 @@ param_change_prob (ipa_func_body_info *fbi, gimple *stmt, int i) /* Lookup the most frequent update of the value and believe that it dominates all the other; precise analysis here is difficult. */ EXECUTE_IF_SET_IN_BITMAP (info.bb_set, 0, index, bi) - max = max.max (BASIC_BLOCK_FOR_FN (cfun, index)->count); + max = profile_count::max_prefer_initialized + (max, BASIC_BLOCK_FOR_FN (cfun, index)->count); if (dump_file) { fprintf (dump_file, " Set with count "); diff --git a/gcc/ipa-inline-transform.cc b/gcc/ipa-inline-transform.cc index a204854..99969aa 100644 --- a/gcc/ipa-inline-transform.cc +++ b/gcc/ipa-inline-transform.cc @@ -833,7 +833,8 @@ inline_transform (struct cgraph_node *node) FOR_ALL_BB_FN (bb, cfun) { bb->count = bb->count.apply_scale (num, den); - cfun->cfg->count_max = cfun->cfg->count_max.max (bb->count); + cfun->cfg->count_max = profile_count::max_prefer_initialized + (cfun->cfg->count_max, bb->count); } ENTRY_BLOCK_PTR_FOR_FN (cfun)->count = node->count; } diff --git a/gcc/predict.cc b/gcc/predict.cc index 895c5f9..d937cc6 100644 --- a/gcc/predict.cc +++ b/gcc/predict.cc @@ -3849,7 +3849,7 @@ update_max_bb_count (void) basic_block bb; FOR_BB_BETWEEN (bb, ENTRY_BLOCK_PTR_FOR_FN (cfun), NULL, next_bb) - true_count_max = true_count_max.max (bb->count); + true_count_max = profile_count::max_prefer_initialized (true_count_max, bb->count); cfun->cfg->count_max = true_count_max; @@ -4162,7 +4162,9 @@ estimate_bb_frequencies () executed, then preserve this info. */ if (!(bb->count == profile_count::zero ())) bb->count = count.guessed_local ().combine_with_ipa_count (ipa_count); - cfun->cfg->count_max = cfun->cfg->count_max.max (bb->count); + cfun->cfg->count_max + = profile_count::max_prefer_initialized (cfun->cfg->count_max, + bb->count); } free_aux_for_blocks (); @@ -4473,7 +4475,9 @@ rebuild_frequencies (void) cfun->cfg->count_max = profile_count::uninitialized (); FOR_BB_BETWEEN (bb, ENTRY_BLOCK_PTR_FOR_FN (cfun), NULL, next_bb) { - cfun->cfg->count_max = cfun->cfg->count_max.max (bb->count); + cfun->cfg->count_max + = profile_count::max_prefer_initialized (cfun->cfg->count_max, + bb->count); if (bb->count.nonzero_p () && bb->count.quality () >= AFDO) feedback_found = true; /* Uninitialized count may be result of inlining or an omision in an diff --git a/gcc/print-tree.cc b/gcc/print-tree.cc index f84be76..7b8a680 100644 --- a/gcc/print-tree.cc +++ b/gcc/print-tree.cc @@ -747,6 +747,14 @@ print_node (FILE *file, const char *prefix, tree node, int indent, case tcc_reference: case tcc_statement: case tcc_vl_exp: + if ((code == MEM_REF || code == TARGET_MEM_REF) + && MR_DEPENDENCE_CLIQUE (node) != 0) + { + indent_to (file, indent + 4); + fprintf (file, "clique: %d base: %d", + MR_DEPENDENCE_CLIQUE (node), + MR_DEPENDENCE_BASE (node)); + } if (code == BIND_EXPR) { print_node (file, "vars", TREE_OPERAND (node, 0), indent + 4); diff --git a/gcc/profile-count.h b/gcc/profile-count.h index 89746c6..85e601e 100644 --- a/gcc/profile-count.h +++ b/gcc/profile-count.h @@ -1109,30 +1109,23 @@ public: /* Make counter forcibly nonzero. */ profile_count force_nonzero () const; - profile_count max (profile_count other) const - { - profile_count val = *this; - /* Always prefer nonzero IPA counts over local counts. */ - if (ipa ().nonzero_p () || other.ipa ().nonzero_p ()) - { - val = ipa (); - other = other.ipa (); - } - if (!initialized_p ()) - return other; - if (!other.initialized_p ()) - return *this; - if (*this == zero ()) - return other; - if (other == zero ()) - return *this; - gcc_checking_assert (compatible_p (other)); - if (val.m_val < other.m_val || (m_val == other.m_val - && val.m_quality < other.m_quality)) - return other; - return *this; - } + /* Return maximum of A and B. If one of values is uninitialized return the + other. */ + + static profile_count + max_prefer_initialized (const profile_count a, const profile_count b) + { + if (!a.initialized_p ()) + return b; + if (!b.initialized_p ()) + return a; + profile_count ret; + gcc_checking_assert (a.compatible_p (b)); + ret.m_val = MAX (a.m_val, b.m_val); + ret.m_quality = MIN (a.m_quality, b.m_quality); + return ret; + } /* PROB is a probability in scale 0...REG_BR_PROB_BASE. Scale counter accordingly. */ diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index ca170a1..d910bc0 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,45 @@ +2025-10-15 Andrew MacLeod <amacleod@redhat.com> + + PR tree-optimization/121468 + PR tree-optimization/121206 + PR tree-optimization/122200 + * gcc.dg/pr121468.c: New. + * gcc.dg/pr122200.c: New. + +2025-10-15 Richard Earnshaw <rearnsha@arm.com> + + PR target/118460 + * gcc.target/arm/armv8_2-fp16-move-1.c: Adjust expected output. + * gcc.target/arm/armv8_2-fp16-move-2.c: Likewise. + +2025-10-15 Andrew Pinski <andrew.pinski@oss.qualcomm.com> + + PR tree-optimization/122037 + * gcc.dg/tree-ssa/vla-1.c: New test. + +2025-10-15 Alice Carlotti <alice.carlotti@arm.com> + + * gcc.target/aarch64/acle/rwsr-armv8p9.c: Fix incorrect encoding. + +2025-10-15 Sebastian Pop <spop@nvidia.com> + + * gcc.dg/autopar/runtime-auto.c: New test. + +2025-10-15 Christophe Lyon <christophe.lyon@linaro.org> + + PR target/122189 + * gcc.target/arm/mve/intrinsics/vadcq-check-carry.c: New test. + * gcc.target/arm/mve/intrinsics/vadcq_m_s32.c: Adjust instructions + order. + * gcc.target/arm/mve/intrinsics/vadcq_m_u32.c: Likewise. + * gcc.target/arm/mve/intrinsics/vsbcq_m_s32.c: Likewise. + * gcc.target/arm/mve/intrinsics/vsbcq_m_u32.c: Likewise. + +2025-10-15 Roger Sayle <roger@nextmovesoftware.com> + + PR rtl-optimization/122266 + * gcc.target/i386/pr122266.c: New test case. + 2025-10-14 Patrick Palka <ppalka@redhat.com> PR c++/122192 diff --git a/gcc/testsuite/gcc.dg/autopar/runtime-auto.c b/gcc/testsuite/gcc.dg/autopar/runtime-auto.c new file mode 100644 index 0000000..c1a3131 --- /dev/null +++ b/gcc/testsuite/gcc.dg/autopar/runtime-auto.c @@ -0,0 +1,53 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -ftree-parallelize-loops -fdump-tree-parloops2-details" } */ + +void abort (void); + +#define N 1000 + +int a[N], b[N], c[N]; + +void +test_parallel_loop (void) +{ + int i; + + /* This loop should be auto-parallelized when -ftree-parallelize-loops + (without =number) is used for runtime thread detection via OMP_NUM_THREADS. */ + for (i = 0; i < N; i++) + a[i] = b[i] + c[i]; +} + +int +main (void) +{ + int i; + + for (i = 0; i < N; i++) + { + b[i] = i; + c[i] = i * 2; + } + + test_parallel_loop (); + + for (i = 0; i < N; i++) + { + if (a[i] != b[i] + c[i]) + abort (); + } + + return 0; +} + +/* Check that the loop is parallelized with runtime thread detection. */ +/* { dg-final { scan-tree-dump "parallelizing" "parloops2" } } */ + +/* Check that "#pragma omp parallel" is generated. */ +/* { dg-final { scan-tree-dump "pragma omp parallel" "parloops2" } } */ + +/* Check that instead of generating a num_threads(x) clause, the compiler calls + "__builtin_omp_get_num_threads" that will set the number of threads at + program execution time. */ +/* { dg-final { scan-tree-dump "__builtin_omp_get_num_threads" "parloops2" } } */ + diff --git a/gcc/testsuite/gcc.dg/pr121468.c b/gcc/testsuite/gcc.dg/pr121468.c new file mode 100644 index 0000000..07df274 --- /dev/null +++ b/gcc/testsuite/gcc.dg/pr121468.c @@ -0,0 +1,30 @@ +/* { dg-do compile } */ +/* { dg-options "-Os" } */ +int e, f, n; +static int a () { return e; } +void b () { while (a()); } +static int d () { return e; } +static void g (int h) { + if (e) + c: + if (d()) + goto i; + do { + if (f) + goto c; + goto k; + i: + h = 2147483647; + k: + e = 2147483646; + e = 6 + e; + do { + b (); + } while (1784828957 / f + e + (808 + h) > 0); + } while (1 % h); +} +void m () { g (-2); } +int main () { + if (n) + g (-1); +} diff --git a/gcc/testsuite/gcc.dg/pr122200.c b/gcc/testsuite/gcc.dg/pr122200.c new file mode 100644 index 0000000..cd770fc --- /dev/null +++ b/gcc/testsuite/gcc.dg/pr122200.c @@ -0,0 +1,23 @@ +/* { dg-do compile } */ +/* { dg-options "-O3" } */ +/* { dg-additional-options "-mavx" { target { x86_64-*-* i?86-*-* } } } */ + + +int a, b; + +void f(float g[][5]) { + int c; + + for (c = 0; c != a; c++) + g[1][c] = c; + + for (int d; d; d++) + for (int e = 1; e != b; e++) { + for (c = 0; c != a; c++) { + g[0][1] = 1; + + if (g[1][c]) + g[1][c] = 1; + } + } +} diff --git a/gcc/testsuite/gcc.dg/tree-ssa/vla-1.c b/gcc/testsuite/gcc.dg/tree-ssa/vla-1.c new file mode 100644 index 0000000..37b7514 --- /dev/null +++ b/gcc/testsuite/gcc.dg/tree-ssa/vla-1.c @@ -0,0 +1,15 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -fdump-tree-optimized -fdump-tree-cddce1-details" } */ +/* PR tree-optimization/122037 */ + +void bar1 (char *, int) __attribute__((noreturn)); +void foo1 (int size) +{ + char temp[size]; + temp[size-1] = '\0'; + bar1 (temp, size); +} + +/* The call to __builtin_stack_save should have been removed. */ +/* { dg-final { scan-tree-dump "Deleting : __builtin_stack_save" "cddce1" } } */ +/* { dg-final { scan-tree-dump-not "__builtin_stack_save " "optimized" } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/acle/rwsr-armv8p9.c b/gcc/testsuite/gcc.target/aarch64/acle/rwsr-armv8p9.c index c49fbb5..1ff51de 100644 --- a/gcc/testsuite/gcc.target/aarch64/acle/rwsr-armv8p9.c +++ b/gcc/testsuite/gcc.target/aarch64/acle/rwsr-armv8p9.c @@ -72,7 +72,7 @@ readwrite_armv8p9a_sysregs (long long int a) a = __arm_rsr64 ("pmicfiltr_el0"); /* { { dg-final { scan-assembler "mrs\tx0, s3_3_c9_c6_0" } } */ a = __arm_rsr64 ("pmicntr_el0"); /* { { dg-final { scan-assembler "mrs\tx0, s3_3_c9_c4_0" } } */ a = __arm_rsr64 ("pmicntsvr_el1"); /* { { dg-final { scan-assembler "mrs\tx0, s2_0_c14_c12_0" } } */ - a = __arm_rsr64 ("pmsdsfr_el1"); /* { { dg-final { scan-assembler "mrs\tx0, s3_4_c9_c10_4" } } */ + a = __arm_rsr64 ("pmsdsfr_el1"); /* { { dg-final { scan-assembler "mrs\tx0, s3_0_c9_c10_4" } } */ a = __arm_rsr64 ("pmsscr_el1"); /* { { dg-final { scan-assembler "mrs\tx0, s3_0_c9_c13_3" } } */ a = __arm_rsr64 ("pmuacr_el1"); /* { { dg-final { scan-assembler "mrs\tx0, s3_0_c9_c14_4" } } */ a = __arm_rsr64 ("por_el0"); /* { { dg-final { scan-assembler "mrs\tx0, s3_3_c10_c2_4" } } */ diff --git a/gcc/testsuite/gcc.target/arm/armv8_2-fp16-move-1.c b/gcc/testsuite/gcc.target/arm/armv8_2-fp16-move-1.c index 444c4a3..02d7b51 100644 --- a/gcc/testsuite/gcc.target/arm/armv8_2-fp16-move-1.c +++ b/gcc/testsuite/gcc.target/arm/armv8_2-fp16-move-1.c @@ -134,8 +134,8 @@ test_select_8 (__fp16 a, __fp16 b, __fp16 c) } /* { dg-final { scan-assembler-times {vseleq\.f16\ts[0-9]+, s[0-9]+, s[0-9]+} 4 } } */ -/* { dg-final { scan-assembler-times {vselgt\.f16\ts[0-9]+, s[0-9]+, s[0-9]+} 1 } } */ -/* { dg-final { scan-assembler-times {vselge\.f16\ts[0-9]+, s[0-9]+, s[0-9]+} 1 } } */ +/* { dg-final { scan-assembler-times {vselgt\.f16\ts[0-9]+, s[0-9]+, s[0-9]+} 2 } } */ +/* { dg-final { scan-assembler-times {vselge\.f16\ts[0-9]+, s[0-9]+, s[0-9]+} 2 } } */ /* { dg-final { scan-assembler-not {vmov\.f16} } } */ diff --git a/gcc/testsuite/gcc.target/arm/armv8_2-fp16-move-2.c b/gcc/testsuite/gcc.target/arm/armv8_2-fp16-move-2.c index dff57ac..a249d71 100644 --- a/gcc/testsuite/gcc.target/arm/armv8_2-fp16-move-2.c +++ b/gcc/testsuite/gcc.target/arm/armv8_2-fp16-move-2.c @@ -8,4 +8,4 @@ test_select (__fp16 a, __fp16 b, __fp16 c) { return (a < b) ? b : c; } -/* { dg-final { scan-assembler "bx?(mi|pl)" } } */ +/* { dg-final { scan-assembler "vselgt\.f16\t" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq-check-carry.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq-check-carry.c new file mode 100644 index 0000000..3a9b8de --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq-check-carry.c @@ -0,0 +1,48 @@ +/* { dg-do run } */ +/* { dg-require-effective-target arm_v8_1m_mve_ok } */ +/* { dg-require-effective-target arm_mve_hw } */ +/* { dg-options "-O2" } */ +/* { dg-add-options arm_v8_1m_mve } */ + +#include "arm_mve.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#include <inttypes.h> +#include <stdio.h> + +__attribute((noinline)) void print_uint32x4_t(const char *name, uint32x4_t val) +{ + printf("%s: %u, %u, %u, %u\n", + name, + vgetq_lane_u32(val, 0), + vgetq_lane_u32(val, 1), + vgetq_lane_u32(val, 2), + vgetq_lane_u32(val, 3)); +} + +void __attribute__ ((noinline)) test_2(void) +{ + uint32x4_t v12, v18, v108; + unsigned v17 = 0; + v12 = vdupq_n_u32(1); + v18 = vadcq_u32(v12, v12, &v17); + v17 = 1; + v108 = vadcq_u32(v12, v12, &v17); + print_uint32x4_t("v108", v108); +} + +int main() +{ + test_2(); + return 0; +} + +#ifdef __cplusplus +} +#endif + +/* { dg-output "v108: 3, 2, 2, 2" } */ +/* { dg-final { scan-assembler-times {\tvmrs\t(?:ip|fp|r[0-9]+), FPSCR_nzcvqc} 3 } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_m_s32.c index 0d4cb77..c5a5878 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_m_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_m_s32.c @@ -14,12 +14,12 @@ extern "C" { ** ... ** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) ** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... ** bfi (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?: @.*|) ** ... ** vmsr FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?: @.*|) ** ... -** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) -** ... ** vpst(?: @.*|) ** ... ** vadct.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) @@ -41,12 +41,12 @@ foo (int32x4_t inactive, int32x4_t a, int32x4_t b, unsigned *carry, mve_pred16_t ** ... ** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) ** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... ** bfi (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?: @.*|) ** ... ** vmsr FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?: @.*|) ** ... -** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) -** ... ** vpst(?: @.*|) ** ... ** vadct.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_m_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_m_u32.c index a0ba682..23908a4 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_m_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_m_u32.c @@ -14,12 +14,12 @@ extern "C" { ** ... ** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) ** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... ** bfi (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?: @.*|) ** ... ** vmsr FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?: @.*|) ** ... -** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) -** ... ** vpst(?: @.*|) ** ... ** vadct.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) @@ -41,12 +41,12 @@ foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, unsigned *carry, mve_pred1 ** ... ** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) ** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... ** bfi (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?: @.*|) ** ... ** vmsr FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?: @.*|) ** ... -** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) -** ... ** vpst(?: @.*|) ** ... ** vadct.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_m_s32.c index 7a33261..940e2ed 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_m_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_m_s32.c @@ -14,12 +14,12 @@ extern "C" { ** ... ** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) ** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... ** bfi (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?: @.*|) ** ... ** vmsr FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?: @.*|) ** ... -** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) -** ... ** vpst(?: @.*|) ** ... ** vsbct.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) @@ -41,12 +41,12 @@ foo (int32x4_t inactive, int32x4_t a, int32x4_t b, unsigned *carry, mve_pred16_t ** ... ** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) ** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... ** bfi (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?: @.*|) ** ... ** vmsr FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?: @.*|) ** ... -** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) -** ... ** vpst(?: @.*|) ** ... ** vsbct.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_m_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_m_u32.c index 6090219..478b938 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_m_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_m_u32.c @@ -14,12 +14,12 @@ extern "C" { ** ... ** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) ** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... ** bfi (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?: @.*|) ** ... ** vmsr FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?: @.*|) ** ... -** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) -** ... ** vpst(?: @.*|) ** ... ** vsbct.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) @@ -41,12 +41,12 @@ foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, unsigned *carry, mve_pred1 ** ... ** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) ** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... ** bfi (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?: @.*|) ** ... ** vmsr FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?: @.*|) ** ... -** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) -** ... ** vpst(?: @.*|) ** ... ** vsbct.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) diff --git a/gcc/testsuite/gcc.target/i386/pr122266.c b/gcc/testsuite/gcc.target/i386/pr122266.c new file mode 100644 index 0000000..4e31a6a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr122266.c @@ -0,0 +1,10 @@ +/* { dg-do compile { target int128 } } */ +/* { dg-options "-O2" } */ + +signed __int128 foo(signed __int128 x) { + signed __int128 t = x >> 127; + return ((x^t)>>1)^t; +} + +/* { dg-final { scan-assembler-times "xorq" 4 } } */ +/* { dg-final { scan-assembler-times "sarq" 2 } } */ diff --git a/gcc/tree-parloops.cc b/gcc/tree-parloops.cc index 666c6a1..7361828 100644 --- a/gcc/tree-parloops.cc +++ b/gcc/tree-parloops.cc @@ -2601,10 +2601,19 @@ create_parallel_loop (class loop *loop, tree loop_fn, tree data, gsi = gsi_last_bb (paral_bb); gcc_checking_assert (n_threads != 0); - t = build_omp_clause (loc, OMP_CLAUSE_NUM_THREADS); - OMP_CLAUSE_NUM_THREADS_EXPR (t) - = build_int_cst (integer_type_node, n_threads); - omp_par_stmt = gimple_build_omp_parallel (NULL, t, loop_fn, data); + if (n_threads == INT_MAX) + /* No hardcoded thread count, let OpenMP runtime decide. */ + omp_par_stmt = gimple_build_omp_parallel (NULL, NULL_TREE, loop_fn, + data); + else + { + /* Build the OMP_CLAUSE_NUM_THREADS clause only if we have a fixed + thread count. */ + t = build_omp_clause (loc, OMP_CLAUSE_NUM_THREADS); + OMP_CLAUSE_NUM_THREADS_EXPR (t) + = build_int_cst (integer_type_node, n_threads); + omp_par_stmt = gimple_build_omp_parallel (NULL, t, loop_fn, data); + } gimple_set_location (omp_par_stmt, loc); gsi_insert_after (&gsi, omp_par_stmt, GSI_NEW_STMT); @@ -2812,7 +2821,6 @@ gen_parallel_loop (class loop *loop, struct clsn_data clsn_data; location_t loc; gimple *cond_stmt; - unsigned int m_p_thread=2; /* From @@ -2885,15 +2893,14 @@ gen_parallel_loop (class loop *loop, if (!oacc_kernels_p) { - if (loop->inner) - m_p_thread=2; - else - m_p_thread=MIN_PER_THREAD; - gcc_checking_assert (n_threads != 0); + /* For runtime thread detection, use a conservative estimate of 2 threads + for the many iterations condition check. */ + unsigned threads = (n_threads == INT_MAX) ? 2 : n_threads; + unsigned m_p_thread = loop->inner ? 2 : MIN_PER_THREAD; many_iterations_cond = fold_build2 (GE_EXPR, boolean_type_node, - nit, build_int_cst (type, m_p_thread * n_threads - 1)); + nit, build_int_cst (type, m_p_thread * threads - 1)); many_iterations_cond = fold_build2 (TRUTH_AND_EXPR, boolean_type_node, @@ -3905,14 +3912,15 @@ parallelize_loops (bool oacc_kernels_p) estimated = estimated_loop_iterations_int (loop); if (estimated == -1) estimated = get_likely_max_loop_iterations_int (loop); + /* For runtime thread detection, use an estimate of 2 threads. */ + unsigned threads = (n_threads == INT_MAX) ? 2 : n_threads; + unsigned m_p_thread = loop->inner ? 2 : MIN_PER_THREAD; /* FIXME: Bypass this check as graphite doesn't update the count and frequency correctly now. */ if (!flag_loop_parallelize_all && !oacc_kernels_p && ((estimated != -1 - && (estimated - < ((HOST_WIDE_INT) n_threads - * (loop->inner ? 2 : MIN_PER_THREAD) - 1))) + && (estimated < ((HOST_WIDE_INT) threads * m_p_thread - 1))) /* Do not bother with loops in cold areas. */ || optimize_loop_nest_for_size_p (loop))) continue; diff --git a/gcc/tree-ssa-dce.cc b/gcc/tree-ssa-dce.cc index 4386908..160c28c 100644 --- a/gcc/tree-ssa-dce.cc +++ b/gcc/tree-ssa-dce.cc @@ -1682,9 +1682,12 @@ eliminate_unnecessary_stmts (bool aggressive) update_stmt (call_stmt); release_ssa_name (name); + /* __builtin_stack_save without lhs is not needed. */ + if (gimple_call_builtin_p (call_stmt, BUILT_IN_STACK_SAVE)) + remove_dead_stmt (&gsi, bb, to_remove_edges); /* GOMP_SIMD_LANE (unless three argument) or ASAN_POISON without lhs is not needed. */ - if (gimple_call_internal_p (call_stmt)) + else if (gimple_call_internal_p (call_stmt)) switch (gimple_call_internal_fn (call_stmt)) { case IFN_GOMP_SIMD_LANE: diff --git a/gcc/tree-ssa-loop-unswitch.cc b/gcc/tree-ssa-loop-unswitch.cc index c5ca4ff..dc0cb24 100644 --- a/gcc/tree-ssa-loop-unswitch.cc +++ b/gcc/tree-ssa-loop-unswitch.cc @@ -136,7 +136,8 @@ struct unswitch_predicate tree rhs = gimple_cond_rhs (stmt); enum tree_code code = gimple_cond_code (stmt); condition = build2 (code, boolean_type_node, lhs, rhs); - count = EDGE_SUCC (bb, 0)->count ().max (EDGE_SUCC (bb, 1)->count ()); + count = profile_count::max_prefer_initialized (EDGE_SUCC (bb, 0)->count (), + EDGE_SUCC (bb, 1)->count ()); if (irange::supports_p (TREE_TYPE (lhs))) { auto range_op = range_op_handler (code); diff --git a/gcc/tree-vect-loop.cc b/gcc/tree-vect-loop.cc index 97c1bf0..568353a 100644 --- a/gcc/tree-vect-loop.cc +++ b/gcc/tree-vect-loop.cc @@ -7752,7 +7752,9 @@ vect_transform_reduction (loop_vec_info loop_vinfo, assumption is not true: we use reduc_index to record the index of the reduction variable. */ int reduc_index = SLP_TREE_REDUC_IDX (slp_node); - tree vectype_in = SLP_TREE_VECTYPE (SLP_TREE_CHILDREN (slp_node)[0]); + tree vectype_in = SLP_TREE_VECTYPE (slp_node); + if (lane_reducing_op_p (op.code)) + vectype_in = SLP_TREE_VECTYPE (SLP_TREE_CHILDREN (slp_node)[0]); vec_num = vect_get_num_copies (loop_vinfo, SLP_TREE_CHILDREN (slp_node)[0]); diff --git a/gcc/value-range.cc b/gcc/value-range.cc index d34a262..f93a7e5 100644 --- a/gcc/value-range.cc +++ b/gcc/value-range.cc @@ -55,6 +55,93 @@ irange_bitmask::irange_bitmask (tree type, } } +// Return a range in R of TYPE for this bitmask which encompasses +// a set of valid values which are allowable for this bitmask/value +// combination. If false is returned, no range was set. + +bool +irange_bitmask::range_from_mask (irange &r, tree type) const +{ + if (unknown_p ()) + return false; + + gcc_checking_assert ((value () & mask ()) == 0); + unsigned popcount = wi::popcount (mask ()); + + // For 0, 1 or 2 bits set, create a range with only the allowed values. + if (popcount <= 2) + { + // VALUE is always a valid range. + r.set (type, value (), value ()); + // If there are bits in mask, (VALUE | MASK) is also valid. + if (popcount >= 1) + r.union_ (int_range<1> (type, value () | mask (), value () | mask ())); + // If there are 2 bits set, add the other 2 possible values. + if (popcount == 2) + { + // Extract the two 1-bit masks into lb and ub. + wide_int lb = mask () & -mask (); // Lowest set bit. + wide_int ub = mask () & (mask () - 1); // The other bit. + r.union_ (int_range<1> (type, value () | lb, value () | lb)); + r.union_ (int_range<1> (type, value () | ub, value () | ub)); + } + return true; + } + + // Otherwise, calculate the valid range allowed by the bitmask. + int prec = TYPE_PRECISION (type); + wide_int ub = mask () | value (); + wide_int sign_bit = wi::one (prec) << (prec - 1); + wide_int sign_mask = mask () & sign_bit; + wide_int sign_value = value () & sign_bit; + // Create a lower and upper bound. + // If unsigned, or the sign is known to be positive, create [lb, ub] + if (TYPE_SIGN (type) == UNSIGNED || (sign_mask == 0 && sign_value == 0)) + r.set (type, value (), mask () | value ()); + // If the sign bit is KNOWN to be 1, we have a completely negative range. + else if (sign_mask == 0 && sign_value != 0) + r.set (type, value (), value () | (mask () & ~sign_bit)); + else + { + // Otherwise there are 2 ranges, a negative and positive interval. + wide_int neg_base = value () | sign_bit; + wide_int pos_mask = mask () & ~sign_bit; + r.set (type, neg_base , neg_base | pos_mask); + r.union_ (int_range<1> (type, value (), value () | pos_mask)); + } + + // If the mask doesn't have a trailing zero, there is nothing else to filter. + int z = wi::ctz (mask ()); + if (z == 0) + return true; + + // Remove the [0, X] values which the trailing-zero mask rules out. + // For example, if z == 4, the mask is 0xFFF0, and the lowest 4 bits + // define the range [0, 15]. Only (value & low_mask) is allowed. + ub = (wi::one (prec) << z) - 1; // Upper bound of range. + int_range<4> mask_range (type, wi::zero (prec), ub); + // Remove the valid value from the excluded range and form an anti-range. + wide_int allow = value () & ub; + mask_range.intersect (int_range<2> (type, allow, allow, VR_ANTI_RANGE)); + mask_range.invert (); + r.intersect (mask_range); + + if (TYPE_SIGN (type) == SIGNED) + { + // For signed negative values, find the lowest value with trailing zeros. + // This forms a range such as [-512, -1] for z=9. + wide_int lb = -(wi::one (prec) << z); + int_range<4> mask_range (type, lb, wi::minus_one (prec)); + // Remove the one allowed value from that set. + wide_int allow = value () | lb; + mask_range.intersect (int_range<2> (type, allow, allow, VR_ANTI_RANGE)); + mask_range.invert (); + r.intersect (mask_range); + } + return true; +} + + void irange::accept (const vrange_visitor &v) const { @@ -2275,47 +2362,57 @@ irange::invert () // This routine will take the bounds [LB, UB], and apply the bitmask to those // values such that both bounds satisfy the bitmask. TRUE is returned // if either bound changes, and they are returned as [NEW_LB, NEW_UB]. -// if NEW_UB < NEW_LB, then the entire bound is to be removed as none of -// the values are valid. +// If there is an overflow, or if (NEW_UB < NEW_LB), then the entire bound is +// to be removed as none of the values are valid. This is indicated by +// teturning TRUE in OVF. False indicates the bounds are fine. // ie, [4, 14] MASK 0xFFFE VALUE 0x1 -// means all values must be odd, the new bounds returned will be [5, 13]. +// means all values must be odd, the new bounds returned will be [5, 13] with +// OVF set to FALSE. // ie, [4, 4] MASK 0xFFFE VALUE 0x1 -// would return [1, 0] and as the LB < UB, the entire subrange is invalid -// and should be removed. +// would return TRUE and OVF == TRUE. The entire subrange should be removed. bool irange::snap (const wide_int &lb, const wide_int &ub, - wide_int &new_lb, wide_int &new_ub) + wide_int &new_lb, wide_int &new_ub, bool &ovf) { + ovf = false; int z = wi::ctz (m_bitmask.mask ()); if (z == 0) return false; + // Shortcircuit check for values that are already good. + if ((((lb ^ m_bitmask.value ()) | (ub ^ m_bitmask.value ())) + & ~m_bitmask.mask ()) == 0) + return false; + const wide_int step = (wi::one (TYPE_PRECISION (type ())) << z); const wide_int match_mask = step - 1; const wide_int value = m_bitmask.value () & match_mask; - bool ovf = false; - wide_int rem_lb = lb & match_mask; wide_int offset = (value - rem_lb) & match_mask; new_lb = lb + offset; // Check for overflows at +INF if (wi::lt_p (new_lb, lb, TYPE_SIGN (type ()))) - ovf = true; + { + ovf = true; + return true; + } wide_int rem_ub = ub & match_mask; wide_int offset_ub = (rem_ub - value) & match_mask; new_ub = ub - offset_ub; // Check for underflows at -INF if (wi::gt_p (new_ub, ub, TYPE_SIGN (type ()))) - ovf = true; + { + ovf = true; + return true; + } - // Overflow or inverted range = invalid - if (ovf || wi::lt_p (new_ub, new_lb, TYPE_SIGN (type ()))) + // If inverted range is invalid, set overflow to TRUE. + if (wi::lt_p (new_ub, new_lb, TYPE_SIGN (type ()))) { - new_lb = wi::one (lb.get_precision ()); - new_ub = wi::zero (ub.get_precision ()); + ovf = true; return true; } return (new_lb != lb) || (new_ub != ub); @@ -2334,11 +2431,12 @@ irange::snap_subranges () wide_int lb, ub; for (x = 0; x < m_num_ranges; x++) { - if (snap (lower_bound (x), upper_bound (x), lb, ub)) + bool ovf; + if (snap (lower_bound (x), upper_bound (x), lb, ub, ovf)) { changed = true; - // This subrange is to be completely removed. - if (wi::lt_p (ub, lb, TYPE_SIGN (type ()))) + // Check if this subrange is to be completely removed. + if (ovf) { int_range<1> tmp (type (), lower_bound (x), upper_bound (x)); invalid.union_ (tmp); @@ -2359,109 +2457,25 @@ irange::snap_subranges () return changed; } -// If the mask can be trivially converted to a range, do so. -// Otherwise attempt to remove the lower bits from the range. -// Return true if the range changed in any way. +// If the bitmask has a range representation, intersect this range with +// the bitmasks range. Then ensure all enpoints match the bitmask. +// Return TRUE if the range changes at all. bool irange::set_range_from_bitmask () { gcc_checking_assert (!undefined_p ()); - if (m_bitmask.unknown_p ()) - return false; - - // If all the bits are known, this is a singleton. - if (m_bitmask.mask () == 0) - { - // Make sure the singleton is within the range. - if (contains_p (m_bitmask.value ())) - set (m_type, m_bitmask.value (), m_bitmask.value ()); - else - set_undefined (); - return true; - } - - unsigned popcount = wi::popcount (m_bitmask.get_nonzero_bits ()); - - // If we have only one bit set in the mask, we can figure out the - // range immediately. - if (popcount == 1) - { - // Make sure we don't pessimize the range. - if (!contains_p (m_bitmask.get_nonzero_bits ())) - return false; - - bool has_zero = contains_zero_p (*this); - wide_int nz = m_bitmask.get_nonzero_bits (); - set (m_type, nz, nz); - m_bitmask.set_nonzero_bits (nz); - if (has_zero) - { - int_range<2> zero; - zero.set_zero (m_type); - union_ (zero); - } - if (flag_checking) - verify_range (); - return true; - } - else if (popcount == 0) - { - set_zero (m_type); - return true; - } + // Snap subranmges when bitmask is first set. + snap_subranges (); + if (undefined_p ()) + return true; - // If the mask doesn't have a trailing zero, theres nothing to filter. - int z = wi::ctz (m_bitmask.mask ()); - if (!z) + // Calculate the set of ranges valid for the bitmask. + int_range_max allow; + if (!m_bitmask.range_from_mask (allow, m_type)) return false; - - int prec = TYPE_PRECISION (m_type); - wide_int value = m_bitmask.value (); - wide_int mask = m_bitmask.mask (); - - // Remove the [0, X] values which the trailing-zero mask rules out. - // For example, if z == 4, the mask is 0xFFF0, and the lowest 4 bits - // define the range [0, 15]. Only one of which (value & low_mask) is allowed. - wide_int ub = (wi::one (prec) << z) - 1; // Upper bound of affected range. - int_range_max mask_range (m_type, wi::zero (prec), ub); - - // Remove the one valid value from the excluded range and form an anti-range. - wide_int allow = value & ub; - mask_range.intersect (int_range<2> (m_type, allow, allow, VR_ANTI_RANGE)); - - // Invert it to get the allowed values and intersect it with the main range. - mask_range.invert (); - bool changed = intersect (mask_range); - - // Now handle the rest of the domain — the upper side for positive values, - // or [-X, -1] for signed negatives. - // Compute the maximum value representable under the mask/value constraint. - ub = mask | value; - - // If value is non-negative, adjust the upper limit to remove values above - // UB that conflict with known fixed bits. - if (TYPE_SIGN (m_type) == UNSIGNED || wi::clz (ub) > 0) - mask_range = int_range<1> (m_type, wi::zero (prec), ub); - else - { - // For signed negative values, find the lowest value with trailing zeros. - // This forms a range such as [-512, -1] for z=9. - wide_int lb = -(wi::one (prec) << z); - mask_range = int_range<2> (m_type, lb, wi::minus_one (prec)); - - // Remove the one allowed value from that set. - allow = value | lb; - mask_range.intersect (int_range<2> (m_type, allow, allow, VR_ANTI_RANGE)); - mask_range.invert (); - } - - // Make sure we call intersect, so do it first. - changed = intersect (mask_range) | changed; - // Now make sure each subrange endpoint matches the bitmask. - changed |= snap_subranges (); - - return changed; + // And intersect that set of ranges with the current set. + return intersect (allow); } void @@ -2932,7 +2946,7 @@ test_irange_snap_bounds () tree u1 = build_nonstandard_integer_type (1, /*unsigned=*/ 1); // Basic aligned range: even-only - assert_snap_result (5, 15, 6, 14, 0xFFFFFFFE, 0x0, u32); + assert_snap_result (5, 15, 6, 14, 0xE, 0x0, u32); // Singleton that doesn't match mask: undefined. assert_snap_result (7, 7, 1, 0, 0xFFFFFFFE, 0x0, u32); // 8-bit signed char, mask 0xF0 (i.e. step of 16). @@ -3204,15 +3218,12 @@ range_tests_misc () static void range_tests_nonzero_bits () { - int_range<2> r0, r1; + int_range<8> r0, r1; // Adding nonzero bits to a varying drops the varying. r0.set_varying (integer_type_node); r0.set_nonzero_bits (INT (255)); ASSERT_TRUE (!r0.varying_p ()); - // Dropping the nonzero bits brings us back to varying. - r0.set_nonzero_bits (INT (-1)); - ASSERT_TRUE (r0.varying_p ()); // Test contains_p with nonzero bits. r0.set_zero (integer_type_node); @@ -3244,17 +3255,6 @@ range_tests_nonzero_bits () r0.intersect (r1); ASSERT_TRUE (r0.get_nonzero_bits () == 0xff); - // The union of a mask of 0xff..ffff00 with a mask of 0xff spans the - // entire domain, and makes the range a varying. - r0.set_varying (integer_type_node); - wide_int x = wi::shwi (0xff, TYPE_PRECISION (integer_type_node)); - x = wi::bit_not (x); - r0.set_nonzero_bits (x); // 0xff..ff00 - r1.set_varying (integer_type_node); - r1.set_nonzero_bits (INT (0xff)); - r0.union_ (r1); - ASSERT_TRUE (r0.varying_p ()); - // Test that setting a nonzero bit of 1 does not pessimize the range. r0.set_zero (integer_type_node); r0.set_nonzero_bits (INT (1)); diff --git a/gcc/value-range.h b/gcc/value-range.h index 3bc02db..6ae46e1 100644 --- a/gcc/value-range.h +++ b/gcc/value-range.h @@ -150,6 +150,7 @@ public: bool operator!= (const irange_bitmask &src) const { return !(*this == src); } void verify_mask () const; void dump (FILE *) const; + bool range_from_mask (irange &r, tree type) const; bool member_p (const wide_int &val) const; @@ -346,7 +347,8 @@ private: bool union_bitmask (const irange &r); bool set_range_from_bitmask (); bool snap_subranges (); - bool snap (const wide_int &, const wide_int &, wide_int &, wide_int &); + bool snap (const wide_int &, const wide_int &, wide_int &, wide_int &, + bool &); bool intersect (const wide_int& lb, const wide_int& ub); bool union_append (const irange &r); diff --git a/libgomp/ChangeLog b/libgomp/ChangeLog index 8b9f0ff..fae7455 100644 --- a/libgomp/ChangeLog +++ b/libgomp/ChangeLog @@ -1,3 +1,15 @@ +2025-10-15 Tobias Burnus <tburnus@baylibre.com> + + * libgomp.texi (OpenMP Context Selectors): Add note that there is + currently an exact match between ISA and compilation, ignoring + compatibilities in both ways. + * testsuite/libgomp.c/declare-variant-4.h: Add missing variant + functions for specific and generic AMD GPUs. + * testsuite/libgomp.c/declare-variant-4-gfx10-3-generic.c: New test. + * testsuite/libgomp.c/declare-variant-4-gfx11-generic.c: New test. + * testsuite/libgomp.c/declare-variant-4-gfx9-4-generic.c: New test. + * testsuite/libgomp.c/declare-variant-4-gfx9-generic.c: New test. + 2025-10-10 Tobias Burnus <tburnus@baylibre.com> * plugin/plugin-gcn.c (is_integrated_apu): New; currently '#if 0'. diff --git a/libgomp/libgomp.texi b/libgomp/libgomp.texi index 73c8c3e..62b04af 100644 --- a/libgomp/libgomp.texi +++ b/libgomp/libgomp.texi @@ -6824,6 +6824,13 @@ the following traits are supported in addition; while OpenMP is supported on more architectures, GCC currently does not match any @code{arch} or @code{isa} traits for those. +Note that for AMD GCN and Nvidia PTX, the @code{isa} is currently an +exact match between the compiled-for ISA architecture and the matching +@code{isa} trait value. For instance, when compiling for @code{gfx942}, +the @code{isa} trait value @code{gfx9-4-generic} is not matched and, +likewise, @code{gfx942} is not matched when compiling for its generic +architecture. + @multitable @columnfractions .65 .30 @headitem @code{arch} @tab @code{isa} @item @code{x86}, @code{x86_64}, @code{i386}, @code{i486}, diff --git a/libgomp/testsuite/libgomp.c/declare-variant-4-gfx10-3-generic.c b/libgomp/testsuite/libgomp.c/declare-variant-4-gfx10-3-generic.c new file mode 100644 index 0000000..b7b95e6 --- /dev/null +++ b/libgomp/testsuite/libgomp.c/declare-variant-4-gfx10-3-generic.c @@ -0,0 +1,25 @@ +/* { dg-do link { target { offload_target_amdgcn } } } */ +/* { dg-additional-options -foffload=amdgcn-amdhsa } */ +/* { dg-additional-options -foffload=-march=gfx10-3-generic } */ +/* { dg-additional-options "-foffload=-fdump-tree-optimized" } */ + +#include "declare-variant-4.h" + +/* { dg-final { only_for_offload_target amdgcn-amdhsa scan-offload-tree-dump "= gfx10_3_generic \\(\\);" "optimized" } } */ + + +/* This code will link nicely if the multilib for that GPU architecture + has been build for GCC. In that case, scan-offload-tree-dump will + PASS and the linking will yield an XPASS message due to following line: */ + +/* { dg-excess-errors "ld: error: unable to find library -lgomp|gcn mkoffload: fatal error" } */ + +/* If the multi-lib config is not available (as this is a generic config), + scan-offload-tree-dump will PASS - but linking fails with the + following error (XFAIL): + ld: error: unable to find library -lgomp + collect2: error: ld returned 1 exit status + gcn mkoffload: fatal error: ...-gnu-accel-amdgcn-amdhsa-gcc returned 1 exit status + compilation terminated. + lto-wrapper: fatal error: .../amdgcn-amdhsa/mkoffload returned 1 exit status + compilation terminated. */ diff --git a/libgomp/testsuite/libgomp.c/declare-variant-4-gfx1030.c b/libgomp/testsuite/libgomp.c/declare-variant-4-gfx1030.c index d98d5ef..3703e96 100644 --- a/libgomp/testsuite/libgomp.c/declare-variant-4-gfx1030.c +++ b/libgomp/testsuite/libgomp.c/declare-variant-4-gfx1030.c @@ -6,3 +6,28 @@ #include "declare-variant-4.h" /* { dg-final { only_for_offload_target amdgcn-amdhsa scan-offload-tree-dump "= gfx1030 \\(\\);" "optimized" } } */ + + +/* This code will link nicely if the multilib for that GPU architecture + has been build for GCC. In that case, scan-offload-tree-dump will + PASS and the linking will yield an XPASS message due to following line: */ + +/* { dg-excess-errors "ld: error: unable to find library -lgomp|gcn mkoffload: fatal error" } */ + +/* If the multi-lib config is not available, there are two options: + + * If the generic multi-lib is available, mkoffload fails early, + yielding UNRESOLVED for scan-offload-tree-dump and an XFAIL + for the message: + gcn mkoffload: fatal error: GCC was built without library support + for '-march=gfx...'; consider compiling for the associated + generic architecture '-march=gfx...-generic' instead + + * Or compling succeeds - then scan-offload-tree-dump will PASS - + but linking fails with the following error (XFAIL): + ld: error: unable to find library -lgomp + collect2: error: ld returned 1 exit status + gcn mkoffload: fatal error: ...-gnu-accel-amdgcn-amdhsa-gcc returned 1 exit status + compilation terminated. + lto-wrapper: fatal error: .../amdgcn-amdhsa/mkoffload returned 1 exit status + compilation terminated. */ diff --git a/libgomp/testsuite/libgomp.c/declare-variant-4-gfx1031.c b/libgomp/testsuite/libgomp.c/declare-variant-4-gfx1031.c new file mode 100644 index 0000000..e0d6289 --- /dev/null +++ b/libgomp/testsuite/libgomp.c/declare-variant-4-gfx1031.c @@ -0,0 +1,33 @@ +/* { dg-do link { target { offload_target_amdgcn } } } */ +/* { dg-additional-options -foffload=amdgcn-amdhsa } */ +/* { dg-additional-options -foffload=-march=gfx1031 } */ +/* { dg-additional-options "-foffload=-fdump-tree-optimized" } */ + +#include "declare-variant-4.h" + +/* { dg-final { only_for_offload_target amdgcn-amdhsa scan-offload-tree-dump "= gfx1031 \\(\\);" "optimized" } } */ + + +/* This code will link nicely if the multilib for that GPU architecture + has been build for GCC. In that case, scan-offload-tree-dump will + PASS and the linking will yield an XPASS message due to following line: */ + +/* { dg-excess-errors "ld: error: unable to find library -lgomp|gcn mkoffload: fatal error" } */ + +/* If the multi-lib config is not available, there are two options: + + * If the generic multi-lib is available, mkoffload fails early, + yielding UNRESOLVED for scan-offload-tree-dump and an XFAIL + for the message: + gcn mkoffload: fatal error: GCC was built without library support + for '-march=gfx...'; consider compiling for the associated + generic architecture '-march=gfx...-generic' instead + + * Or compling succeeds - then scan-offload-tree-dump will PASS - + but linking fails with the following error (XFAIL): + ld: error: unable to find library -lgomp + collect2: error: ld returned 1 exit status + gcn mkoffload: fatal error: ...-gnu-accel-amdgcn-amdhsa-gcc returned 1 exit status + compilation terminated. + lto-wrapper: fatal error: .../amdgcn-amdhsa/mkoffload returned 1 exit status + compilation terminated. */ diff --git a/libgomp/testsuite/libgomp.c/declare-variant-4-gfx1032.c b/libgomp/testsuite/libgomp.c/declare-variant-4-gfx1032.c new file mode 100644 index 0000000..46174cc2 --- /dev/null +++ b/libgomp/testsuite/libgomp.c/declare-variant-4-gfx1032.c @@ -0,0 +1,33 @@ +/* { dg-do link { target { offload_target_amdgcn } } } */ +/* { dg-additional-options -foffload=amdgcn-amdhsa } */ +/* { dg-additional-options -foffload=-march=gfx1032 } */ +/* { dg-additional-options "-foffload=-fdump-tree-optimized" } */ + +#include "declare-variant-4.h" + +/* { dg-final { only_for_offload_target amdgcn-amdhsa scan-offload-tree-dump "= gfx1032 \\(\\);" "optimized" } } */ + + +/* This code will link nicely if the multilib for that GPU architecture + has been build for GCC. In that case, scan-offload-tree-dump will + PASS and the linking will yield an XPASS message due to following line: */ + +/* { dg-excess-errors "ld: error: unable to find library -lgomp|gcn mkoffload: fatal error" } */ + +/* If the multi-lib config is not available, there are two options: + + * If the generic multi-lib is available, mkoffload fails early, + yielding UNRESOLVED for scan-offload-tree-dump and an XFAIL + for the message: + gcn mkoffload: fatal error: GCC was built without library support + for '-march=gfx...'; consider compiling for the associated + generic architecture '-march=gfx...-generic' instead + + * Or compling succeeds - then scan-offload-tree-dump will PASS - + but linking fails with the following error (XFAIL): + ld: error: unable to find library -lgomp + collect2: error: ld returned 1 exit status + gcn mkoffload: fatal error: ...-gnu-accel-amdgcn-amdhsa-gcc returned 1 exit status + compilation terminated. + lto-wrapper: fatal error: .../amdgcn-amdhsa/mkoffload returned 1 exit status + compilation terminated. */ diff --git a/libgomp/testsuite/libgomp.c/declare-variant-4-gfx1033.c b/libgomp/testsuite/libgomp.c/declare-variant-4-gfx1033.c new file mode 100644 index 0000000..1bd6e66 --- /dev/null +++ b/libgomp/testsuite/libgomp.c/declare-variant-4-gfx1033.c @@ -0,0 +1,33 @@ +/* { dg-do link { target { offload_target_amdgcn } } } */ +/* { dg-additional-options -foffload=amdgcn-amdhsa } */ +/* { dg-additional-options -foffload=-march=gfx1033 } */ +/* { dg-additional-options "-foffload=-fdump-tree-optimized" } */ + +#include "declare-variant-4.h" + +/* { dg-final { only_for_offload_target amdgcn-amdhsa scan-offload-tree-dump "= gfx1033 \\(\\);" "optimized" } } */ + + +/* This code will link nicely if the multilib for that GPU architecture + has been build for GCC. In that case, scan-offload-tree-dump will + PASS and the linking will yield an XPASS message due to following line: */ + +/* { dg-excess-errors "ld: error: unable to find library -lgomp|gcn mkoffload: fatal error" } */ + +/* If the multi-lib config is not available, there are two options: + + * If the generic multi-lib is available, mkoffload fails early, + yielding UNRESOLVED for scan-offload-tree-dump and an XFAIL + for the message: + gcn mkoffload: fatal error: GCC was built without library support + for '-march=gfx...'; consider compiling for the associated + generic architecture '-march=gfx...-generic' instead + + * Or compling succeeds - then scan-offload-tree-dump will PASS - + but linking fails with the following error (XFAIL): + ld: error: unable to find library -lgomp + collect2: error: ld returned 1 exit status + gcn mkoffload: fatal error: ...-gnu-accel-amdgcn-amdhsa-gcc returned 1 exit status + compilation terminated. + lto-wrapper: fatal error: .../amdgcn-amdhsa/mkoffload returned 1 exit status + compilation terminated. */ diff --git a/libgomp/testsuite/libgomp.c/declare-variant-4-gfx1034.c b/libgomp/testsuite/libgomp.c/declare-variant-4-gfx1034.c new file mode 100644 index 0000000..4f67a73 --- /dev/null +++ b/libgomp/testsuite/libgomp.c/declare-variant-4-gfx1034.c @@ -0,0 +1,33 @@ +/* { dg-do link { target { offload_target_amdgcn } } } */ +/* { dg-additional-options -foffload=amdgcn-amdhsa } */ +/* { dg-additional-options -foffload=-march=gfx1034 } */ +/* { dg-additional-options "-foffload=-fdump-tree-optimized" } */ + +#include "declare-variant-4.h" + +/* { dg-final { only_for_offload_target amdgcn-amdhsa scan-offload-tree-dump "= gfx1034 \\(\\);" "optimized" } } */ + + +/* This code will link nicely if the multilib for that GPU architecture + has been build for GCC. In that case, scan-offload-tree-dump will + PASS and the linking will yield an XPASS message due to following line: */ + +/* { dg-excess-errors "ld: error: unable to find library -lgomp|gcn mkoffload: fatal error" } */ + +/* If the multi-lib config is not available, there are two options: + + * If the generic multi-lib is available, mkoffload fails early, + yielding UNRESOLVED for scan-offload-tree-dump and an XFAIL + for the message: + gcn mkoffload: fatal error: GCC was built without library support + for '-march=gfx...'; consider compiling for the associated + generic architecture '-march=gfx...-generic' instead + + * Or compling succeeds - then scan-offload-tree-dump will PASS - + but linking fails with the following error (XFAIL): + ld: error: unable to find library -lgomp + collect2: error: ld returned 1 exit status + gcn mkoffload: fatal error: ...-gnu-accel-amdgcn-amdhsa-gcc returned 1 exit status + compilation terminated. + lto-wrapper: fatal error: .../amdgcn-amdhsa/mkoffload returned 1 exit status + compilation terminated. */ diff --git a/libgomp/testsuite/libgomp.c/declare-variant-4-gfx1035.c b/libgomp/testsuite/libgomp.c/declare-variant-4-gfx1035.c new file mode 100644 index 0000000..a69d5e7 --- /dev/null +++ b/libgomp/testsuite/libgomp.c/declare-variant-4-gfx1035.c @@ -0,0 +1,33 @@ +/* { dg-do link { target { offload_target_amdgcn } } } */ +/* { dg-additional-options -foffload=amdgcn-amdhsa } */ +/* { dg-additional-options -foffload=-march=gfx1035 } */ +/* { dg-additional-options "-foffload=-fdump-tree-optimized" } */ + +#include "declare-variant-4.h" + +/* { dg-final { only_for_offload_target amdgcn-amdhsa scan-offload-tree-dump "= gfx1035 \\(\\);" "optimized" } } */ + + +/* This code will link nicely if the multilib for that GPU architecture + has been build for GCC. In that case, scan-offload-tree-dump will + PASS and the linking will yield an XPASS message due to following line: */ + +/* { dg-excess-errors "ld: error: unable to find library -lgomp|gcn mkoffload: fatal error" } */ + +/* If the multi-lib config is not available, there are two options: + + * If the generic multi-lib is available, mkoffload fails early, + yielding UNRESOLVED for scan-offload-tree-dump and an XFAIL + for the message: + gcn mkoffload: fatal error: GCC was built without library support + for '-march=gfx...'; consider compiling for the associated + generic architecture '-march=gfx...-generic' instead + + * Or compling succeeds - then scan-offload-tree-dump will PASS - + but linking fails with the following error (XFAIL): + ld: error: unable to find library -lgomp + collect2: error: ld returned 1 exit status + gcn mkoffload: fatal error: ...-gnu-accel-amdgcn-amdhsa-gcc returned 1 exit status + compilation terminated. + lto-wrapper: fatal error: .../amdgcn-amdhsa/mkoffload returned 1 exit status + compilation terminated. */ diff --git a/libgomp/testsuite/libgomp.c/declare-variant-4-gfx1036.c b/libgomp/testsuite/libgomp.c/declare-variant-4-gfx1036.c index 93b8641..8c258c4 100644 --- a/libgomp/testsuite/libgomp.c/declare-variant-4-gfx1036.c +++ b/libgomp/testsuite/libgomp.c/declare-variant-4-gfx1036.c @@ -6,3 +6,28 @@ #include "declare-variant-4.h" /* { dg-final { only_for_offload_target amdgcn-amdhsa scan-offload-tree-dump "= gfx1036 \\(\\);" "optimized" } } */ + + +/* This code will link nicely if the multilib for that GPU architecture + has been build for GCC. In that case, scan-offload-tree-dump will + PASS and the linking will yield an XPASS message due to following line: */ + +/* { dg-excess-errors "ld: error: unable to find library -lgomp|gcn mkoffload: fatal error" } */ + +/* If the multi-lib config is not available, there are two options: + + * If the generic multi-lib is available, mkoffload fails early, + yielding UNRESOLVED for scan-offload-tree-dump and an XFAIL + for the message: + gcn mkoffload: fatal error: GCC was built without library support + for '-march=gfx...'; consider compiling for the associated + generic architecture '-march=gfx...-generic' instead + + * Or compling succeeds - then scan-offload-tree-dump will PASS - + but linking fails with the following error (XFAIL): + ld: error: unable to find library -lgomp + collect2: error: ld returned 1 exit status + gcn mkoffload: fatal error: ...-gnu-accel-amdgcn-amdhsa-gcc returned 1 exit status + compilation terminated. + lto-wrapper: fatal error: .../amdgcn-amdhsa/mkoffload returned 1 exit status + compilation terminated. */ diff --git a/libgomp/testsuite/libgomp.c/declare-variant-4-gfx11-generic.c b/libgomp/testsuite/libgomp.c/declare-variant-4-gfx11-generic.c new file mode 100644 index 0000000..fa9efb4 --- /dev/null +++ b/libgomp/testsuite/libgomp.c/declare-variant-4-gfx11-generic.c @@ -0,0 +1,25 @@ +/* { dg-do link { target { offload_target_amdgcn } } } */ +/* { dg-additional-options -foffload=amdgcn-amdhsa } */ +/* { dg-additional-options -foffload=-march=gfx11-generic } */ +/* { dg-additional-options "-foffload=-fdump-tree-optimized" } */ + +#include "declare-variant-4.h" + +/* { dg-final { only_for_offload_target amdgcn-amdhsa scan-offload-tree-dump "= gfx11_generic \\(\\);" "optimized" } } */ + + +/* This code will link nicely if the multilib for that GPU architecture + has been build for GCC. In that case, scan-offload-tree-dump will + PASS and the linking will yield an XPASS message due to following line: */ + +/* { dg-excess-errors "ld: error: unable to find library -lgomp|gcn mkoffload: fatal error" } */ + +/* If the multi-lib config is not available (as this is a generic config), + scan-offload-tree-dump will PASS - but linking fails with the + following error (XFAIL): + ld: error: unable to find library -lgomp + collect2: error: ld returned 1 exit status + gcn mkoffload: fatal error: ...-gnu-accel-amdgcn-amdhsa-gcc returned 1 exit status + compilation terminated. + lto-wrapper: fatal error: .../amdgcn-amdhsa/mkoffload returned 1 exit status + compilation terminated. */ diff --git a/libgomp/testsuite/libgomp.c/declare-variant-4-gfx1100.c b/libgomp/testsuite/libgomp.c/declare-variant-4-gfx1100.c index 6ade352..f0b7c6d 100644 --- a/libgomp/testsuite/libgomp.c/declare-variant-4-gfx1100.c +++ b/libgomp/testsuite/libgomp.c/declare-variant-4-gfx1100.c @@ -6,3 +6,28 @@ #include "declare-variant-4.h" /* { dg-final { only_for_offload_target amdgcn-amdhsa scan-offload-tree-dump "= gfx1100 \\(\\);" "optimized" } } */ + + +/* This code will link nicely if the multilib for that GPU architecture + has been build for GCC. In that case, scan-offload-tree-dump will + PASS and the linking will yield an XPASS message due to following line: */ + +/* { dg-excess-errors "ld: error: unable to find library -lgomp|gcn mkoffload: fatal error" } */ + +/* If the multi-lib config is not available, there are two options: + + * If the generic multi-lib is available, mkoffload fails early, + yielding UNRESOLVED for scan-offload-tree-dump and an XFAIL + for the message: + gcn mkoffload: fatal error: GCC was built without library support + for '-march=gfx...'; consider compiling for the associated + generic architecture '-march=gfx...-generic' instead + + * Or compling succeeds - then scan-offload-tree-dump will PASS - + but linking fails with the following error (XFAIL): + ld: error: unable to find library -lgomp + collect2: error: ld returned 1 exit status + gcn mkoffload: fatal error: ...-gnu-accel-amdgcn-amdhsa-gcc returned 1 exit status + compilation terminated. + lto-wrapper: fatal error: .../amdgcn-amdhsa/mkoffload returned 1 exit status + compilation terminated. */ diff --git a/libgomp/testsuite/libgomp.c/declare-variant-4-gfx1101.c b/libgomp/testsuite/libgomp.c/declare-variant-4-gfx1101.c new file mode 100644 index 0000000..213e904 --- /dev/null +++ b/libgomp/testsuite/libgomp.c/declare-variant-4-gfx1101.c @@ -0,0 +1,33 @@ +/* { dg-do link { target { offload_target_amdgcn } } } */ +/* { dg-additional-options -foffload=amdgcn-amdhsa } */ +/* { dg-additional-options -foffload=-march=gfx1101 } */ +/* { dg-additional-options "-foffload=-fdump-tree-optimized" } */ + +#include "declare-variant-4.h" + +/* { dg-final { only_for_offload_target amdgcn-amdhsa scan-offload-tree-dump "= gfx1101 \\(\\);" "optimized" } } */ + + +/* This code will link nicely if the multilib for that GPU architecture + has been build for GCC. In that case, scan-offload-tree-dump will + PASS and the linking will yield an XPASS message due to following line: */ + +/* { dg-excess-errors "ld: error: unable to find library -lgomp|gcn mkoffload: fatal error" } */ + +/* If the multi-lib config is not available, there are two options: + + * If the generic multi-lib is available, mkoffload fails early, + yielding UNRESOLVED for scan-offload-tree-dump and an XFAIL + for the message: + gcn mkoffload: fatal error: GCC was built without library support + for '-march=gfx...'; consider compiling for the associated + generic architecture '-march=gfx...-generic' instead + + * Or compling succeeds - then scan-offload-tree-dump will PASS - + but linking fails with the following error (XFAIL): + ld: error: unable to find library -lgomp + collect2: error: ld returned 1 exit status + gcn mkoffload: fatal error: ...-gnu-accel-amdgcn-amdhsa-gcc returned 1 exit status + compilation terminated. + lto-wrapper: fatal error: .../amdgcn-amdhsa/mkoffload returned 1 exit status + compilation terminated. */ diff --git a/libgomp/testsuite/libgomp.c/declare-variant-4-gfx1102.c b/libgomp/testsuite/libgomp.c/declare-variant-4-gfx1102.c new file mode 100644 index 0000000..3f68dc8 --- /dev/null +++ b/libgomp/testsuite/libgomp.c/declare-variant-4-gfx1102.c @@ -0,0 +1,33 @@ +/* { dg-do link { target { offload_target_amdgcn } } } */ +/* { dg-additional-options -foffload=amdgcn-amdhsa } */ +/* { dg-additional-options -foffload=-march=gfx1102 } */ +/* { dg-additional-options "-foffload=-fdump-tree-optimized" } */ + +#include "declare-variant-4.h" + +/* { dg-final { only_for_offload_target amdgcn-amdhsa scan-offload-tree-dump "= gfx1102 \\(\\);" "optimized" } } */ + + +/* This code will link nicely if the multilib for that GPU architecture + has been build for GCC. In that case, scan-offload-tree-dump will + PASS and the linking will yield an XPASS message due to following line: */ + +/* { dg-excess-errors "ld: error: unable to find library -lgomp|gcn mkoffload: fatal error" } */ + +/* If the multi-lib config is not available, there are two options: + + * If the generic multi-lib is available, mkoffload fails early, + yielding UNRESOLVED for scan-offload-tree-dump and an XFAIL + for the message: + gcn mkoffload: fatal error: GCC was built without library support + for '-march=gfx...'; consider compiling for the associated + generic architecture '-march=gfx...-generic' instead + + * Or compling succeeds - then scan-offload-tree-dump will PASS - + but linking fails with the following error (XFAIL): + ld: error: unable to find library -lgomp + collect2: error: ld returned 1 exit status + gcn mkoffload: fatal error: ...-gnu-accel-amdgcn-amdhsa-gcc returned 1 exit status + compilation terminated. + lto-wrapper: fatal error: .../amdgcn-amdhsa/mkoffload returned 1 exit status + compilation terminated. */ diff --git a/libgomp/testsuite/libgomp.c/declare-variant-4-gfx1103.c b/libgomp/testsuite/libgomp.c/declare-variant-4-gfx1103.c index 6a6dc4f..c1eed44 100644 --- a/libgomp/testsuite/libgomp.c/declare-variant-4-gfx1103.c +++ b/libgomp/testsuite/libgomp.c/declare-variant-4-gfx1103.c @@ -6,3 +6,28 @@ #include "declare-variant-4.h" /* { dg-final { only_for_offload_target amdgcn-amdhsa scan-offload-tree-dump "= gfx1103 \\(\\);" "optimized" } } */ + + +/* This code will link nicely if the multilib for that GPU architecture + has been build for GCC. In that case, scan-offload-tree-dump will + PASS and the linking will yield an XPASS message due to following line: */ + +/* { dg-excess-errors "ld: error: unable to find library -lgomp|gcn mkoffload: fatal error" } */ + +/* If the multi-lib config is not available, there are two options: + + * If the generic multi-lib is available, mkoffload fails early, + yielding UNRESOLVED for scan-offload-tree-dump and an XFAIL + for the message: + gcn mkoffload: fatal error: GCC was built without library support + for '-march=gfx...'; consider compiling for the associated + generic architecture '-march=gfx...-generic' instead + + * Or compling succeeds - then scan-offload-tree-dump will PASS - + but linking fails with the following error (XFAIL): + ld: error: unable to find library -lgomp + collect2: error: ld returned 1 exit status + gcn mkoffload: fatal error: ...-gnu-accel-amdgcn-amdhsa-gcc returned 1 exit status + compilation terminated. + lto-wrapper: fatal error: .../amdgcn-amdhsa/mkoffload returned 1 exit status + compilation terminated. */ diff --git a/libgomp/testsuite/libgomp.c/declare-variant-4-gfx1150.c b/libgomp/testsuite/libgomp.c/declare-variant-4-gfx1150.c new file mode 100644 index 0000000..39d64ca --- /dev/null +++ b/libgomp/testsuite/libgomp.c/declare-variant-4-gfx1150.c @@ -0,0 +1,33 @@ +/* { dg-do link { target { offload_target_amdgcn } } } */ +/* { dg-additional-options -foffload=amdgcn-amdhsa } */ +/* { dg-additional-options -foffload=-march=gfx1150 } */ +/* { dg-additional-options "-foffload=-fdump-tree-optimized" } */ + +#include "declare-variant-4.h" + +/* { dg-final { only_for_offload_target amdgcn-amdhsa scan-offload-tree-dump "= gfx1150 \\(\\);" "optimized" } } */ + + +/* This code will link nicely if the multilib for that GPU architecture + has been build for GCC. In that case, scan-offload-tree-dump will + PASS and the linking will yield an XPASS message due to following line: */ + +/* { dg-excess-errors "ld: error: unable to find library -lgomp|gcn mkoffload: fatal error" } */ + +/* If the multi-lib config is not available, there are two options: + + * If the generic multi-lib is available, mkoffload fails early, + yielding UNRESOLVED for scan-offload-tree-dump and an XFAIL + for the message: + gcn mkoffload: fatal error: GCC was built without library support + for '-march=gfx...'; consider compiling for the associated + generic architecture '-march=gfx...-generic' instead + + * Or compling succeeds - then scan-offload-tree-dump will PASS - + but linking fails with the following error (XFAIL): + ld: error: unable to find library -lgomp + collect2: error: ld returned 1 exit status + gcn mkoffload: fatal error: ...-gnu-accel-amdgcn-amdhsa-gcc returned 1 exit status + compilation terminated. + lto-wrapper: fatal error: .../amdgcn-amdhsa/mkoffload returned 1 exit status + compilation terminated. */ diff --git a/libgomp/testsuite/libgomp.c/declare-variant-4-gfx1151.c b/libgomp/testsuite/libgomp.c/declare-variant-4-gfx1151.c new file mode 100644 index 0000000..2a0c732 --- /dev/null +++ b/libgomp/testsuite/libgomp.c/declare-variant-4-gfx1151.c @@ -0,0 +1,33 @@ +/* { dg-do link { target { offload_target_amdgcn } } } */ +/* { dg-additional-options -foffload=amdgcn-amdhsa } */ +/* { dg-additional-options -foffload=-march=gfx1151 } */ +/* { dg-additional-options "-foffload=-fdump-tree-optimized" } */ + +#include "declare-variant-4.h" + +/* { dg-final { only_for_offload_target amdgcn-amdhsa scan-offload-tree-dump "= gfx1151 \\(\\);" "optimized" } } */ + + +/* This code will link nicely if the multilib for that GPU architecture + has been build for GCC. In that case, scan-offload-tree-dump will + PASS and the linking will yield an XPASS message due to following line: */ + +/* { dg-excess-errors "ld: error: unable to find library -lgomp|gcn mkoffload: fatal error" } */ + +/* If the multi-lib config is not available, there are two options: + + * If the generic multi-lib is available, mkoffload fails early, + yielding UNRESOLVED for scan-offload-tree-dump and an XFAIL + for the message: + gcn mkoffload: fatal error: GCC was built without library support + for '-march=gfx...'; consider compiling for the associated + generic architecture '-march=gfx...-generic' instead + + * Or compling succeeds - then scan-offload-tree-dump will PASS - + but linking fails with the following error (XFAIL): + ld: error: unable to find library -lgomp + collect2: error: ld returned 1 exit status + gcn mkoffload: fatal error: ...-gnu-accel-amdgcn-amdhsa-gcc returned 1 exit status + compilation terminated. + lto-wrapper: fatal error: .../amdgcn-amdhsa/mkoffload returned 1 exit status + compilation terminated. */ diff --git a/libgomp/testsuite/libgomp.c/declare-variant-4-gfx1152.c b/libgomp/testsuite/libgomp.c/declare-variant-4-gfx1152.c new file mode 100644 index 0000000..3c987dd --- /dev/null +++ b/libgomp/testsuite/libgomp.c/declare-variant-4-gfx1152.c @@ -0,0 +1,33 @@ +/* { dg-do link { target { offload_target_amdgcn } } } */ +/* { dg-additional-options -foffload=amdgcn-amdhsa } */ +/* { dg-additional-options -foffload=-march=gfx1152 } */ +/* { dg-additional-options "-foffload=-fdump-tree-optimized" } */ + +#include "declare-variant-4.h" + +/* { dg-final { only_for_offload_target amdgcn-amdhsa scan-offload-tree-dump "= gfx1152 \\(\\);" "optimized" } } */ + + +/* This code will link nicely if the multilib for that GPU architecture + has been build for GCC. In that case, scan-offload-tree-dump will + PASS and the linking will yield an XPASS message due to following line: */ + +/* { dg-excess-errors "ld: error: unable to find library -lgomp|gcn mkoffload: fatal error" } */ + +/* If the multi-lib config is not available, there are two options: + + * If the generic multi-lib is available, mkoffload fails early, + yielding UNRESOLVED for scan-offload-tree-dump and an XFAIL + for the message: + gcn mkoffload: fatal error: GCC was built without library support + for '-march=gfx...'; consider compiling for the associated + generic architecture '-march=gfx...-generic' instead + + * Or compling succeeds - then scan-offload-tree-dump will PASS - + but linking fails with the following error (XFAIL): + ld: error: unable to find library -lgomp + collect2: error: ld returned 1 exit status + gcn mkoffload: fatal error: ...-gnu-accel-amdgcn-amdhsa-gcc returned 1 exit status + compilation terminated. + lto-wrapper: fatal error: .../amdgcn-amdhsa/mkoffload returned 1 exit status + compilation terminated. */ diff --git a/libgomp/testsuite/libgomp.c/declare-variant-4-gfx1153.c b/libgomp/testsuite/libgomp.c/declare-variant-4-gfx1153.c new file mode 100644 index 0000000..7d38b82 --- /dev/null +++ b/libgomp/testsuite/libgomp.c/declare-variant-4-gfx1153.c @@ -0,0 +1,33 @@ +/* { dg-do link { target { offload_target_amdgcn } } } */ +/* { dg-additional-options -foffload=amdgcn-amdhsa } */ +/* { dg-additional-options -foffload=-march=gfx1153 } */ +/* { dg-additional-options "-foffload=-fdump-tree-optimized" } */ + +#include "declare-variant-4.h" + +/* { dg-final { only_for_offload_target amdgcn-amdhsa scan-offload-tree-dump "= gfx1153 \\(\\);" "optimized" } } */ + + +/* This code will link nicely if the multilib for that GPU architecture + has been build for GCC. In that case, scan-offload-tree-dump will + PASS and the linking will yield an XPASS message due to following line: */ + +/* { dg-excess-errors "ld: error: unable to find library -lgomp|gcn mkoffload: fatal error" } */ + +/* If the multi-lib config is not available, there are two options: + + * If the generic multi-lib is available, mkoffload fails early, + yielding UNRESOLVED for scan-offload-tree-dump and an XFAIL + for the message: + gcn mkoffload: fatal error: GCC was built without library support + for '-march=gfx...'; consider compiling for the associated + generic architecture '-march=gfx...-generic' instead + + * Or compling succeeds - then scan-offload-tree-dump will PASS - + but linking fails with the following error (XFAIL): + ld: error: unable to find library -lgomp + collect2: error: ld returned 1 exit status + gcn mkoffload: fatal error: ...-gnu-accel-amdgcn-amdhsa-gcc returned 1 exit status + compilation terminated. + lto-wrapper: fatal error: .../amdgcn-amdhsa/mkoffload returned 1 exit status + compilation terminated. */ diff --git a/libgomp/testsuite/libgomp.c/declare-variant-4-gfx9-4-generic.c b/libgomp/testsuite/libgomp.c/declare-variant-4-gfx9-4-generic.c new file mode 100644 index 0000000..07d1254 --- /dev/null +++ b/libgomp/testsuite/libgomp.c/declare-variant-4-gfx9-4-generic.c @@ -0,0 +1,25 @@ +/* { dg-do link { target { offload_target_amdgcn } } } */ +/* { dg-additional-options -foffload=amdgcn-amdhsa } */ +/* { dg-additional-options -foffload=-march=gfx9-4-generic } */ +/* { dg-additional-options "-foffload=-fdump-tree-optimized" } */ + +#include "declare-variant-4.h" + +/* { dg-final { only_for_offload_target amdgcn-amdhsa scan-offload-tree-dump "= gfx9_4_generic \\(\\);" "optimized" } } */ + + +/* This code will link nicely if the multilib for that GPU architecture + has been build for GCC. In that case, scan-offload-tree-dump will + PASS and the linking will yield an XPASS message due to following line: */ + +/* { dg-excess-errors "ld: error: unable to find library -lgomp|gcn mkoffload: fatal error" } */ + +/* If the multi-lib config is not available (as this is a generic config), + scan-offload-tree-dump will PASS - but linking fails with the + following error (XFAIL): + ld: error: unable to find library -lgomp + collect2: error: ld returned 1 exit status + gcn mkoffload: fatal error: ...-gnu-accel-amdgcn-amdhsa-gcc returned 1 exit status + compilation terminated. + lto-wrapper: fatal error: .../amdgcn-amdhsa/mkoffload returned 1 exit status + compilation terminated. */ diff --git a/libgomp/testsuite/libgomp.c/declare-variant-4-gfx9-generic.c b/libgomp/testsuite/libgomp.c/declare-variant-4-gfx9-generic.c new file mode 100644 index 0000000..d6ba097 --- /dev/null +++ b/libgomp/testsuite/libgomp.c/declare-variant-4-gfx9-generic.c @@ -0,0 +1,25 @@ +/* { dg-do link { target { offload_target_amdgcn } } } */ +/* { dg-additional-options -foffload=amdgcn-amdhsa } */ +/* { dg-additional-options -foffload=-march=gfx9-generic } */ +/* { dg-additional-options "-foffload=-fdump-tree-optimized" } */ + +#include "declare-variant-4.h" + +/* { dg-final { only_for_offload_target amdgcn-amdhsa scan-offload-tree-dump "= gfx9_generic \\(\\);" "optimized" } } */ + + +/* This code will link nicely if the multilib for that GPU architecture + has been build for GCC. In that case, scan-offload-tree-dump will + PASS and the linking will yield an XPASS message due to following line: */ + +/* { dg-excess-errors "ld: error: unable to find library -lgomp|gcn mkoffload: fatal error" } */ + +/* If the multi-lib config is not available (as this is a generic config), + scan-offload-tree-dump will PASS - but linking fails with the + following error (XFAIL): + ld: error: unable to find library -lgomp + collect2: error: ld returned 1 exit status + gcn mkoffload: fatal error: ...-gnu-accel-amdgcn-amdhsa-gcc returned 1 exit status + compilation terminated. + lto-wrapper: fatal error: .../amdgcn-amdhsa/mkoffload returned 1 exit status + compilation terminated. */ diff --git a/libgomp/testsuite/libgomp.c/declare-variant-4-gfx900.c b/libgomp/testsuite/libgomp.c/declare-variant-4-gfx900.c index f3f5244..37005fc 100644 --- a/libgomp/testsuite/libgomp.c/declare-variant-4-gfx900.c +++ b/libgomp/testsuite/libgomp.c/declare-variant-4-gfx900.c @@ -6,3 +6,28 @@ #include "declare-variant-4.h" /* { dg-final { only_for_offload_target amdgcn-amdhsa scan-offload-tree-dump "= gfx900 \\(\\);" "optimized" } } */ + + +/* This code will link nicely if the multilib for that GPU architecture + has been build for GCC. In that case, scan-offload-tree-dump will + PASS and the linking will yield an XPASS message due to following line: */ + +/* { dg-excess-errors "ld: error: unable to find library -lgomp|gcn mkoffload: fatal error" } */ + +/* If the multi-lib config is not available, there are two options: + + * If the generic multi-lib is available, mkoffload fails early, + yielding UNRESOLVED for scan-offload-tree-dump and an XFAIL + for the message: + gcn mkoffload: fatal error: GCC was built without library support + for '-march=gfx...'; consider compiling for the associated + generic architecture '-march=gfx...-generic' instead + + * Or compling succeeds - then scan-offload-tree-dump will PASS - + but linking fails with the following error (XFAIL): + ld: error: unable to find library -lgomp + collect2: error: ld returned 1 exit status + gcn mkoffload: fatal error: ...-gnu-accel-amdgcn-amdhsa-gcc returned 1 exit status + compilation terminated. + lto-wrapper: fatal error: .../amdgcn-amdhsa/mkoffload returned 1 exit status + compilation terminated. */ diff --git a/libgomp/testsuite/libgomp.c/declare-variant-4-gfx902.c b/libgomp/testsuite/libgomp.c/declare-variant-4-gfx902.c new file mode 100644 index 0000000..82981c5 --- /dev/null +++ b/libgomp/testsuite/libgomp.c/declare-variant-4-gfx902.c @@ -0,0 +1,33 @@ +/* { dg-do link { target { offload_target_amdgcn } } } */ +/* { dg-additional-options -foffload=amdgcn-amdhsa } */ +/* { dg-additional-options -foffload=-march=gfx902 } */ +/* { dg-additional-options "-foffload=-fdump-tree-optimized" } */ + +#include "declare-variant-4.h" + +/* { dg-final { only_for_offload_target amdgcn-amdhsa scan-offload-tree-dump "= gfx902 \\(\\);" "optimized" } } */ + + +/* This code will link nicely if the multilib for that GPU architecture + has been build for GCC. In that case, scan-offload-tree-dump will + PASS and the linking will yield an XPASS message due to following line: */ + +/* { dg-excess-errors "ld: error: unable to find library -lgomp|gcn mkoffload: fatal error" } */ + +/* If the multi-lib config is not available, there are two options: + + * If the generic multi-lib is available, mkoffload fails early, + yielding UNRESOLVED for scan-offload-tree-dump and an XFAIL + for the message: + gcn mkoffload: fatal error: GCC was built without library support + for '-march=gfx...'; consider compiling for the associated + generic architecture '-march=gfx...-generic' instead + + * Or compling succeeds - then scan-offload-tree-dump will PASS - + but linking fails with the following error (XFAIL): + ld: error: unable to find library -lgomp + collect2: error: ld returned 1 exit status + gcn mkoffload: fatal error: ...-gnu-accel-amdgcn-amdhsa-gcc returned 1 exit status + compilation terminated. + lto-wrapper: fatal error: .../amdgcn-amdhsa/mkoffload returned 1 exit status + compilation terminated. */ diff --git a/libgomp/testsuite/libgomp.c/declare-variant-4-gfx904.c b/libgomp/testsuite/libgomp.c/declare-variant-4-gfx904.c new file mode 100644 index 0000000..89815fe --- /dev/null +++ b/libgomp/testsuite/libgomp.c/declare-variant-4-gfx904.c @@ -0,0 +1,33 @@ +/* { dg-do link { target { offload_target_amdgcn } } } */ +/* { dg-additional-options -foffload=amdgcn-amdhsa } */ +/* { dg-additional-options -foffload=-march=gfx904 } */ +/* { dg-additional-options "-foffload=-fdump-tree-optimized" } */ + +#include "declare-variant-4.h" + +/* { dg-final { only_for_offload_target amdgcn-amdhsa scan-offload-tree-dump "= gfx904 \\(\\);" "optimized" } } */ + + +/* This code will link nicely if the multilib for that GPU architecture + has been build for GCC. In that case, scan-offload-tree-dump will + PASS and the linking will yield an XPASS message due to following line: */ + +/* { dg-excess-errors "ld: error: unable to find library -lgomp|gcn mkoffload: fatal error" } */ + +/* If the multi-lib config is not available, there are two options: + + * If the generic multi-lib is available, mkoffload fails early, + yielding UNRESOLVED for scan-offload-tree-dump and an XFAIL + for the message: + gcn mkoffload: fatal error: GCC was built without library support + for '-march=gfx...'; consider compiling for the associated + generic architecture '-march=gfx...-generic' instead + + * Or compling succeeds - then scan-offload-tree-dump will PASS - + but linking fails with the following error (XFAIL): + ld: error: unable to find library -lgomp + collect2: error: ld returned 1 exit status + gcn mkoffload: fatal error: ...-gnu-accel-amdgcn-amdhsa-gcc returned 1 exit status + compilation terminated. + lto-wrapper: fatal error: .../amdgcn-amdhsa/mkoffload returned 1 exit status + compilation terminated. */ diff --git a/libgomp/testsuite/libgomp.c/declare-variant-4-gfx906.c b/libgomp/testsuite/libgomp.c/declare-variant-4-gfx906.c index ac43388..aeef690 100644 --- a/libgomp/testsuite/libgomp.c/declare-variant-4-gfx906.c +++ b/libgomp/testsuite/libgomp.c/declare-variant-4-gfx906.c @@ -6,3 +6,28 @@ #include "declare-variant-4.h" /* { dg-final { only_for_offload_target amdgcn-amdhsa scan-offload-tree-dump "= gfx906 \\(\\);" "optimized" } } */ + + +/* This code will link nicely if the multilib for that GPU architecture + has been build for GCC. In that case, scan-offload-tree-dump will + PASS and the linking will yield an XPASS message due to following line: */ + +/* { dg-excess-errors "ld: error: unable to find library -lgomp|gcn mkoffload: fatal error" } */ + +/* If the multi-lib config is not available, there are two options: + + * If the generic multi-lib is available, mkoffload fails early, + yielding UNRESOLVED for scan-offload-tree-dump and an XFAIL + for the message: + gcn mkoffload: fatal error: GCC was built without library support + for '-march=gfx...'; consider compiling for the associated + generic architecture '-march=gfx...-generic' instead + + * Or compling succeeds - then scan-offload-tree-dump will PASS - + but linking fails with the following error (XFAIL): + ld: error: unable to find library -lgomp + collect2: error: ld returned 1 exit status + gcn mkoffload: fatal error: ...-gnu-accel-amdgcn-amdhsa-gcc returned 1 exit status + compilation terminated. + lto-wrapper: fatal error: .../amdgcn-amdhsa/mkoffload returned 1 exit status + compilation terminated. */ diff --git a/libgomp/testsuite/libgomp.c/declare-variant-4-gfx908.c b/libgomp/testsuite/libgomp.c/declare-variant-4-gfx908.c index f60741f..799b546 100644 --- a/libgomp/testsuite/libgomp.c/declare-variant-4-gfx908.c +++ b/libgomp/testsuite/libgomp.c/declare-variant-4-gfx908.c @@ -6,3 +6,28 @@ #include "declare-variant-4.h" /* { dg-final { only_for_offload_target amdgcn-amdhsa scan-offload-tree-dump "= gfx908 \\(\\);" "optimized" } } */ + + +/* This code will link nicely if the multilib for that GPU architecture + has been build for GCC. In that case, scan-offload-tree-dump will + PASS and the linking will yield an XPASS message due to following line: */ + +/* { dg-excess-errors "ld: error: unable to find library -lgomp|gcn mkoffload: fatal error" } */ + +/* If the multi-lib config is not available, there are two options: + + * If the generic multi-lib is available, mkoffload fails early, + yielding UNRESOLVED for scan-offload-tree-dump and an XFAIL + for the message: + gcn mkoffload: fatal error: GCC was built without library support + for '-march=gfx...'; consider compiling for the associated + generic architecture '-march=gfx...-generic' instead + + * Or compling succeeds - then scan-offload-tree-dump will PASS - + but linking fails with the following error (XFAIL): + ld: error: unable to find library -lgomp + collect2: error: ld returned 1 exit status + gcn mkoffload: fatal error: ...-gnu-accel-amdgcn-amdhsa-gcc returned 1 exit status + compilation terminated. + lto-wrapper: fatal error: .../amdgcn-amdhsa/mkoffload returned 1 exit status + compilation terminated. */ diff --git a/libgomp/testsuite/libgomp.c/declare-variant-4-gfx909.c b/libgomp/testsuite/libgomp.c/declare-variant-4-gfx909.c new file mode 100644 index 0000000..e8a6f63 --- /dev/null +++ b/libgomp/testsuite/libgomp.c/declare-variant-4-gfx909.c @@ -0,0 +1,33 @@ +/* { dg-do link { target { offload_target_amdgcn } } } */ +/* { dg-additional-options -foffload=amdgcn-amdhsa } */ +/* { dg-additional-options -foffload=-march=gfx909 } */ +/* { dg-additional-options "-foffload=-fdump-tree-optimized" } */ + +#include "declare-variant-4.h" + +/* { dg-final { only_for_offload_target amdgcn-amdhsa scan-offload-tree-dump "= gfx909 \\(\\);" "optimized" } } */ + + +/* This code will link nicely if the multilib for that GPU architecture + has been build for GCC. In that case, scan-offload-tree-dump will + PASS and the linking will yield an XPASS message due to following line: */ + +/* { dg-excess-errors "ld: error: unable to find library -lgomp|gcn mkoffload: fatal error" } */ + +/* If the multi-lib config is not available, there are two options: + + * If the generic multi-lib is available, mkoffload fails early, + yielding UNRESOLVED for scan-offload-tree-dump and an XFAIL + for the message: + gcn mkoffload: fatal error: GCC was built without library support + for '-march=gfx...'; consider compiling for the associated + generic architecture '-march=gfx...-generic' instead + + * Or compling succeeds - then scan-offload-tree-dump will PASS - + but linking fails with the following error (XFAIL): + ld: error: unable to find library -lgomp + collect2: error: ld returned 1 exit status + gcn mkoffload: fatal error: ...-gnu-accel-amdgcn-amdhsa-gcc returned 1 exit status + compilation terminated. + lto-wrapper: fatal error: .../amdgcn-amdhsa/mkoffload returned 1 exit status + compilation terminated. */ diff --git a/libgomp/testsuite/libgomp.c/declare-variant-4-gfx90a.c b/libgomp/testsuite/libgomp.c/declare-variant-4-gfx90a.c index 832d174..de5626e 100644 --- a/libgomp/testsuite/libgomp.c/declare-variant-4-gfx90a.c +++ b/libgomp/testsuite/libgomp.c/declare-variant-4-gfx90a.c @@ -6,3 +6,28 @@ #include "declare-variant-4.h" /* { dg-final { only_for_offload_target amdgcn-amdhsa scan-offload-tree-dump "= gfx90a \\(\\);" "optimized" } } */ + + +/* This code will link nicely if the multilib for that GPU architecture + has been build for GCC. In that case, scan-offload-tree-dump will + PASS and the linking will yield an XPASS message due to following line: */ + +/* { dg-excess-errors "ld: error: unable to find library -lgomp|gcn mkoffload: fatal error" } */ + +/* If the multi-lib config is not available, there are two options: + + * If the generic multi-lib is available, mkoffload fails early, + yielding UNRESOLVED for scan-offload-tree-dump and an XFAIL + for the message: + gcn mkoffload: fatal error: GCC was built without library support + for '-march=gfx...'; consider compiling for the associated + generic architecture '-march=gfx...-generic' instead + + * Or compling succeeds - then scan-offload-tree-dump will PASS - + but linking fails with the following error (XFAIL): + ld: error: unable to find library -lgomp + collect2: error: ld returned 1 exit status + gcn mkoffload: fatal error: ...-gnu-accel-amdgcn-amdhsa-gcc returned 1 exit status + compilation terminated. + lto-wrapper: fatal error: .../amdgcn-amdhsa/mkoffload returned 1 exit status + compilation terminated. */ diff --git a/libgomp/testsuite/libgomp.c/declare-variant-4-gfx90c.c b/libgomp/testsuite/libgomp.c/declare-variant-4-gfx90c.c index 44629a8..dfad7ec 100644 --- a/libgomp/testsuite/libgomp.c/declare-variant-4-gfx90c.c +++ b/libgomp/testsuite/libgomp.c/declare-variant-4-gfx90c.c @@ -6,3 +6,28 @@ #include "declare-variant-4.h" /* { dg-final { only_for_offload_target amdgcn-amdhsa scan-offload-tree-dump "= gfx90c \\(\\);" "optimized" } } */ + + +/* This code will link nicely if the multilib for that GPU architecture + has been build for GCC. In that case, scan-offload-tree-dump will + PASS and the linking will yield an XPASS message due to following line: */ + +/* { dg-excess-errors "ld: error: unable to find library -lgomp|gcn mkoffload: fatal error" } */ + +/* If the multi-lib config is not available, there are two options: + + * If the generic multi-lib is available, mkoffload fails early, + yielding UNRESOLVED for scan-offload-tree-dump and an XFAIL + for the message: + gcn mkoffload: fatal error: GCC was built without library support + for '-march=gfx...'; consider compiling for the associated + generic architecture '-march=gfx...-generic' instead + + * Or compling succeeds - then scan-offload-tree-dump will PASS - + but linking fails with the following error (XFAIL): + ld: error: unable to find library -lgomp + collect2: error: ld returned 1 exit status + gcn mkoffload: fatal error: ...-gnu-accel-amdgcn-amdhsa-gcc returned 1 exit status + compilation terminated. + lto-wrapper: fatal error: .../amdgcn-amdhsa/mkoffload returned 1 exit status + compilation terminated. */ diff --git a/libgomp/testsuite/libgomp.c/declare-variant-4-gfx942.c b/libgomp/testsuite/libgomp.c/declare-variant-4-gfx942.c index d1df550..c8c7446 100644 --- a/libgomp/testsuite/libgomp.c/declare-variant-4-gfx942.c +++ b/libgomp/testsuite/libgomp.c/declare-variant-4-gfx942.c @@ -6,3 +6,28 @@ #include "declare-variant-4.h" /* { dg-final { only_for_offload_target amdgcn-amdhsa scan-offload-tree-dump "= gfx942 \\(\\);" "optimized" } } */ + + +/* This code will link nicely if the multilib for that GPU architecture + has been build for GCC. In that case, scan-offload-tree-dump will + PASS and the linking will yield an XPASS message due to following line: */ + +/* { dg-excess-errors "ld: error: unable to find library -lgomp|gcn mkoffload: fatal error" } */ + +/* If the multi-lib config is not available, there are two options: + + * If the generic multi-lib is available, mkoffload fails early, + yielding UNRESOLVED for scan-offload-tree-dump and an XFAIL + for the message: + gcn mkoffload: fatal error: GCC was built without library support + for '-march=gfx...'; consider compiling for the associated + generic architecture '-march=gfx...-generic' instead + + * Or compling succeeds - then scan-offload-tree-dump will PASS - + but linking fails with the following error (XFAIL): + ld: error: unable to find library -lgomp + collect2: error: ld returned 1 exit status + gcn mkoffload: fatal error: ...-gnu-accel-amdgcn-amdhsa-gcc returned 1 exit status + compilation terminated. + lto-wrapper: fatal error: .../amdgcn-amdhsa/mkoffload returned 1 exit status + compilation terminated. */ diff --git a/libgomp/testsuite/libgomp.c/declare-variant-4-gfx950.c b/libgomp/testsuite/libgomp.c/declare-variant-4-gfx950.c new file mode 100644 index 0000000..af81f11 --- /dev/null +++ b/libgomp/testsuite/libgomp.c/declare-variant-4-gfx950.c @@ -0,0 +1,33 @@ +/* { dg-do link { target { offload_target_amdgcn } } } */ +/* { dg-additional-options -foffload=amdgcn-amdhsa } */ +/* { dg-additional-options -foffload=-march=gfx950 } */ +/* { dg-additional-options "-foffload=-fdump-tree-optimized" } */ + +#include "declare-variant-4.h" + +/* { dg-final { only_for_offload_target amdgcn-amdhsa scan-offload-tree-dump "= gfx950 \\(\\);" "optimized" } } */ + + +/* This code will link nicely if the multilib for that GPU architecture + has been build for GCC. In that case, scan-offload-tree-dump will + PASS and the linking will yield an XPASS message due to following line: */ + +/* { dg-excess-errors "ld: error: unable to find library -lgomp|gcn mkoffload: fatal error" } */ + +/* If the multi-lib config is not available, there are two options: + + * If the generic multi-lib is available, mkoffload fails early, + yielding UNRESOLVED for scan-offload-tree-dump and an XFAIL + for the message: + gcn mkoffload: fatal error: GCC was built without library support + for '-march=gfx...'; consider compiling for the associated + generic architecture '-march=gfx...-generic' instead + + * Or compling succeeds - then scan-offload-tree-dump will PASS - + but linking fails with the following error (XFAIL): + ld: error: unable to find library -lgomp + collect2: error: ld returned 1 exit status + gcn mkoffload: fatal error: ...-gnu-accel-amdgcn-amdhsa-gcc returned 1 exit status + compilation terminated. + lto-wrapper: fatal error: .../amdgcn-amdhsa/mkoffload returned 1 exit status + compilation terminated. */ diff --git a/libgomp/testsuite/libgomp.c/declare-variant-4.h b/libgomp/testsuite/libgomp.c/declare-variant-4.h index 2257f4c..dd97edb 100644 --- a/libgomp/testsuite/libgomp.c/declare-variant-4.h +++ b/libgomp/testsuite/libgomp.c/declare-variant-4.h @@ -9,6 +9,20 @@ gfx900 (void) __attribute__ ((noipa)) int +gfx902 (void) +{ + return 0x902; +} + +__attribute__ ((noipa)) +int +gfx904 (void) +{ + return 0x904; +} + +__attribute__ ((noipa)) +int gfx906 (void) { return 0x906; @@ -23,6 +37,13 @@ gfx908 (void) __attribute__ ((noipa)) int +gfx909 (void) +{ + return 0x909; +} + +__attribute__ ((noipa)) +int gfx90a (void) { return 0x90a; @@ -44,6 +65,13 @@ gfx942 (void) __attribute__ ((noipa)) int +gfx950 (void) +{ + return 0x950; +} + +__attribute__ ((noipa)) +int gfx1030 (void) { return 0x1030; @@ -51,6 +79,41 @@ gfx1030 (void) __attribute__ ((noipa)) int +gfx1031 (void) +{ + return 0x1031; +} + +__attribute__ ((noipa)) +int +gfx1032 (void) +{ + return 0x1032; +} + +__attribute__ ((noipa)) +int +gfx1033 (void) +{ + return 0x1033; +} + +__attribute__ ((noipa)) +int +gfx1034 (void) +{ + return 0x1034; +} + +__attribute__ ((noipa)) +int +gfx1035 (void) +{ + return 0x1035; +} + +__attribute__ ((noipa)) +int gfx1036 (void) { return 0x1036; @@ -65,21 +128,111 @@ gfx1100 (void) __attribute__ ((noipa)) int +gfx1101 (void) +{ + return 0x1101; +} + +__attribute__ ((noipa)) +int +gfx1102 (void) +{ + return 0x1102; +} + +__attribute__ ((noipa)) +int gfx1103 (void) { return 0x1103; } +__attribute__ ((noipa)) +int +gfx1150 (void) +{ + return 0x1150; +} + +__attribute__ ((noipa)) +int +gfx1151 (void) +{ + return 0x1151; +} + +__attribute__ ((noipa)) +int +gfx1152 (void) +{ + return 0x1152; +} + +__attribute__ ((noipa)) +int +gfx1153 (void) +{ + return 0x1153; +} + +__attribute__ ((noipa)) +int +gfx9_generic (void) +{ + return 0x90ff; +} + +__attribute__ ((noipa)) +int +gfx9_4_generic (void) +{ + return 0x94ff; +} + +__attribute__ ((noipa)) +int +gfx10_3_generic (void) +{ + return 0x103ff; +} + +__attribute__ ((noipa)) +int +gfx11_generic (void) +{ + return 0x110ff; +} + + #pragma omp declare variant(gfx900) match(device = {isa("gfx900")}) +#pragma omp declare variant(gfx902) match(device = {isa("gfx902")}) +#pragma omp declare variant(gfx904) match(device = {isa("gfx904")}) #pragma omp declare variant(gfx906) match(device = {isa("gfx906")}) #pragma omp declare variant(gfx908) match(device = {isa("gfx908")}) +#pragma omp declare variant(gfx909) match(device = {isa("gfx909")}) #pragma omp declare variant(gfx90a) match(device = {isa("gfx90a")}) #pragma omp declare variant(gfx90c) match(device = {isa("gfx90c")}) #pragma omp declare variant(gfx942) match(device = {isa("gfx942")}) +#pragma omp declare variant(gfx950) match(device = {isa("gfx950")}) #pragma omp declare variant(gfx1030) match(device = {isa("gfx1030")}) +#pragma omp declare variant(gfx1031) match(device = {isa("gfx1031")}) +#pragma omp declare variant(gfx1032) match(device = {isa("gfx1032")}) +#pragma omp declare variant(gfx1033) match(device = {isa("gfx1033")}) +#pragma omp declare variant(gfx1034) match(device = {isa("gfx1034")}) +#pragma omp declare variant(gfx1035) match(device = {isa("gfx1035")}) #pragma omp declare variant(gfx1036) match(device = {isa("gfx1036")}) #pragma omp declare variant(gfx1100) match(device = {isa("gfx1100")}) +#pragma omp declare variant(gfx1101) match(device = {isa("gfx1101")}) +#pragma omp declare variant(gfx1102) match(device = {isa("gfx1102")}) #pragma omp declare variant(gfx1103) match(device = {isa("gfx1103")}) +#pragma omp declare variant(gfx1150) match(device = {isa("gfx1150")}) +#pragma omp declare variant(gfx1151) match(device = {isa("gfx1151")}) +#pragma omp declare variant(gfx1152) match(device = {isa("gfx1152")}) +#pragma omp declare variant(gfx1153) match(device = {isa("gfx1153")}) +#pragma omp declare variant(gfx9_generic) match(device = {isa("gfx9-generic")}) +#pragma omp declare variant(gfx9_4_generic) match(device = {isa("gfx9-4-generic")}) +#pragma omp declare variant(gfx10_3_generic) match(device = {isa("gfx10-3-generic")}) +#pragma omp declare variant(gfx11_generic) match(device = {isa("gfx11-generic")}) __attribute__ ((noipa)) int f (void) diff --git a/libstdc++-v3/ChangeLog b/libstdc++-v3/ChangeLog index c216147..0449198 100644 --- a/libstdc++-v3/ChangeLog +++ b/libstdc++-v3/ChangeLog @@ -1,3 +1,33 @@ +2025-10-15 Jonathan Wakely <jwakely@redhat.com> + + * python/libstdcxx/v6/printers.py (StdStacktraceEntryPrinter): + New printer for std::stacktrace_entry. + (StdStacktracePrinter): New printer for std::basic_stacktrace. + +2025-10-15 Jonathan Wakely <jwakely@redhat.com> + + * include/std/stacktrace (basic_stacktrace::current): Call + _M_trim before returning. + (basic_stacktrace::_M_trim): New member function. + +2025-10-15 Jonathan Wakely <jwakely@redhat.com> + + PR libstdc++/122293 + * include/bits/chrono.h (__to_timeout_timespec): Fix + preprocessor condition to match the conditions under which + callers of this function are defined. + * include/bits/this_thread_sleep.h: Remove unused include. + +2025-10-15 Chris Johns <chrisj@rtems.org> + + * configure: Regenerate. + * configure.ac (newlib, *-rtems*): Add HAVE_SYS_IOCTL_H, + HAVE_SYS_STAT_H, HAVE_SYS_TYPES_H, HAVE_S_ISREG, HAVE_UNISTD_H, + HAVE_UNLINKAT, _GLIBCXX_USE_CHMOD, _GLIBCXX_USE_MKDIR, + _GLIBCXX_USE_CHDIR, _GLIBCXX_USE_GETCWD, _GLIBCXX_USE_UTIME, + _GLIBCXX_USE_LINK, _GLIBCXX_USE_READLINK, _GLIBCXX_USE_SYMLINK, + _GLIBCXX_USE_TRUNCATE and _GLIBCXX_USE_FDOPENDIR. + 2025-10-14 Mike Crowe <mac@mcrowe.com> PR libstdc++/116586 diff --git a/libstdc++-v3/configure b/libstdc++-v3/configure index 86ec969..42b638f 100755 --- a/libstdc++-v3/configure +++ b/libstdc++-v3/configure @@ -28744,6 +28744,14 @@ rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext $as_echo "#define HAVE_LINK 1" >>confdefs.h + $as_echo "#define HAVE_SYS_IOCT4YL_H 1" >>confdefs.h + + $as_echo "#define HAVE_SYS_STAT_H 1" >>confdefs.h + + $as_echo "#define HAVE_SYS_TYPES_H 1" >>confdefs.h + + $as_echo "#define HAVE_S_ISREG 1" >>confdefs.h + $as_echo "#define HAVE_QUICK_EXIT 1" >>confdefs.h $as_echo "#define HAVE_READLINK 1" >>confdefs.h @@ -28758,8 +28766,42 @@ rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext $as_echo "#define HAVE_SYMLINK 1" >>confdefs.h + $as_echo "#define HAVE_SYS_IOCT4YL_H 1" >>confdefs.h + + $as_echo "#define HAVE_SYS_STAT_H 1" >>confdefs.h + + $as_echo "#define HAVE_SYS_TYPES_H 1" >>confdefs.h + + $as_echo "#define HAVE_S_ISREG 1" >>confdefs.h + $as_echo "#define HAVE_TRUNCATE 1" >>confdefs.h + $as_echo "#define HAVE_UNISTD_H 1" >>confdefs.h + + $as_echo "#define HAVE_UNLINKAT 1" >>confdefs.h + + $as_echo "#define HAVE_USLEEP 1" >>confdefs.h + + $as_echo "#define _GLIBCXX_USE_CHMOD 1" >>confdefs.h + + $as_echo "#define _GLIBCXX_USE_MKDIR 1" >>confdefs.h + + $as_echo "#define _GLIBCXX_USE_CHDIR 1" >>confdefs.h + + $as_echo "#define _GLIBCXX_USE_GETCWD 1" >>confdefs.h + + $as_echo "#define _GLIBCXX_USE_UTIME 1" >>confdefs.h + + $as_echo "#define _GLIBCXX_USE_LINK 1" >>confdefs.h + + $as_echo "#define _GLIBCXX_USE_READLINK 1" >>confdefs.h + + $as_echo "#define _GLIBCXX_USE_SYMLINK 1" >>confdefs.h + + $as_echo "#define _GLIBCXX_USE_TRUNCATE 1" >>confdefs.h + + $as_echo "#define _GLIBCXX_USE_FDOPENDIR 1" >>confdefs.h + $as_echo "#define HAVE_USLEEP 1" >>confdefs.h @@ -53919,7 +53961,7 @@ $as_echo "$glibcxx_cv_libbacktrace_atomics" >&6; } CXXFLAGS='-O0 -S' cat > conftest.$ac_ext << EOF -#line 53922 "configure" +#line 53964 "configure" #include <stddef.h> int main() { diff --git a/libstdc++-v3/configure.ac b/libstdc++-v3/configure.ac index 47813eb..b9d49c3 100644 --- a/libstdc++-v3/configure.ac +++ b/libstdc++-v3/configure.ac @@ -399,6 +399,10 @@ dnl # rather than hardcoding that information. AC_DEFINE(HAVE_ALIGNED_ALLOC) AC_DEFINE(HAVE_AT_QUICK_EXIT) AC_DEFINE(HAVE_LINK) + AC_DEFINE(HAVE_SYS_IOCT4YL_H) + AC_DEFINE(HAVE_SYS_STAT_H) + AC_DEFINE(HAVE_SYS_TYPES_H) + AC_DEFINE(HAVE_S_ISREG) AC_DEFINE(HAVE_QUICK_EXIT) AC_DEFINE(HAVE_READLINK) AC_DEFINE(HAVE_SETENV) @@ -406,7 +410,24 @@ dnl # rather than hardcoding that information. AC_DEFINE(HAVE_SOCKATMARK) AC_DEFINE(HAVE_STRERROR_L) AC_DEFINE(HAVE_SYMLINK) + AC_DEFINE(HAVE_SYS_IOCT4YL_H) + AC_DEFINE(HAVE_SYS_STAT_H) + AC_DEFINE(HAVE_SYS_TYPES_H) + AC_DEFINE(HAVE_S_ISREG) AC_DEFINE(HAVE_TRUNCATE) + AC_DEFINE(HAVE_UNISTD_H) + AC_DEFINE(HAVE_UNLINKAT) + AC_DEFINE(HAVE_USLEEP) + AC_DEFINE(_GLIBCXX_USE_CHMOD) + AC_DEFINE(_GLIBCXX_USE_MKDIR) + AC_DEFINE(_GLIBCXX_USE_CHDIR) + AC_DEFINE(_GLIBCXX_USE_GETCWD) + AC_DEFINE(_GLIBCXX_USE_UTIME) + AC_DEFINE(_GLIBCXX_USE_LINK) + AC_DEFINE(_GLIBCXX_USE_READLINK) + AC_DEFINE(_GLIBCXX_USE_SYMLINK) + AC_DEFINE(_GLIBCXX_USE_TRUNCATE) + AC_DEFINE(_GLIBCXX_USE_FDOPENDIR) AC_DEFINE(HAVE_USLEEP) # These functions are defined in librtemscpu. We don't use diff --git a/libstdc++-v3/include/bits/chrono.h b/libstdc++-v3/include/bits/chrono.h index 7f505aa..4dc3998 100644 --- a/libstdc++-v3/include/bits/chrono.h +++ b/libstdc++-v3/include/bits/chrono.h @@ -1515,8 +1515,9 @@ _GLIBCXX_END_INLINE_ABI_NAMESPACE(_V2) } // namespace filesystem #endif // C++17 && HOSTED -#if defined _GLIBCXX_USE_NANOSLEEP || defined _GLIBCXX_USE_CLOCK_REALTIME \ - || defined _GLIBCXX_HAS_GTHREADS +#if _GLIBCXX_HOSTED +#if ! defined _GLIBCXX_NO_SLEEP || defined _GLIBCXX_HAS_GTHREADS \ + || _GLIBCXX_HAVE_LINUX_FUTEX namespace chrono { /// @cond undocumented @@ -1585,7 +1586,8 @@ namespace chrono /// @endcond } // namespace chrono -#endif // USE_NANOSLEEP || USE_CLOCK_REALTIME || HAS_GTHREADS +#endif // !NO_SLEEP || HAS_GTHREADS || HAVE_LINUX_FUTEX +#endif // HOSTED _GLIBCXX_END_NAMESPACE_VERSION } // namespace std diff --git a/libstdc++-v3/include/bits/this_thread_sleep.h b/libstdc++-v3/include/bits/this_thread_sleep.h index 01f25dd..7c9d573 100644 --- a/libstdc++-v3/include/bits/this_thread_sleep.h +++ b/libstdc++-v3/include/bits/this_thread_sleep.h @@ -36,7 +36,6 @@ #if __cplusplus >= 201103L #include <bits/chrono.h> // std::chrono::* -#include <ext/numeric_traits.h> // __int_traits #ifdef _GLIBCXX_USE_NANOSLEEP # include <cerrno> // errno, EINTR diff --git a/libstdc++-v3/include/std/stacktrace b/libstdc++-v3/include/std/stacktrace index 01e18ba..587a163 100644 --- a/libstdc++-v3/include/std/stacktrace +++ b/libstdc++-v3/include/std/stacktrace @@ -208,6 +208,8 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION { if (_S_current(__cb, std::__addressof(__ret))) __ret._M_clear(); + else + __ret._M_trim(); } return __ret; } @@ -224,6 +226,8 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION { if (_S_current(__cb, std::__addressof(__ret), __skip)) __ret._M_clear(); + else + __ret._M_trim(); } return __ret; @@ -260,6 +264,8 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION } } } + else + __ret._M_trim(); } return __ret; } @@ -651,6 +657,14 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION } }; + void + _M_trim() noexcept + { + // libbacktrace adds an invalid -1UL entry at the end, remove it. + if (!empty() && !end()[-1]) + _M_impl._M_resize(size() - 1, _M_alloc); + } + [[no_unique_address]] allocator_type _M_alloc{}; _Impl _M_impl{}; @@ -669,13 +683,32 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION inline ostream& operator<<(ostream& __os, const stacktrace_entry& __f) { + if (!__f) [[unlikely]] + return __os << "<unknown>"; + string __desc, __file; int __line; - if (__f._M_get_info(&__desc, &__file, &__line)) + if (__f._M_get_info(&__desc, &__file, &__line)) [[likely]] { - __os.width(4); - __os << __desc << " at " << __file << ':' << __line; + __os << ' '; + if (__desc.empty()) [[unlikely]] + __os << "<unknown>"; + else + __os << __desc; + if (!__file.empty()) [[likely]] + __os << " at " << __file << ':' << __line; } + + struct _Flag_guard // Set and restore hex format + { + _Flag_guard(ios& __s) : _M_ios(__s) { } + ~_Flag_guard() { _M_ios.setf(_M_f); } + + ios& _M_ios; + ios::fmtflags _M_f = _M_ios.setf(ios::hex, ios::basefield); + }; + _Flag_guard __g(__os); + __os << " [0x" << __f.native_handle() << ']'; return __os; } @@ -683,7 +716,8 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION inline ostream& operator<<(ostream& __os, const basic_stacktrace<_Allocator>& __st) { - for (stacktrace::size_type __i = 0; __i < __st.size(); ++__i) + using size_type = typename basic_stacktrace<_Allocator>::size_type; + for (size_type __i = 0, __size = __st.size(); __i < __size; ++__i) { __os.width(4); __os << __i << "# " << __st[__i] << '\n'; diff --git a/libstdc++-v3/python/libstdcxx/v6/printers.py b/libstdc++-v3/python/libstdcxx/v6/printers.py index 1822d42..7a5a627 100644 --- a/libstdc++-v3/python/libstdcxx/v6/printers.py +++ b/libstdc++-v3/python/libstdcxx/v6/printers.py @@ -2357,6 +2357,37 @@ class StdTextEncodingPrinter(printer_base): return 'unknown' return rep['_M_name'] +class StdStacktraceEntryPrinter(printer_base): + """Print a std::stacktrace_entry.""" + + def __init__(self, typename, val): + self._val = val + self._typename = typename + + def to_string(self): + block = gdb.current_progspace().block_for_pc(self._val['_M_pc']) + if block is None or block.function is None: + return "<unknown>" + sym = block.function + return "{{{} at {}:{}}}".format(sym.print_name, sym.symtab.filename, sym.line) + +class StdStacktracePrinter(printer_base): + """Print a std::stacktrace.""" + + def __init__(self, typename, val): + self._val = val + self._typename = typename + self._size = self._val['_M_impl']['_M_size'] + + def to_string(self): + return '%s of length %d' % (self._typename, self._size) + + def children(self): + return StdSpanPrinter._iterator(self._val['_M_impl']['_M_frames'], self._size) + + def display_hint(self): + return 'array' + # A "regular expression" printer which conforms to the # "SubPrettyPrinter" protocol from gdb.printing. class RxPrinter(object): @@ -2977,6 +3008,12 @@ def build_libstdcxx_dictionary(): # libstdcxx_printer.add_version('std::chrono::(anonymous namespace)', 'Rule', # StdChronoTimeZoneRulePrinter) + # C++23 components + libstdcxx_printer.add_version('std::', 'stacktrace_entry', + StdStacktraceEntryPrinter) + libstdcxx_printer.add_version('std::', 'basic_stacktrace', + StdStacktracePrinter) + # C++26 components libstdcxx_printer.add_version('std::', 'text_encoding', StdTextEncodingPrinter) |