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author | Uros Bizjak <ubizjak@gmail.com> | 2021-10-12 18:20:38 +0200 |
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committer | Uros Bizjak <ubizjak@gmail.com> | 2021-10-12 18:21:33 +0200 |
commit | b37351e3279d192d5d4682f002abe5b2e133bba6 (patch) | |
tree | f7ab094b13ae40882054aa022eba3ffd726e3b02 /zlib | |
parent | 640ae312f1273a92ce55842f745bc0db6e7bad30 (diff) | |
download | gcc-b37351e3279d192d5d4682f002abe5b2e133bba6.zip gcc-b37351e3279d192d5d4682f002abe5b2e133bba6.tar.gz gcc-b37351e3279d192d5d4682f002abe5b2e133bba6.tar.bz2 |
i386: Improve workaround for PR82524 LRA limitation [PR85730]
As explained in PR82524, LRA is not able to reload strict_low_part inout
operand with matched input operand. The patch introduces a workaround,
where we allow LRA to generate an instruction with non-matched input operand
which is split post reload to an instruction that inserts non-matched input
operand to an inout operand and the instruction that uses matched operand.
The generated code improves from:
movsbl %dil, %edx
movl %edi, %eax
sall $3, %edx
movb %dl, %al
to:
movl %edi, %eax
movb %dil, %al
salb $3, %al
which is still not optimal, but the code is one instruction shorter and
does not use a temporary register.
2021-10-12 Uroš Bizjak <ubizjak@gmail.com>
gcc/
PR target/85730
PR target/82524
* config/i386/i386.md (*add<mode>_1_slp): Rewrite as
define_insn_and_split pattern. Add alternative 1 and split it
post reload to insert operand 1 into the low part of operand 0.
(*sub<mode>_1_slp): Ditto.
(*and<mode>_1_slp): Ditto.
(*<any_or:code><mode>_1_slp): Ditto.
(*ashl<mode>3_1_slp): Ditto.
(*<any_shiftrt:insn><mode>3_1_slp): Ditto.
(*<any_rotate:insn><mode>3_1_slp): Ditto.
(*neg<mode>_1_slp): New insn_and_split pattern.
(*one_cmpl<mode>_1_slp): Ditto.
gcc/testsuite/
PR target/85730
PR target/82524
* gcc.target/i386/pr85730.c: New test.
Diffstat (limited to 'zlib')
0 files changed, 0 insertions, 0 deletions