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authorRobin Dapp <rdapp@ventanamicro.com>2025-07-09 15:58:05 +0200
committerRobin Dapp <rdapp@ventanamicro.com>2025-07-10 15:56:20 +0200
commit5aa21765236730c1772c19454cbb71365b84d583 (patch)
treed4e35fa05c62d063aa42926e5bc2fd40c87f0bf9 /zlib/watcom
parentdcba959fb30dc250eeb6fdd05aa878e5f1fc8c2d (diff)
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expand: ICE if asked to expand RDIV with non-float type.HEADtrunkmaster
This patch adds asserts that ensure we only expand an RDIV_EXPR with actual float mode. It also replaces the RDIV_EXPR in setting a vectorized loop's length by EXACT_DIV_EXPR. The code in question is only used with length-control targets (riscv, powerpc, s390). PR target/121014 gcc/ChangeLog: * cfgexpand.cc (expand_debug_expr): Assert FLOAT_MODE_P. * optabs-tree.cc (optab_for_tree_code): Assert FLOAT_TYPE_P. * tree-vect-loop.cc (vect_get_loop_len): Use EXACT_DIV_EXPR.
Diffstat (limited to 'zlib/watcom')
0 files changed, 0 insertions, 0 deletions