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authorHaochen Jiang <haochen.jiang@intel.com>2024-08-12 15:30:07 +0800
committerHaochen Jiang <haochen.jiang@intel.com>2024-08-12 15:30:07 +0800
commit4bcb480d103b36c389daaf711f0f25d74379adb6 (patch)
tree46456e75bedee8231277fd75f4f779a878ff6934 /missing
parent7a970bd03f1d8eed7703db8a8db3c753ea68899f (diff)
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Initial support for AVX10.2
gcc/ChangeLog: * common/config/i386/cpuinfo.h (get_available_features): Handle avx10.2. * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_AVX10_2_256_SET): New. (OPTION_MASK_ISA2_AVX10_2_512_SET): Ditto. (OPTION_MASK_ISA2_AVX10_1_256_UNSET): Add OPTION_MASK_ISA2_AVX10_2_256_UNSET. (OPTION_MASK_ISA2_AVX10_1_512_UNSET): Add OPTION_MASK_ISA2_AVX10_2_512_UNSET. (OPTION_MASK_ISA2_AVX10_2_256_UNSET): New. (OPTION_MASK_ISA2_AVX10_2_512_UNSET): Ditto. (ix86_handle_option): Handle avx10.2-256 and avx10.2-512. * common/config/i386/i386-cpuinfo.h (enum processor_features): Add FEATURE_AVX10_2_256 and FEATURE_AVX10_2_512. * common/config/i386/i386-isas.h: Add ISA_NAMES_TABLE_ENTRY for avx10.2-256 and avx10.2-512. * config/i386/i386-c.cc (ix86_target_macros_internal): Define __AVX10_2_256__ and __AVX10_2_512__. * config/i386/i386-isa.def (AVX10_2): Add DEF_PTA(AVX10_2_256) and DEF_PTA(AVX10_2_512). * config/i386/i386-options.cc (isa2_opts): Add -mavx10.2-256 and -mavx10.2-512. (ix86_valid_target_attribute_inner_p): Handle avx10.2-256 and avx10.2-512. * config/i386/i386.opt: Add option -mavx10.2, -mavx10.2-256 and -mavx10.2-512. * config/i386/i386.opt.urls: Regenerated. * doc/extend.texi: Document avx10.2, avx10.2-256 and avx10.2-512. * doc/invoke.texi: Document -mavx10.2, -mavx10.2-256 and -mavx10.2-512. * doc/sourcebuild.texi: Document target avx10.2, avx10.2-256, avx10.2-512. gcc/testsuite/ChangeLog: * g++.dg/other/i386-2.C: Ditto. * g++.dg/other/i386-3.C: Ditto. * gcc.target/i386/sse-12.c: Ditto. * gcc.target/i386/sse-13.c: Ditto. * gcc.target/i386/sse-14.c: Ditto. * gcc.target/i386/sse-22.c: Ditto. * gcc.target/i386/sse-23.c: Ditto.
Diffstat (limited to 'missing')
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