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authorRoger Sayle <roger@nextmovesoftware.com>2023-10-04 17:13:35 +0100
committerRoger Sayle <roger@nextmovesoftware.com>2023-10-04 17:13:35 +0100
commitf4e7bba98c1ad143d253d57bcf39dade2a3a868e (patch)
tree83c26c47364060a758a76db5d851e7d2b31c7089 /libstdc++-v3/python
parent263369b2f7f726a3d4b269678d2c13a9d06a041e (diff)
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ARC: Correct instruction length attributes.
This patch changes/corrects the "type" insn attribute on the SImode shift by one bit instructions in arc.md: {ashl,lshr,ashr}si2_cnt1. These insns can use a compact representation, but the default method to determine the "length" attribute of ARC instruction assumes that instructions of type "shift" have two input operands, and therefore accesses operands[2]. For the shift by constant templates, a type attribute of "unary" is more appropriate (when an explicit length isn't specified) to avoid an ICE. 2023-10-04 Roger Sayle <roger@nextmovesoftware.com> gcc/ChangeLog * config/arc/arc.md (ashlsi3_cnt1): Rename define_insn *ashlsi2_cnt1. Change type attribute to "unary", as this doesn't have operands[2]. Change length attribute to "*,4" to allow compact representation. (lshrsi3_cnt1): Rename define_insn from *lshrsi3_cnt1. Change insn type attribute to "unary", as this doesn't have operands[2]. (ashrsi3_cnt1): Rename define_insn from *ashrsi3_cnt1. Change insn type attribute to "unary", as this doesn't have operands[2].
Diffstat (limited to 'libstdc++-v3/python')
0 files changed, 0 insertions, 0 deletions