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| author | Andrea Corallo <andrea.corallo@arm.com> | 2020-10-15 10:16:18 +0200 |
|---|---|---|
| committer | Andrea Corallo <andrea.corallo@arm.com> | 2020-10-28 12:19:47 +0100 |
| commit | 44e570d9fb01682e24ae53e6004f18a3c2a52493 (patch) | |
| tree | 80a20e16a193f4ad77e76d254afb6330c5bff6f7 /libstdc++-v3/include/std/span | |
| parent | 31643fa3e994749bd2da7b35846f1958f8823b8d (diff) | |
| download | gcc-44e570d9fb01682e24ae53e6004f18a3c2a52493.zip gcc-44e570d9fb01682e24ae53e6004f18a3c2a52493.tar.gz gcc-44e570d9fb01682e24ae53e6004f18a3c2a52493.tar.bz2 | |
aarch64: Add bfloat16 vldN_lane_bf16 + vldNq_lane_bf16 intrisics
gcc/ChangeLog
2020-10-15 Andrea Corallo <andrea.corallo@arm.com>
* config/aarch64/arm_neon.h (__LD2_LANE_FUNC, __LD3_LANE_FUNC)
(__LD4_LANE_FUNC): Rename the macro generating the 'q' variants
into __LD2Q_LANE_FUNC, __LD2Q_LANE_FUNC, __LD2Q_LANE_FUNC so they
all can be undefed at the and of the file.
(vld2_lane_bf16, vld2q_lane_bf16, vld3_lane_bf16, vld3q_lane_bf16)
(vld4_lane_bf16, vld4q_lane_bf16): Add new intrinsics.
gcc/testsuite/ChangeLog
2020-10-15 Andrea Corallo <andrea.corallo@arm.com>
* gcc.target/aarch64/advsimd-intrinsics/bf16_vldN_lane_1.c: New
testcase.
* gcc.target/aarch64/advsimd-intrinsics/bf16_vldN_lane_2.c:
Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vld2_lane_bf16_indices_1.c:
Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_bf16_indices_1.c:
Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vld3_lane_bf16_indices_1.c:
Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_bf16_indices_1.c:
Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vld4_lane_bf16_indices_1.c:
Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_bf16_indices_1.c:
Likewise.
Diffstat (limited to 'libstdc++-v3/include/std/span')
0 files changed, 0 insertions, 0 deletions