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| author | Andreas Schwab <schwab@linux-m68k.org> | 2012-06-15 08:08:04 +0000 |
|---|---|---|
| committer | Andreas Schwab <schwab@gcc.gnu.org> | 2012-06-15 08:08:04 +0000 |
| commit | 6724292e72a9bdbafb0d95587740378f36036707 (patch) | |
| tree | 834d286e04de8d065be612e76864a87b5b2265fd /libjava | |
| parent | 6d017004b14f0b9bcca104b478310574b25705b2 (diff) | |
| download | gcc-6724292e72a9bdbafb0d95587740378f36036707.zip gcc-6724292e72a9bdbafb0d95587740378f36036707.tar.gz gcc-6724292e72a9bdbafb0d95587740378f36036707.tar.bz2 | |
locks.h (compare_and_swap): Use __sync_bool_compare_and_swap.
* sysdep/m68k/locks.h (compare_and_swap): Use
__sync_bool_compare_and_swap.
(release_set): Use write_barrier instead of inlining it.
From-SVN: r188650
Diffstat (limited to 'libjava')
| -rw-r--r-- | libjava/ChangeLog | 6 | ||||
| -rw-r--r-- | libjava/sysdep/m68k/locks.h | 46 |
2 files changed, 27 insertions, 25 deletions
diff --git a/libjava/ChangeLog b/libjava/ChangeLog index dffa368..8a6dd0f 100644 --- a/libjava/ChangeLog +++ b/libjava/ChangeLog @@ -1,3 +1,9 @@ +2012-06-15 Andreas Schwab <schwab@linux-m68k.org> + + * sysdep/m68k/locks.h (compare_and_swap): Use + __sync_bool_compare_and_swap. + (release_set): Use write_barrier instead of inlining it. + 2012-06-15 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> * sysdep/s390/locks.h (compare_and_swap, release_set) diff --git a/libjava/sysdep/m68k/locks.h b/libjava/sysdep/m68k/locks.h index d70757a..b51e314 100644 --- a/libjava/sysdep/m68k/locks.h +++ b/libjava/sysdep/m68k/locks.h @@ -1,6 +1,6 @@ // locks.h - Thread synchronization primitives. m68k implementation. -/* Copyright (C) 2006 Free Software Foundation +/* Copyright (C) 2006, 2012 Free Software Foundation This file is part of libgcj. @@ -22,12 +22,24 @@ static inline bool compare_and_swap(volatile obj_addr_t *addr, obj_addr_t old, obj_addr_t new_val) { - char result; - __asm__ __volatile__("cas.l %2,%3,%0; seq %1" - : "+m" (*addr), "=d" (result), "+d" (old) - : "d" (new_val) - : "memory"); - return (bool) result; + return __sync_bool_compare_and_swap (addr, old, new_val); +} + +// Ensure that subsequent instructions do not execute on stale +// data that was loaded from memory before the barrier. +// On m68k, the hardware ensures that reads are properly ordered. +static inline void +read_barrier(void) +{ +} + +// Ensure that prior stores to memory are completed with respect to other +// processors. +static inline void +write_barrier(void) +{ + // m68k does not reorder writes. We just need to ensure that gcc also doesn't. + __asm__ __volatile__(" " : : : "memory"); } // Set *addr to new_val with release semantics, i.e. making sure @@ -38,8 +50,8 @@ compare_and_swap(volatile obj_addr_t *addr, static inline void release_set(volatile obj_addr_t *addr, obj_addr_t new_val) { - __asm__ __volatile__(" " : : : "memory"); - *(addr) = new_val; + write_barrier (); + *addr = new_val; } // Compare_and_swap with release semantics instead of acquire semantics. @@ -53,20 +65,4 @@ compare_and_swap_release(volatile obj_addr_t *addr, return compare_and_swap(addr, old, new_val); } -// Ensure that subsequent instructions do not execute on stale -// data that was loaded from memory before the barrier. -// On m68k, the hardware ensures that reads are properly ordered. -static inline void -read_barrier(void) -{ -} - -// Ensure that prior stores to memory are completed with respect to other -// processors. -static inline void -write_barrier(void) -{ - // m68k does not reorder writes. We just need to ensure that gcc also doesn't. - __asm__ __volatile__(" " : : : "memory"); -} #endif |