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| author | David Daney <ddaney@avtrex.com> | 2007-09-12 15:16:23 +0000 |
|---|---|---|
| committer | David Daney <daney@gcc.gnu.org> | 2007-09-12 15:16:23 +0000 |
| commit | 22083efc5482e1124ea088b301e167d37f107e07 (patch) | |
| tree | 8a37e2c14445db886dc63dac3e8db5e51eeaf54e /libjava/sysdep | |
| parent | b9baeecdcc22a80357e232383421c6cb0cd3ab69 (diff) | |
| download | gcc-22083efc5482e1124ea088b301e167d37f107e07.zip gcc-22083efc5482e1124ea088b301e167d37f107e07.tar.gz gcc-22083efc5482e1124ea088b301e167d37f107e07.tar.bz2 | |
configure.host: Enable interpreter for mips64.
* configure.host: Enable interpreter for mips64. Enable hash
synchronization for all mips*-*-linux* targets.
* sysdep/mips/locks.h (compare_and_swap, compare_and_swap_release) Use
__sync_bool_compare_and_swap instead of in-line asm.
(release_set, read_barrier, write_barrier): Use __sync_synchronize
instead of in-line asm.
From-SVN: r128438
Diffstat (limited to 'libjava/sysdep')
| -rw-r--r-- | libjava/sysdep/mips/locks.h | 57 |
1 files changed, 8 insertions, 49 deletions
diff --git a/libjava/sysdep/mips/locks.h b/libjava/sysdep/mips/locks.h index 80509ca..c8e30cf 100644 --- a/libjava/sysdep/mips/locks.h +++ b/libjava/sysdep/mips/locks.h @@ -22,29 +22,9 @@ typedef unsigned obj_addr_t __attribute__((__mode__(__pointer__))); inline static bool compare_and_swap(volatile obj_addr_t *addr, obj_addr_t old, - obj_addr_t new_val) + obj_addr_t new_val) { - long result; - __asm__ __volatile__(".set\tpush\n\t" - ".set\tnoreorder\n\t" - ".set\tnomacro\n\t" - "1:\n\t" -#if _MIPS_SIM == _ABIO32 - ".set\tmips2\n\t" -#endif - "ll\t%[result],0(%[addr])\n\t" - "bne\t%[result],%[old],2f\n\t" - "move\t%[result],$0\n\t" // delay slot - "move\t%[result],%[new_val]\n\t" - "sc\t%[result],0(%[addr])\n\t" - "beq\t%[result],$0,1b\n\t" - "nop\n\t" // delay slot - "2:\n\t" - ".set\tpop" - : [result] "=&r" (result) - : [addr] "r" (addr), [new_val] "r" (new_val), [old] "r"(old) - : "memory"); - return (bool) result; + return __sync_bool_compare_and_swap(addr, old, new_val); } // Set *addr to new_val with release semantics, i.e. making sure @@ -53,12 +33,7 @@ compare_and_swap(volatile obj_addr_t *addr, inline static void release_set(volatile obj_addr_t *addr, obj_addr_t new_val) { - __asm__ __volatile__(".set\tpush\n\t" -#if _MIPS_SIM == _ABIO32 - ".set\tmips2\n\t" -#endif - "sync\n\t" - ".set\tpop" : : : "memory"); + __sync_synchronize(); *(addr) = new_val; } @@ -67,16 +42,10 @@ release_set(volatile obj_addr_t *addr, obj_addr_t new_val) // implementation can be the same. inline static bool compare_and_swap_release(volatile obj_addr_t *addr, - obj_addr_t old, - obj_addr_t new_val) + obj_addr_t old, + obj_addr_t new_val) { - __asm__ __volatile__(".set\tpush\n\t" -#if _MIPS_SIM == _ABIO32 - ".set\tmips2\n\t" -#endif - "sync\n\t" - ".set\tpop" : : : "memory"); - return compare_and_swap(addr, old, new_val); + return __sync_bool_compare_and_swap(addr, old, new_val); } // Ensure that subsequent instructions do not execute on stale @@ -85,12 +54,7 @@ compare_and_swap_release(volatile obj_addr_t *addr, inline static void read_barrier() { - __asm__ __volatile__(".set\tpush\n\t" -#if _MIPS_SIM == _ABIO32 - ".set\tmips2\n\t" -#endif - "sync\n\t" - ".set\tpop" : : : "memory"); + __sync_synchronize(); } // Ensure that prior stores to memory are completed with respect to other @@ -98,12 +62,7 @@ read_barrier() inline static void write_barrier() { - __asm__ __volatile__(".set\tpush\n\t" -#if _MIPS_SIM == _ABIO32 - ".set\tmips2\n\t" -#endif - "sync\n\t" - ".set\tpop" : : : "memory"); + __sync_synchronize(); } #endif // __SYSDEP_LOCKS_H__ |