RISC-V: Add support for the XAndesvbfhcvt ISA extension.

This patch add support for XAndesvbfhcvt ISA extension.
This extension defines instructions to perform vector floating-point
conversion between the BFLOAT16 floating-point data and the IEEE-754 32-bit
single-precision floating-point (SP) data in a vector register.

gcc/ChangeLog:

	* common/config/riscv/riscv-common.cc:
	Turn on VECTOR_ELEN_BF_16 for XAndesvbfhcvt.
	* config.gcc: Add extra_objs andes-vector-builtins-bases.o
	and extra_headers andes_vector.h.
	* config/riscv/riscv-vector-builtins-shapes.cc
	(BASE_NAME_MAX_LEN): Increase size to 20.
	* config/riscv/riscv-vector-builtins.cc
	(f32_to_bf16_nf_w_ops): New operand information.
	(f32_to_bf16_nf_w_ops): New operand information.
	(DEF_RVV_FUNCTION): New def.
	* config/riscv/riscv-vector-builtins.def (bf16): Ditto.
	* config/riscv/riscv-vector-builtins.h (enum required_ext): Ditto.
	(required_ext_to_isa_name): Add case XANDESVBFHCVT_EXT.
	(required_extensions_specified): Ditto.
	* config/riscv/t-riscv: Add andes-vector-builtins-functions.def,
	andes-vector-builtins-bases.h and andes-vector-builtins-bases.o.
	* config/riscv/vector-iterators.md (NDS_VWEXTBF): New iterator.
	(NDS_V_DOUBLE_TRUNC_BF): New attr.
	* config/riscv/andes-vector-builtins-bases.cc: New file.
	* config/riscv/andes-vector-builtins-bases.h: New file.
	* config/riscv/andes-vector-builtins-functions.def: New file.
	* config/riscv/andes_vector.h: New file.
	* config/riscv/andes-vector.md: New file.
	* config/riscv/vector.md: Include andes_vector.md.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/rvv.exp: Add regression for xandesvector.
	* gcc.target/riscv/rvv/xandesvector/non-policy/non-overloaded/nds_vfncvtbf16s.c: New test.
	* gcc.target/riscv/rvv/xandesvector/non-policy/non-overloaded/nds_vfwcvtsbf16.c: New test.
	* gcc.target/riscv/rvv/xandesvector/non-policy/overloaded/nds_vfncvtbf16s.c: New test.
	* gcc.target/riscv/rvv/xandesvector/non-policy/overloaded/nds_vfwcvtsbf16.c: New test.
	* gcc.target/riscv/rvv/xandesvector/policy/non-overloaded/nds_vfncvtbf16s.c: New test.
	* gcc.target/riscv/rvv/xandesvector/policy/non-overloaded/nds_vfwcvtsbf16.c: New test.
	* gcc.target/riscv/rvv/xandesvector/policy/overloaded/nds_vfncvtbf16s.c: New test.
	* gcc.target/riscv/rvv/xandesvector/policy/overloaded/nds_vfwcvtsbf16.c: New test.

0 files changed, 0 insertions, 0 deletions