diff options
author | Jeff Law <jlaw@ventanamicro.com> | 2025-08-22 11:53:27 -0600 |
---|---|---|
committer | Jeff Law <jlaw@ventanamicro.com> | 2025-08-22 11:57:12 -0600 |
commit | ebbeaf490c56e04d2e9be25caf9522ef5fba6c72 (patch) | |
tree | 87327c97f900a3cc9c9d892e2ce4e76937b3dc8a /libjava/gnu/xml/xpath/XPathParser$YyNameClass.h | |
parent | bd7c238e3c36c872111eb6ffb0e8f75a4a4d2f41 (diff) | |
download | gcc-ebbeaf490c56e04d2e9be25caf9522ef5fba6c72.zip gcc-ebbeaf490c56e04d2e9be25caf9522ef5fba6c72.tar.gz gcc-ebbeaf490c56e04d2e9be25caf9522ef5fba6c72.tar.bz2 |
[PR rtl-optimization/120553] Improve selecting between constants based on sign bit test
While working to remove mvconst_internal I stumbled over a regression in
the code to handle signed division by a power of two.
In that sequence we want to select between 0, 2^n-1 by pairing a sign
bit splat with a subsequent logical right shift. This can be done
without branches or conditional moves.
Playing with it a bit made me realize there's a handful of selections we
can do based on a sign bit test. Essentially there's two broad cases.
Clearing bits after the sign bit splat. So we have 0, -1, if we clear
bits the 0 stays as-is, but the -1 could easily turn into 2^n-1, ~2^n-1,
or some small constants.
Setting bits after the sign bit splat. If we have 0, -1, setting bits
the -1 stays as-is, but the 0 can turn into 2^n, a small constant, etc.
Shreya and I originally started looking at target patterns to do this,
essentially discovering conditional move forms of the selects and
rewriting them into something more efficient. That got out of control
pretty quickly and it relied on if-conversion to initially create the
conditional move.
The better solution is to actually discover the cases during
if-conversion itself. That catches cases that were previously being
missed, checks cost models, and is actually simpler since we don't have
to distinguish between things like ori and bseti, instead we just emit
the natural RTL and let the target figure it out.
In the ifcvt implementation we put these cases just before trying the
traditional conditional move sequences. Essentially these are a last
attempt before trying the generalized conditional move sequence.
This as been bootstrapped and regression tested on aarch64, riscv,
ppc64le, s390x, alpha, m68k, sh4eb, x86_64 and probably a couple others
I've forgotten. It's also been tested on the other embedded targets.
Obviously the new tests are risc-v specific, so that testing was
primarily to make sure we didn't ICE, generate incorrect code or regress
target existing specific tests.
Raphael has some changes to attack this from the gimple direction as
well. I think the latest version of those is on me to push through
internal review.
PR rtl-optimization/120553
gcc/
* ifcvt.cc (noce_try_sign_bit_splat): New function.
(noce_process_if_block): Use it.
gcc/testsuite/
* gcc.target/riscv/pr120553-1.c: New test.
* gcc.target/riscv/pr120553-2.c: New test.
* gcc.target/riscv/pr120553-3.c: New test.
* gcc.target/riscv/pr120553-4.c: New test.
* gcc.target/riscv/pr120553-5.c: New test.
* gcc.target/riscv/pr120553-6.c: New test.
* gcc.target/riscv/pr120553-7.c: New test.
* gcc.target/riscv/pr120553-8.c: New test.
Diffstat (limited to 'libjava/gnu/xml/xpath/XPathParser$YyNameClass.h')
0 files changed, 0 insertions, 0 deletions