[RISC-V] Avoid unnecessary andi with -1 argument

I was preparing to do some testing of Shreya's next patch on spec and stumbled
across another "andi dst,src,-1" case.  I fixed some stuff like this in the
gcc-15 cycle, but this one slipped through.

It's probably about 100M instructions on deepsjeng.  So tiny, but there's no
good reason to leave the clearly extraneous instructions in the output.

As with the other cases, it's a post-reload splitter that's not being careful
enough about the code it generates.

This has gone through my tester successfully.  Waiting on the pre-commit tester
before going forward.

gcc/
	* config/riscv/riscv.md (*branch<ANYI:mode>_shiftedarith_equals_zero):
	Avoid generating unnecessary andi.  Fix formatting.

gcc/testsuite
	* g++.target/riscv/redundant-andi.C: New test.

0 files changed, 0 insertions, 0 deletions