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authorPan Li <pan2.li@intel.com>2025-09-02 12:30:16 +0800
committerPan Li <pan2.li@intel.com>2025-09-05 06:15:04 +0800
commit66309452125f8f2c68cd3662dc709041b57073f3 (patch)
tree25ef0dd4a289e16eb562de227c1ab07577fee8cb /libjava/classpath
parente2e01a893c1770e23ec1a573403688198c321b0e (diff)
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RISC-V: Combine vec_duplicate + vmadd.vv to vmadd.vx on GR2VR cost
This patch would like to combine the vec_duplicate + vmadd.vv to the vmadd.vx. From example as below code. The related pattern will depend on the cost of vec_duplicate from GR2VR. Then the late-combine will take action if the cost of GR2VR is zero, and reject the combination if the GR2VR cost is greater than zero. Assume we have example code like below, GR2VR cost is 0. Before this patch: 11 │ beq a3,zero,.L8 12 │ vsetvli a5,zero,e32,m1,ta,ma 13 │ vmv.v.x v2,a2 ... 16 │ .L3: 17 │ vsetvli a5,a3,e32,m1,ta,ma ... 22 │ vmadd.vv v1,v2,v3 ... 25 │ bne a3,zero,.L3 After this patch: 11 │ beq a3,zero,.L8 ... 14 │ .L3: 15 │ vsetvli a5,a3,e32,m1,ta,ma ... 20 │ vmadd.vx v1,a2,v3 ... 23 │ bne a3,zero,.L3 gcc/ChangeLog: * config/riscv/autovec-opt.md (*vmacc_vx_<mode>): Rename to handle both the macc and madd. (*mul_plus_vx_<mode>): Add madd pattern. * config/riscv/vector.md (@pred_mul_plus_vx_<mode>): Rename to handle both the macc and madd. (*pred_macc_<mode>_scalar_undef): Remove. (*pred_nmsac_<mode>_scalar_undef): Remove. (*pred_mul_plus_vx<mode>_undef): Add new pattern to handle both the vmacc and vmadd. (@pred_mul_plus_vx<mode>): Ditto. Signed-off-by: Pan Li <pan2.li@intel.com>
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