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| author | Hans-Peter Nilsson <hp@axis.com> | 2026-02-09 21:30:46 +0100 |
|---|---|---|
| committer | Hans-Peter Nilsson <hp@gcc.gnu.org> | 2026-02-12 19:33:18 +0100 |
| commit | 6fdd184731aadb2d6cf5afa866ec9eb63126516a (patch) | |
| tree | 4a7d58f2687035465be2f510f1d467d703729cc4 /libjava/classpath/vm/reference/java | |
| parent | 5bae3e8edcce9d53350c52ba5bcab6b7749fd1f5 (diff) | |
| download | gcc-6fdd184731aadb2d6cf5afa866ec9eb63126516a.zip gcc-6fdd184731aadb2d6cf5afa866ec9eb63126516a.tar.gz gcc-6fdd184731aadb2d6cf5afa866ec9eb63126516a.tar.bz2 | |
CRIS: For HI, QI, make sure move patterns don't have two memory operands
Further testing showed that the two-memory-operands case that could
happen for movsf happened for the HI and QI modes as well, for example
in gcc.dg/Wrestrict-5.c. So, for improved performance they'd better
get guards as well. The movstrict<m> case is just tagging along for
summetry; I don't know of test-cases that expose that.
* config/cris/cris.md (BWDSF): New mode_iterator replacing SISF.
All callers changed.
("*movhi_internal<setcc><setnz><setnzvc>"): Anonymized from
"<acc><anz><anzvc>movhi<setcc><setnz><setnzvc>" to make it a
match-only pattern. Add conditions to guard from source and
destination both being memory operands.
("*movstricthi_internal", "*movstrictqi_internal"): Similarly
for "movstricthi" and "movstrictqi".
("movstrict<mode>"): Add common expander for BW, forcing one operand
to be a register or source being zero.
Diffstat (limited to 'libjava/classpath/vm/reference/java')
0 files changed, 0 insertions, 0 deletions