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authorRobin Dapp <rdapp@oss.qualcomm.com>2026-02-04 12:51:36 +0100
committerRobin Dapp <rdapp@oss.qualcomm.com>2026-02-05 10:52:45 +0100
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parent76053c32050f41b2c91718a07c480ddf732ac925 (diff)
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RISC-V: Allow vector modes for xtheadvector. [PR123971]
In riscv_vector_mode_supported_any_target_p we disallow any vector mode when TARGET_XTHEADVECTOR. Things go wrong when we check if a permutation for a mode is supported by just looking at the optab (e.g. in forwprop). Then later we try to expand that permutation but cannot find a related int vector mode because we don't allow any vector mode. Strictly speaking, this is fallout from the simplify_vector_constructor changes but it's still a target issue as the common code has done the proper check and we don't live up to the promise of being able to extend a certain mode. This patch just allows all modes in riscv_vector_mode_supported_any_target_p, even for theadvector. PR target/123971 gcc/ChangeLog: * config/riscv/riscv.cc (riscv_vector_mode_supported_any_target_p): Remove TARGET_XTHEADVECTOR. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/xtheadvector/pr123971.c: New test. Signed-off-by: Robin Dapp <rdapp@oss.qualcomm.com>
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