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authorArtemiy Volkov <artemiyv@acm.org>2025-08-17 08:08:29 -0600
committerJeff Law <jlaw@ventanamicro.com>2025-08-17 08:08:29 -0600
commit21251fe7ff5cee3b899ebc79a4c421c89f439d34 (patch)
tree1f87850b5f0531d6fd5b18cfe23465eb27aea4e9 /libjava/classpath/lib/java
parent15dc059bd7783de6fc84879664e55e000c09557a (diff)
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regrename: treat writes as reads for fused instruction pairs
Consider the following (RISC-V) instruction pair: mul s6,a1,a2 add s6,a4,s6 Without this patch, while handling the second instruction, (a) the existing chain for s6 will first be closed (upon the terminate_write action for the input operand), then (b) a new one will be opened (upon the mark_write action for the output operand). This will likely lead to the two output operands being different physical registers, breaking the single-output property required for some macro-op fusion pairs. This patch, using the single_output_fused_pair_p () predicate introduced earlier, changes the regrename behavior for such pairs to append the input and the output operands to the existing chain (as if both actions were mark_read), instead of breaking the current renaming chain and starting a new one. This ensures that the output operands of both fused instructions are kept in the same hard register, and that the single-output property of the insn pair is preserved. gcc/ChangeLog: * regrename.cc (scan_rtx_reg): Handle fused insn pairs.
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