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| author | Robin Dapp <rdapp@ventanamicro.com> | 2025-09-04 10:16:21 +0200 |
|---|---|---|
| committer | Robin Dapp <rdapp@ventanamicro.com> | 2025-09-04 12:48:40 +0200 |
| commit | e3d5e9f0c8c6f27bf59d321d5082be7b3bb39f8a (patch) | |
| tree | ecd4fbfe47089cdfa8917d17236fbdbbeaaf2cd6 /libjava/classpath/lib/java/util/logging | |
| parent | 8bb076ac0d887a6a67263e280b17aacd9e5062e7 (diff) | |
| download | gcc-e3d5e9f0c8c6f27bf59d321d5082be7b3bb39f8a.zip gcc-e3d5e9f0c8c6f27bf59d321d5082be7b3bb39f8a.tar.gz gcc-e3d5e9f0c8c6f27bf59d321d5082be7b3bb39f8a.tar.bz2 | |
RISC-V: Use correct target in expand_vec_perm [PR121780].
This fixes a glaring mistake in yesterday's change to the expansion of
vec_perm. We should of course move tmp_target into the real target
and not the other way around. I wonder why my testing hasn't
caught this...
PR target/121742
PR target/121780
PR target/121781
gcc/ChangeLog:
* config/riscv/riscv-v.cc (expand_vec_perm): Swap target and
tmp_target.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/pr121780.c: New test.
* gcc.target/riscv/rvv/autovec/pr121781.c: New test.
Diffstat (limited to 'libjava/classpath/lib/java/util/logging')
0 files changed, 0 insertions, 0 deletions