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| author | Xi Ruoyao <xry111@xry111.site> | 2025-03-01 11:46:57 +0800 |
|---|---|---|
| committer | Lulu Cheng <chenglulu@loongson.cn> | 2025-08-18 09:09:38 +0800 |
| commit | 534276f1e5889f2ce5b5238e68b395a92a79761b (patch) | |
| tree | 09cb6e7edb307483c68685312497231ebf230b2c /libjava/classpath/lib/java/lang/ref | |
| parent | 54a3853e5f1c73784d49e05272692697e95e2769 (diff) | |
| download | gcc-534276f1e5889f2ce5b5238e68b395a92a79761b.zip gcc-534276f1e5889f2ce5b5238e68b395a92a79761b.tar.gz gcc-534276f1e5889f2ce5b5238e68b395a92a79761b.tar.bz2 | |
LoongArch: Implement 16-byte atomic add, sub, and, or, xor, and nand with sc.q
gcc/ChangeLog:
* config/loongarch/sync.md (UNSPEC_TI_FETCH_ADD): New unspec.
(UNSPEC_TI_FETCH_SUB): Likewise.
(UNSPEC_TI_FETCH_AND): Likewise.
(UNSPEC_TI_FETCH_XOR): Likewise.
(UNSPEC_TI_FETCH_OR): Likewise.
(UNSPEC_TI_FETCH_NAND_MASK_INVERTED): Likewise.
(ALL_SC): New define_mode_iterator.
(_scq): New define_mode_attr.
(atomic_fetch_nand<mode>): Accept ALL_SC instead of only GPR.
(UNSPEC_TI_FETCH_DIRECT): New define_int_iterator.
(UNSPEC_TI_FETCH): New define_int_iterator.
(amop_ti_fetch): New define_int_attr.
(size_ti_fetch): New define_int_attr.
(atomic_fetch_<amop_ti_fetch>ti_scq): New define_insn.
(atomic_fetch_<amop_ti_fetch>ti): New define_expand.
Diffstat (limited to 'libjava/classpath/lib/java/lang/ref')
0 files changed, 0 insertions, 0 deletions