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author | Uros Bizjak <ubizjak@gmail.com> | 2025-08-06 20:06:42 +0200 |
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committer | Uros Bizjak <ubizjak@gmail.com> | 2025-08-07 00:08:46 +0200 |
commit | 84476b4c88465f09c3ec1a52fdf0df1a76364988 (patch) | |
tree | 756cc76fe8381c17315771c5779630dff8e722f6 /libjava/classpath/java | |
parent | 01a523943c0a9b297726289d7333a5217b1d4d31 (diff) | |
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i386: Fix invalid RTX mode in the unnamed rotate splitter.
The following splitter from the commit r11-5747:
(define_split
[(set (match_operand:SWI 0 "register_operand")
(any_rotate:SWI
(match_operand:SWI 1 "const_int_operand")
(subreg:QI
(and
(match_operand 2 "int248_register_operand")
(match_operand 3 "const_int_operand")) 0)))]
"(INTVAL (operands[3]) & (GET_MODE_BITSIZE (<MODE>mode) - 1))
== GET_MODE_BITSIZE (<MODE>mode) - 1"
[(set (match_dup 4) (match_dup 1))
(set (match_dup 0)
(any_rotate:SWI (match_dup 4)
(subreg:QI
(and:SI (match_dup 2) (match_dup 3)) 0)))]
"operands[4] = gen_reg_rtx (<MODE>mode);")
matches any mode of (and ...) on input, but hard-codes (and:SI ...)
in the output. This causes an ICE if the incoming (and ...) is DImode
rather than SImode.
Co-developed-by: Richard Sandiford <richard.sandiford@arm.com>
PR target/96226
gcc/ChangeLog:
* config/i386/predicates.md (and_operator): New operator.
* config/i386/i386.md (splitter after *<rotate_insn><mode>3_mask):
Use and_operator to match AND RTX and use its mode
in the split pattern.
Diffstat (limited to 'libjava/classpath/java')
0 files changed, 0 insertions, 0 deletions