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authorRobin Dapp <rdapp@ventanamicro.com>2025-11-14 15:50:05 +0100
committerRobin Dapp <rdapp@ventanamicro.com>2025-12-09 09:36:03 +0100
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parent195471cc076d05ac1b3e2c2ed0b8cfedb0ac97a1 (diff)
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RISC-V: -mmax-vectorization.
This adds an -mmax-vectorization option to riscv, a verbatim copy from aarch64. It is an option for vector code analysis. Internally it increases scalar costs by a large factor so every vector approach will be profitable. As opposed to -fno-vect-cost-model, we will still compare the vector approaches amongst each other, though. In order to handle this argument without an '=' I needed to change the parsing flow slightly. gcc/ChangeLog: * config/riscv/riscv-target-attr.cc (riscv_target_attr_parser::handle_max_vect): New parser entry. (riscv_target_attr_parser::update_settings): Set max-vect option. (riscv_process_one_target_attr): Change null-arg handling. * config/riscv/riscv.cc (riscv_override_options_internal): Set max-vect option. * config/riscv/riscv.opt: Add -mmax-vectorization option. * doc/extend.texi: Document new option. * doc/invoke.texi: Ditto. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/max-vect-1.c: New test. * gcc.target/riscv/rvv/autovec/max-vect-2.c: New test.
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