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| author | Torvald Riegel <triegel@redhat.com> | 2016-01-12 14:57:45 +0000 |
|---|---|---|
| committer | Torvald Riegel <torvald@gcc.gnu.org> | 2016-01-12 14:57:45 +0000 |
| commit | 0d1ed41261a495ed3c821b8252283e1f26597f53 (patch) | |
| tree | cce62f9d70ede7c9273428aa1052efb2ae3e0273 /libitm/config/powerpc | |
| parent | 1c3c7c414570020cfb7b510f908fc20995ab2da0 (diff) | |
| download | gcc-0d1ed41261a495ed3c821b8252283e1f26597f53.zip gcc-0d1ed41261a495ed3c821b8252283e1f26597f53.tar.gz gcc-0d1ed41261a495ed3c821b8252283e1f26597f53.tar.bz2 | |
libitm: Remove dead code and data.
From-SVN: r232275
Diffstat (limited to 'libitm/config/powerpc')
| -rw-r--r-- | libitm/config/powerpc/cacheline.h | 42 |
1 files changed, 0 insertions, 42 deletions
diff --git a/libitm/config/powerpc/cacheline.h b/libitm/config/powerpc/cacheline.h deleted file mode 100644 index ce06b40..0000000 --- a/libitm/config/powerpc/cacheline.h +++ /dev/null @@ -1,42 +0,0 @@ -/* Copyright (C) 2012-2016 Free Software Foundation, Inc. - Contributed by Richard Henderson <rth@redhat.com>. - - This file is part of the GNU Transactional Memory Library (libitm). - - Libitm is free software; you can redistribute it and/or modify it - under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - Libitm is distributed in the hope that it will be useful, but WITHOUT ANY - WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS - FOR A PARTICULAR PURPOSE. See the GNU General Public License for - more details. - - Under Section 7 of GPL version 3, you are granted additional - permissions described in the GCC Runtime Library Exception, version - 3.1, as published by the Free Software Foundation. - - You should have received a copy of the GNU General Public License and - a copy of the GCC Runtime Library Exception along with this program; - see the files COPYING3 and COPYING.RUNTIME respectively. If not, see - <http://www.gnu.org/licenses/>. */ - -#ifndef LIBITM_POWERPC_CACHELINE_H -#define LIBITM_POWERPC_CACHELINE_H 1 - -// A cacheline is the smallest unit with which locks are associated. -// The current implementation of the _ITM_[RW] barriers assumes that -// all data types can fit (aligned) within a cachline, which means -// in practice sizeof(complex long double) is the smallest cacheline size. -// It ought to be small enough for efficient manipulation of the -// modification mask, below. -#if defined (__powerpc64__) || defined (__ppc64__) -# define CACHELINE_SIZE 64 -#else -# define CACHELINE_SIZE 32 -#endif - -#include "config/generic/cacheline.h" - -#endif // LIBITM_POWERPC_CACHELINE_H |