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authorTamar Christina <tamar.christina@arm.com>2024-12-13 11:17:55 +0000
committerTamar Christina <tamar.christina@arm.com>2024-12-13 11:17:55 +0000
commit4a9427f75b9f5dfbd9edd0ec8e0a07f868754b65 (patch)
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parent99b9dfaff66ca6edd534bcf0e7b943a6f816c9bf (diff)
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AArch64: Add CMP+CSEL and CMP+CSET for cores that support it
GCC 15 added two new fusions CMP+CSEL and CMP+CSET. This patch enables them for cores that support based on their Software Optimization Guides and generically on Armv9-A. Even if a core does not support it there's no negative performance impact. gcc/ChangeLog: * config/aarch64/aarch64-fusion-pairs.def (AARCH64_FUSE_NEOVERSE_BASE): New. * config/aarch64/tuning_models/neoverse512tvb.h: Use it. * config/aarch64/tuning_models/neoversen2.h: Use it. * config/aarch64/tuning_models/neoversen3.h: Use it. * config/aarch64/tuning_models/neoversev1.h: Use it. * config/aarch64/tuning_models/neoversev2.h: Use it. * config/aarch64/tuning_models/neoversev3.h: Use it. * config/aarch64/tuning_models/neoversev3ae.h: Use it. * config/aarch64/tuning_models/cortexx925.h: Add fusions. * config/aarch64/tuning_models/generic_armv9_a.h: Add fusions.
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