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| author | Thomas Preud'homme <thomas.preudhomme@arm.com> | 2016-11-16 18:30:56 +0000 |
|---|---|---|
| committer | Thomas Preud'homme <thopre01@gcc.gnu.org> | 2016-11-16 18:30:56 +0000 |
| commit | 660e6c2c127fdec06bfa428b08ab4123e37281a5 (patch) | |
| tree | 0e26028c9bf60b7ec7247434464570e6f1dc6643 /libgo/Makefile.in | |
| parent | 5e8d7713becd848449a35231d58b8b0965467784 (diff) | |
| download | gcc-660e6c2c127fdec06bfa428b08ab4123e37281a5.zip gcc-660e6c2c127fdec06bfa428b08ab4123e37281a5.tar.gz gcc-660e6c2c127fdec06bfa428b08ab4123e37281a5.tar.bz2 | |
Fix ICE on empty FIQ interrupt handler on ARM
2016-11-16 Thomas Preud'homme <thomas.preudhomme@arm.com>
gcc/
* config/arm/arm.md (arm_addsi3): Add alternative for addition of
general register with general register or ARM constant into SP
register.
gcc/testsuite/
* gcc.target/arm/empty_fiq_handler.c: New test.
From-SVN: r242508
Diffstat (limited to 'libgo/Makefile.in')
0 files changed, 0 insertions, 0 deletions