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authorUros Bizjak <ubizjak@gmail.com>2008-03-20 00:38:35 +0100
committerUros Bizjak <uros@gcc.gnu.org>2008-03-20 00:38:35 +0100
commit1b1d8f8817fdc22a84c1cee4905192f15bb2df52 (patch)
tree6bc9c1ea888993833865ad22b0865a8630af51ee /libgfortran
parent05e6ee933ee2acec2477fedb6b22a08ffc2431bf (diff)
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re PR target/14552 (compiled trivial vector intrinsic code is inefficient)
PR target/14552 * config/i386/mmx.md (*mov<mode>_internal_rex64"): Adjust register allocator preferences for "y" and "r" class registers. ("*mov<mode>_internal"): Ditto. ("*movv2sf_internal_rex64"): Ditto. ("*movv2sf_internal"): Ditto. testsuite/ChangeLog: PR target/14552 * gcc.target/i386/pr14552.c: New test. From-SVN: r133354
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