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author | Richard Biener <rguenther@suse.de> | 2025-02-03 15:27:30 +0100 |
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committer | Richard Biener <rguenth@gcc.gnu.org> | 2025-02-04 08:34:48 +0100 |
commit | 5b46c01c50662a1c730e6658ea4307d4f80da578 (patch) | |
tree | d5da17b2aa8cbb7b782dd476ecd0bf382d53d373 /libgfortran/generated/pow_m8_m8.c | |
parent | a55e14b239181381204c615335929b3316d75370 (diff) | |
download | gcc-5b46c01c50662a1c730e6658ea4307d4f80da578.zip gcc-5b46c01c50662a1c730e6658ea4307d4f80da578.tar.gz gcc-5b46c01c50662a1c730e6658ea4307d4f80da578.tar.bz2 |
rtl-optimization/117611 - ICE in simplify_shift_const_1
The following checks we have a scalar int shift mode before
enforcing it. As AVR shows the mode can be a signed _Accum mode
as well.
PR rtl-optimization/117611
* combine.cc (simplify_shift_const_1): Bail if not
scalar int mode.
* gcc.dg/fixed-point/pr117611.c: New testcase.
Diffstat (limited to 'libgfortran/generated/pow_m8_m8.c')
0 files changed, 0 insertions, 0 deletions