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authorJose E. Marchesi <jose.marchesi@oracle.com>2024-05-10 09:50:25 +0200
committerJose E. Marchesi <jose.marchesi@oracle.com>2024-05-10 09:56:00 +0200
commitbb5f619a938567b316306bdc46f0efb8d18ddc59 (patch)
tree9561c427083a9dca518de92603016e3add7c8d88 /libgcc
parente5d8fd9ce05611093191d500ebc39f150d0ece2b (diff)
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bpf: fix printing of memory operands in pseudoc asm dialect
The BPF backend was emitting memory operands in pseudo-C syntax without surrounding parentheses. These were being provided in the corresponding instruction templates. This was causing GCC emitting invalid instructions when finding inline assembly with memory operands like: asm volatile ( "r1 = *(u64 *)%[ctx_a];" "if r1 != 42 goto 1f;" "r1 = *(u64 *)%[ctx_b];" "if r1 != 42 goto 1f;" "r1 = *(u64 *)%[ctx_c];" "if r1 != 7 goto 1f;" "r1 /= 0;" "1:" : : [ctx_a]"m"(ctx.a), [ctx_b]"m"(ctx.b), [ctx_c]"m"(ctx.c) : "r1" ); This patch changes the backend to include the surrounding parentheses in the printed representation of the memory operands (much like surrounding brackets are included in normal asm syntax) and adapts the impacted instruction templates accordingly. Tested in target bpf-unknown-none, host x86_64-linux-gnu. gcc/ChangeLog: * config/bpf/bpf.cc (bpf_print_operand_address): Include surrounding parenthesis around mem operands in pseudoc asm dialect. * config/bpf/bpf.md (*mov<MM:mode>): Adapt accordingly. (zero_extendhidi2): Likewise. (zero_extendqidi2): Likewise. (*extendsidi2): Likewise. (*extendsidi2): Likewise. (extendhidi2): Likewise. (extendqidi2): Likewise. (extendhisi2): Likewise. * config/bpf/atomic.md (atomic_add<AMO:mode>): Likewise. (atomic_and<AMO:mode>): Likewise. (atomic_or<AMO:mode>): Likewise. (atomic_xor<AMO:mode>): Likewise. (atomic_fetch_add<AMO:mode>): Likewise. (atomic_fetch_and<AMO:mode>): Likewise. (atomic_fetch_or<AMO:mode>): Likewise. (atomic_fetch_xor<AMO:mode>): Likewise.
Diffstat (limited to 'libgcc')
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