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author | Maciej W. Rozycki <macro@embecosm.com> | 2023-11-22 01:18:31 +0000 |
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committer | Maciej W. Rozycki <macro@embecosm.com> | 2023-11-22 01:18:31 +0000 |
commit | 9a1a2e9857b144872798973fc83ef6e8648cfb08 (patch) | |
tree | 41dc81e61777ed189e6329a1eef7ce8d9f159440 /libgcc | |
parent | 0f4ce86eebd031d1d8ad5bd8fc92333030ce56a1 (diff) | |
download | gcc-9a1a2e9857b144872798973fc83ef6e8648cfb08.zip gcc-9a1a2e9857b144872798973fc83ef6e8648cfb08.tar.gz gcc-9a1a2e9857b144872798973fc83ef6e8648cfb08.tar.bz2 |
RISC-V: Handle FP NE operator via inversion in cond-operation expansion
We have no FNE.fmt machine instructions, but we can emulate them for the
purpose of conditional-move and conditional-add operations by using the
respective FEQ.fmt instruction and then swapping the data input operands
or complementing the mask for the conditional addend respectively, so
update our handlers accordingly.
gcc/
* config/riscv/riscv-protos.h (riscv_expand_float_scc): Add
`invert_ptr' parameter.
* config/riscv/riscv.cc (riscv_emit_float_compare): Add NE
inversion handling.
(riscv_expand_float_scc): Pass `invert_ptr' through to
`riscv_emit_float_compare'.
(riscv_expand_conditional_move): Pass `&invert' to
`riscv_expand_float_scc'.
* config/riscv/riscv.md (add<mode>cc): Likewise.
Diffstat (limited to 'libgcc')
0 files changed, 0 insertions, 0 deletions