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| author | Wei Xiao <wei3.xiao@intel.com> | 2018-12-18 03:41:44 +0000 |
|---|---|---|
| committer | Xuepeng Guo <xguo@gcc.gnu.org> | 2018-12-18 03:41:44 +0000 |
| commit | 5d54c79858656d7fe58cd1387f766dbf23fc04be (patch) | |
| tree | d36c9ac8739b8a0dff3d2cde694fa1ae749c6fa3 /libgcc | |
| parent | f9fd26fe57bf2f538591c7cc2e2cb63d577c1afb (diff) | |
| download | gcc-5d54c79858656d7fe58cd1387f766dbf23fc04be.zip gcc-5d54c79858656d7fe58cd1387f766dbf23fc04be.tar.gz gcc-5d54c79858656d7fe58cd1387f766dbf23fc04be.tar.bz2 | |
driver-i386.c (host_detect_local_cpu): Detect cascadelake.
gcc/ChangeLog
2018-12-18 Wei Xiao <wei3.xiao@intel.com>
* config/i386/driver-i386.c (host_detect_local_cpu): Detect cascadelake.
* config/i386/i386.c (fold_builtin_cpu): Handle cascadelake.
* doc/extend.texi: Add cascadelake.
gcc/testsuite/ChangeLog
2018-12-18 Wei Xiao <wei3.xiao@intel.com>
* g++.target/i386/mv16.C: Handle new march.
* gcc.target/i386/builtin_target.c: Ditto.
libgcc/ChangeLog
2018-12-18 Wei Xiao <wei3.xiao@intel.com>
* config/i386/cpuinfo.c (get_intel_cpu): Handle cascadelake.
* config/i386/cpuinfo.h: Add INTEL_COREI7_CASCADELAKE.
From-SVN: r267226
Diffstat (limited to 'libgcc')
| -rw-r--r-- | libgcc/ChangeLog | 5 | ||||
| -rw-r--r-- | libgcc/config/i386/cpuinfo.c | 14 | ||||
| -rw-r--r-- | libgcc/config/i386/cpuinfo.h | 1 |
3 files changed, 17 insertions, 3 deletions
diff --git a/libgcc/ChangeLog b/libgcc/ChangeLog index 24b7c9a..2075567 100644 --- a/libgcc/ChangeLog +++ b/libgcc/ChangeLog @@ -1,3 +1,8 @@ +2018-12-18 Wei Xiao <wei3.xiao@intel.com> + + * config/i386/cpuinfo.c (get_intel_cpu): Handle cascadelake. + * config/i386/cpuinfo.h: Add INTEL_COREI7_CASCADELAKE. + 2018-12-12 Rasmus Villemoes <rv@rasmusvillemoes.dk> * config/rs6000/tramp.S (__trampoline_setup): Also emit .size diff --git a/libgcc/config/i386/cpuinfo.c b/libgcc/config/i386/cpuinfo.c index 09f4d6f..3a56315 100644 --- a/libgcc/config/i386/cpuinfo.c +++ b/libgcc/config/i386/cpuinfo.c @@ -215,9 +215,17 @@ get_intel_cpu (unsigned int family, unsigned int model, unsigned int brand_id) __cpu_model.__cpu_subtype = INTEL_COREI7_SKYLAKE; break; case 0x55: - /* Skylake with AVX-512 support. */ - __cpu_model.__cpu_type = INTEL_COREI7; - __cpu_model.__cpu_subtype = INTEL_COREI7_SKYLAKE_AVX512; + { + unsigned int eax, ebx, ecx, edx; + __cpu_model.__cpu_type = INTEL_COREI7; + __cpuid_count (7, 0, eax, ebx, ecx, edx); + if (ecx & bit_AVX512VNNI) + /* Cascade Lake. */ + __cpu_model.__cpu_subtype = INTEL_COREI7_CASCADELAKE; + else + /* Skylake with AVX-512 support. */ + __cpu_model.__cpu_subtype = INTEL_COREI7_SKYLAKE_AVX512; + } break; case 0x66: /* Cannon Lake. */ diff --git a/libgcc/config/i386/cpuinfo.h b/libgcc/config/i386/cpuinfo.h index ac9c348..e731252 100644 --- a/libgcc/config/i386/cpuinfo.h +++ b/libgcc/config/i386/cpuinfo.h @@ -76,6 +76,7 @@ enum processor_subtypes INTEL_COREI7_ICELAKE_CLIENT, INTEL_COREI7_ICELAKE_SERVER, AMDFAM17H_ZNVER2, + INTEL_COREI7_CASCADELAKE, CPU_SUBTYPE_MAX }; |