Enable support for bfloat16 which will be in Future Cooper Lake.

There are 3 instructions for AVX512BF16: VCVTNE2PS2BF16, VCVTNEPS2BF16 and
DPBF16PS instructions, which are Vector Neural Network Instructions
supporting:
    
- VCVTNE2PS2BF16: Convert Two Packed Single Data to One Packed BF16 Data.
- VCVTNEPS2BF16: Convert Packed Single Data to Packed BF16 Data.
- VDPBF16PS: Dot Product of BF16 Pairs Accumulated into Packed Single Precision.

2019-05-07  Wei Xiao  <wei3.xiao@intel.com>

	* common/config/i386/i386-common.c (OPTION_MASK_ISA_AVX512BF16_SET
	OPTION_MASK_ISA_AVX512BF16_UNSET, OPTION_MASK_ISA2_AVX512BW_UNSET): New.
	(OPTION_MASK_ISA2_AVX512F_UNSET): Add OPTION_MASK_ISA_AVX512BF16_UNSET.
	(ix86_handle_option): Handle -mavx512bf16.
	* config.gcc: Add avx512bf16vlintrin.h and avx512bf16intrin.h
	to extra_headers.
	* config/i386/avx512bf16vlintrin.h: New.
	* config/i386/avx512bf16intrin.h: New.
	* config/i386/cpuid.h (bit_AVX512BF16): New.
	* config/i386/driver-i386.c (host_detect_local_cpu): Detect BF16.
	* config/i386/i386-builtin-types.def: Add new types.
	* config/i386/i386-builtin.def: Add new builtins.
	* config/i386/i386-c.c (ix86_target_macros_internal): Define
	__AVX512BF16__.
	* config/i386/i386-option.c (ix86_target_string): Add -mavx512bf16.
	(ix86_option_override_internal): Handle BF16.
	(ix86_valid_target_attribute_inner_p): Ditto.
	* config/i386/i386-expand.c (ix86_expand_args_builtin): Ditto.
	* config/i386/i386-builtin.c (enum processor_features): Add
	F_AVX512BF16.
	(static const _isa_names_table isa_names_table): Ditto.
	* config/i386/i386.h (TARGET_AVX512BF16, TARGET_AVX512BF16_P): New.
	(PTA_AVX512BF16): Ditto.
	* config/i386/i386.opt: Add -mavx512bf16.
	* config/i386/immintrin.h: Include avx512bf16intrin.h
	and avx512bf16vlintrin.h.
	* config/i386/sse.md (avx512f_cvtne2ps2bf16_<mode><mask_name>,
	avx512f_cvtneps2bf16_<mode><mask_name>,
	avx512f_dpbf16ps_<mode><mask_half_name>): New define_insn patterns.
	* config/i386/subst.md (mask_half): Add new subst.
	* doc/invoke.texi: Document -mavx512bf16.

2019-05-07  Wei Xiao  <wei3.xiao@intel.com>

	* gcc.target/i386/avx512bf16-vcvtne2ps2bf16-1.c: New test.
	* gcc.target/i386/avx512bf16-vcvtneps2bf16-1.c: New test.
	* gcc.target/i386/avx512bf16-vdpbf16ps-1.c: New test.
	* gcc.target/i386/avx512bf16vl-vcvtne2ps2bf16-1.c: New test.
	* gcc.target/i386/avx512bf16vl-vcvtneps2bf16-1.c: New test.
	* gcc.target/i386/avx512bf16vl-vdpbf16ps-1.c: New test.
	* gcc.target/i386/builtin_target.c: Handle avx512bf16.
	* gcc.target/i386/sse-12.c: Add -mavx512bf16.
	* gcc.target/i386/sse-13.c: Ditto.
	* gcc.target/i386/sse-14.c: Ditto.
	* gcc.target/i386/sse-22.c: Ditto.
	* gcc.target/i386/sse-23.c: Ditto.
	* g++.dg/other/i386-2.C: Ditto.
	* g++.dg/other/i386-3.C: Ditto.

2019-05-07  Hongtao Liu  <hongtao.liu@intel.com>

	* config/i386/cpuinfo.c (get_available_features): Detect BF16.
	* config/i386/cpuinfo.h (enum processor_features): Add
	FEATURE_AVX512BF16.

From-SVN: r271006

3 files changed, 13 insertions, 2 deletions

diff --git a/libgcc/ChangeLog b/libgcc/ChangeLog
index 30e4da4..c3c7a16 100644
--- a/libgcc/ChangeLog
+++ b/libgcc/ChangeLog
@@ -1,3 +1,9 @@
+2019-05-07  Hongtao Liu  <hongtao.liu@intel.com>
+
+	* config/i386/cpuinfo.c (get_available_features): Detect BF16.
+	* config/i386/cpuinfo.h (enum processor_features): Add
+	FEATURE_AVX512BF16.
+
 2019-04-23  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
 	    Bernd Edlinger  <bernd.edlinger@hotmail.de>
 	    Jakub Jelinek  <jakub@redhat.com>
diff --git a/libgcc/config/i386/cpuinfo.c b/libgcc/config/i386/cpuinfo.c
index d6cb2de..5659ec8 100644
--- a/libgcc/config/i386/cpuinfo.c
+++ b/libgcc/config/i386/cpuinfo.c
@@ -336,7 +336,7 @@ get_available_features (unsigned int ecx, unsigned int edx,
 	set_feature (FEATURE_FMA);
     }
 
-  /* Get Advanced Features at level 7 (eax = 7, ecx = 0). */
+  /* Get Advanced Features at level 7 (eax = 7, ecx = 0/1). */
   if (max_cpuid_level >= 7)
     {
       __cpuid_count (7, 0, eax, ebx, ecx, edx);
@@ -385,6 +385,10 @@ get_available_features (unsigned int ecx, unsigned int edx,
 	    set_feature (FEATURE_AVX5124VNNIW);
 	  if (edx & bit_AVX5124FMAPS)
 	    set_feature (FEATURE_AVX5124FMAPS);
+
+	  __cpuid_count (7, 1, eax, ebx, ecx, edx);
+	  if (eax & bit_AVX512BF16)
+	    set_feature (FEATURE_AVX512BF16);
 	}
     }
 
diff --git a/libgcc/config/i386/cpuinfo.h b/libgcc/config/i386/cpuinfo.h
index b4492eb..68ca466 100644
--- a/libgcc/config/i386/cpuinfo.h
+++ b/libgcc/config/i386/cpuinfo.h
@@ -119,7 +119,8 @@ enum processor_features
   FEATURE_GFNI,
   FEATURE_VPCLMULQDQ,
   FEATURE_AVX512VNNI,
-  FEATURE_AVX512BITALG
+  FEATURE_AVX512BITALG,
+  FEATURE_AVX512BF16
 };
 
 extern struct __processor_model