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author | Monk Chiang <monk.chiang@sifive.com> | 2024-03-22 21:10:07 +0800 |
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committer | Monk Chiang <monk.chiang@sifive.com> | 2025-01-17 10:54:44 +0800 |
commit | 2b3efe793e9ecf0f98da1daa85a091e931b4ca04 (patch) | |
tree | d79e2b73d09da58f2bd4ccb564393bdfe700d06f /libgcc | |
parent | 805a052d0083e8e76c720fd7ac52cb3ccc36c310 (diff) | |
download | gcc-2b3efe793e9ecf0f98da1daa85a091e931b4ca04.zip gcc-2b3efe793e9ecf0f98da1daa85a091e931b4ca04.tar.gz gcc-2b3efe793e9ecf0f98da1daa85a091e931b4ca04.tar.bz2 |
RISC-V: Add .note.gnu.property for ZICFILP and ZICFISS ISA extension
gcc/ChangeLog:
* config/riscv/riscv.cc
(riscv_file_end): Add .note.gnu.property.
libgcc/ChangeLog:
* config/riscv/crti.S: Add lpad instructions.
* config/riscv/crtn.S: Likewise.
* config/riscv/save-restore.S: Likewise.
* config/riscv/riscv-asm.h: Add GNU_PROPERTY for ZICFILP,
ZICFISS.
Co-Developed-by: Jesse Huang <jesse.huang@sifive.com>
Diffstat (limited to 'libgcc')
-rw-r--r-- | libgcc/config/riscv/crti.S | 2 | ||||
-rw-r--r-- | libgcc/config/riscv/crtn.S | 2 | ||||
-rw-r--r-- | libgcc/config/riscv/riscv-asm.h | 69 | ||||
-rw-r--r-- | libgcc/config/riscv/save-restore.S | 5 |
4 files changed, 77 insertions, 1 deletions
diff --git a/libgcc/config/riscv/crti.S b/libgcc/config/riscv/crti.S index 89bac70..3a67fd7 100644 --- a/libgcc/config/riscv/crti.S +++ b/libgcc/config/riscv/crti.S @@ -1 +1,3 @@ /* crti.S is empty because .init_array/.fini_array are used exclusively. */ + +#include "riscv-asm.h" diff --git a/libgcc/config/riscv/crtn.S b/libgcc/config/riscv/crtn.S index ca6ee7b..cb80782 100644 --- a/libgcc/config/riscv/crtn.S +++ b/libgcc/config/riscv/crtn.S @@ -1 +1,3 @@ /* crtn.S is empty because .init_array/.fini_array are used exclusively. */ + +#include "riscv-asm.h" diff --git a/libgcc/config/riscv/riscv-asm.h b/libgcc/config/riscv/riscv-asm.h index b6dbeae..73bddb3 100644 --- a/libgcc/config/riscv/riscv-asm.h +++ b/libgcc/config/riscv/riscv-asm.h @@ -23,9 +23,11 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see #define FUNC_SIZE(X) .size X,.-X #define FUNC_BEGIN(X) \ + .align 2; \ .globl X; \ FUNC_TYPE (X); \ -X: +X: \ + LPAD #define FUNC_END(X) \ FUNC_SIZE(X) @@ -39,3 +41,68 @@ X: #define HIDDEN_JUMPTARGET(X) CONCAT1(__hidden_, X) #define HIDDEN_DEF(X) FUNC_ALIAS(HIDDEN_JUMPTARGET(X), X); \ .hidden HIDDEN_JUMPTARGET(X) + +/* GNU_PROPERTY_RISCV64_* macros from elf.h for use in asm code. */ +#define FEATURE_1_AND 0xc0000000 +#define FEATURE_1_FCFI 1 +#define FEATURE_1_BCFI 2 + +/* Add a NT_GNU_PROPERTY_TYPE_0 note. */ +#if __riscv_xlen == 32 +# define GNU_PROPERTY(type, value) \ + .section .note.gnu.property, "a"; \ + .p2align 2; \ + .word 4; \ + .word 12; \ + .word 5; \ + .asciz "GNU"; \ + .word type; \ + .word 4; \ + .word value; \ + .text +#else +# define GNU_PROPERTY(type, value) \ + .section .note.gnu.property, "a"; \ + .p2align 3; \ + .word 4; \ + .word 16; \ + .word 5; \ + .asciz "GNU"; \ + .word type; \ + .word 4; \ + .word value; \ + .word 0; \ + .text +#endif + +/* Add GNU property note with the supported features to all asm code + where sysdep.h is included. */ +#undef __VALUE_FOR_FEATURE_1_AND +#if defined (__riscv_zicfilp) || defined (__riscv_zicfiss) +# if defined (__riscv_zicfilp) +# if defined (__riscv_zicfiss) +# define __VALUE_FOR_FEATURE_1_AND 0x3 +# else +# define __VALUE_FOR_FEATURE_1_AND 0x1 +# endif +# else +# if defined (__riscv_zicfiss) +# define __VALUE_FOR_FEATURE_1_AND 0x2 +# else +# error "What?" +# endif +# endif +#endif + +#if defined (__VALUE_FOR_FEATURE_1_AND) +GNU_PROPERTY (FEATURE_1_AND, __VALUE_FOR_FEATURE_1_AND) +#endif +#undef __VALUE_FOR_FEATURE_1_AND + +#ifdef __riscv_zicfilp +# define SET_LPAD lui t2, 0 +# define LPAD lpad 0 +#else +# define SET_LPAD +# define LPAD +#endif diff --git a/libgcc/config/riscv/save-restore.S b/libgcc/config/riscv/save-restore.S index ae8312d..fc65447 100644 --- a/libgcc/config/riscv/save-restore.S +++ b/libgcc/config/riscv/save-restore.S @@ -137,6 +137,7 @@ FUNC_BEGIN (__riscv_save_2) # CFA info is not correct in next 2 instruction since t1's # value is depend on how may register really save. add sp, sp, t1 + SET_LPAD jr t0 .cfi_endproc FUNC_END (__riscv_save_12) @@ -162,6 +163,7 @@ FUNC_BEGIN (__riscv_save_0) .cfi_offset 8, -16 sd ra, 8(sp) .cfi_offset 1, -8 + SET_LPAD jr t0 .cfi_endproc FUNC_END (__riscv_save_1) @@ -310,6 +312,7 @@ FUNC_BEGIN(__riscv_save_0) .cfi_offset 8, -8 sw ra, 8(sp) .cfi_offset 1, -4 + SET_LPAD jr t0 .cfi_endproc FUNC_END(__riscv_save_2) @@ -399,6 +402,7 @@ FUNC_BEGIN (__riscv_save_4) # CFA info is not correct in next 2 instruction since t1's # value is depend on how may register really save. sub sp, sp, t1 + SET_LPAD jr t0 .cfi_endproc FUNC_END (__riscv_save_12) @@ -428,6 +432,7 @@ FUNC_BEGIN (__riscv_save_0) .cfi_offset 8, -8 sw ra, 12(sp) .cfi_offset 1, -4 + SET_LPAD jr t0 .cfi_endproc FUNC_END (__riscv_save_3) |