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author | Kito Cheng <kito.cheng@sifive.com> | 2022-07-04 20:17:47 +0800 |
---|---|---|
committer | Kito Cheng <kito.cheng@sifive.com> | 2022-08-16 23:34:20 +0800 |
commit | 27d68a60783b52504a08503d3fe12054de104241 (patch) | |
tree | 1dfae8996fc876b3030172e481b3d0943e529b2b /libgcc | |
parent | e230261073950e554319f56716d2b17c09a28658 (diff) | |
download | gcc-27d68a60783b52504a08503d3fe12054de104241.zip gcc-27d68a60783b52504a08503d3fe12054de104241.tar.gz gcc-27d68a60783b52504a08503d3fe12054de104241.tar.bz2 |
RISC-V: Support _Float16 type.
RISC-V decide use _Float16 as primary IEEE half precision type, and this
already become part of psABI, this patch has added folloing support for
_Float16:
- Soft-float support for _Float16.
- Make sure _Float16 available on C++ mode.
- Name mangling for _Float16 on C++ mode.
gcc/ChangeLog
* config/riscv/riscv-builtins.cc: include stringpool.h
(riscv_float16_type_node): New.
(riscv_init_builtin_types): Ditto.
(riscv_init_builtins): Call riscv_init_builtin_types.
* config/riscv/riscv-modes.def (HF): New.
* config/riscv/riscv.cc (riscv_output_move): Handle HFmode.
(riscv_mangle_type): New.
(riscv_scalar_mode_supported_p): Ditto.
(riscv_libgcc_floating_mode_supported_p): Ditto.
(riscv_excess_precision): Ditto.
(riscv_floatn_mode): Ditto.
(riscv_init_libfuncs): Ditto.
(TARGET_MANGLE_TYPE): Ditto.
(TARGET_SCALAR_MODE_SUPPORTED_P): Ditto.
(TARGET_LIBGCC_FLOATING_MODE_SUPPORTED_P): Ditto.
(TARGET_INIT_LIBFUNCS): Ditto.
(TARGET_C_EXCESS_PRECISION): Ditto.
(TARGET_FLOATN_MODE): Ditto.
* config/riscv/riscv.md (mode): Add HF.
(softload): Add HF.
(softstore): Ditto.
(fmt): Ditto.
(UNITMODE): Ditto.
(movhf): New.
(*movhf_softfloat): New.
libgcc/ChangeLog:
* config/riscv/sfp-machine.h (_FP_NANFRAC_H): New.
(_FP_NANFRAC_H): Ditto.
(_FP_NANSIGN_H): Ditto.
* config/riscv/t-softfp32 (softfp_extensions): Add HF related
routines.
(softfp_truncations): Ditto.
(softfp_extras): Ditto.
* config/riscv/t-softfp64 (softfp_extras): Add HF related routines.
gcc/testsuite/ChangeLog:
* g++.target/riscv/_Float16.C: New.
* gcc.target/riscv/_Float16-soft-1.c: Ditto.
* gcc.target/riscv/_Float16-soft-2.c: Ditto.
* gcc.target/riscv/_Float16-soft-3.c: Ditto.
* gcc.target/riscv/_Float16-soft-4.c: Ditto.
* gcc.target/riscv/_Float16.c: Ditto.
Diffstat (limited to 'libgcc')
-rw-r--r-- | libgcc/config/riscv/sfp-machine.h | 3 | ||||
-rw-r--r-- | libgcc/config/riscv/t-softfp32 | 5 | ||||
-rw-r--r-- | libgcc/config/riscv/t-softfp64 | 1 |
3 files changed, 9 insertions, 0 deletions
diff --git a/libgcc/config/riscv/sfp-machine.h b/libgcc/config/riscv/sfp-machine.h index 27fbe6e..b2901f0 100644 --- a/libgcc/config/riscv/sfp-machine.h +++ b/libgcc/config/riscv/sfp-machine.h @@ -41,6 +41,7 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see #define _FP_DIV_MEAT_D(R,X,Y) _FP_DIV_MEAT_2_udiv(D,R,X,Y) #define _FP_DIV_MEAT_Q(R,X,Y) _FP_DIV_MEAT_4_udiv(Q,R,X,Y) +#define _FP_NANFRAC_H _FP_QNANBIT_H #define _FP_NANFRAC_S _FP_QNANBIT_S #define _FP_NANFRAC_D _FP_QNANBIT_D, 0 #define _FP_NANFRAC_Q _FP_QNANBIT_Q, 0, 0, 0 @@ -63,6 +64,7 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see #define _FP_DIV_MEAT_D(R,X,Y) _FP_DIV_MEAT_1_udiv_norm(D,R,X,Y) #define _FP_DIV_MEAT_Q(R,X,Y) _FP_DIV_MEAT_2_udiv(Q,R,X,Y) +#define _FP_NANFRAC_H _FP_QNANBIT_H #define _FP_NANFRAC_S _FP_QNANBIT_S #define _FP_NANFRAC_D _FP_QNANBIT_D #define _FP_NANFRAC_Q _FP_QNANBIT_Q, 0 @@ -80,6 +82,7 @@ typedef unsigned int UTItype __attribute__ ((mode (TI))); typedef int __gcc_CMPtype __attribute__ ((mode (__libgcc_cmp_return__))); #define CMPtype __gcc_CMPtype +#define _FP_NANSIGN_H 0 #define _FP_NANSIGN_S 0 #define _FP_NANSIGN_D 0 #define _FP_NANSIGN_Q 0 diff --git a/libgcc/config/riscv/t-softfp32 b/libgcc/config/riscv/t-softfp32 index 59be1df..55261f9 100644 --- a/libgcc/config/riscv/t-softfp32 +++ b/libgcc/config/riscv/t-softfp32 @@ -41,3 +41,8 @@ else softfp_extras := divsf3 divdf3 divtf3 endif + +softfp_extensions += hfsf hfdf hftf +softfp_truncations += tfhf dfhf sfhf +softfp_extras += fixhfsi fixhfdi fixunshfsi fixunshfdi \ + floatsihf floatdihf floatunsihf floatundihf diff --git a/libgcc/config/riscv/t-softfp64 b/libgcc/config/riscv/t-softfp64 index 7587095..c87d242 100644 --- a/libgcc/config/riscv/t-softfp64 +++ b/libgcc/config/riscv/t-softfp64 @@ -1,3 +1,4 @@ include $(srcdir)/config/riscv/t-softfp32 softfp_int_modes += ti +softfp_extras += fixhfti fixunshfti floattihf floatuntihf |