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authorChristophe Lyon <christophe.lyon@arm.com>2022-03-11 16:21:02 +0000
committerChristophe Lyon <christophe.lyon@arm.com>2022-05-20 09:32:22 +0200
commit0dc8e1e7026d9b8ec8b669c051786d426a52cd22 (patch)
treea988cc916ad210104d4c0f9a8fb8701ece30e809 /libgcc
parentafd82c104b1038572ed4d473a0b5f6e2c778fa01 (diff)
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aarch64: Add backend support for DFP
This patch updates the aarch64 backend as needed to support DFP modes (SD, DD and TD). Changes v1->v2: * Drop support for DFP modes in aarch64_gen_{load||store}[wb]_pair as these are only used in prologue/epilogue where DFP modes are not used. Drop the changes to the corresponding patterns in aarch64.md, and useless GPF_PAIR iterator. * In aarch64_reinterpret_float_as_int, handle DDmode the same way as DFmode (needed in case the representation of the floating-point value can be loaded using mov/movk. * In aarch64_float_const_zero_rtx_p, reject constants with DFP mode: when X is zero, the callers want to emit either '0' or 'zr' depending on the context, which is not the way 0.0 is represented in DFP mode (in particular fmov d0, #0 is not right for DFP). * In aarch64_legitimate_constant_p, accept DFP 2022-03-31 Christophe Lyon <christophe.lyon@arm.com> gcc/ * config/aarch64/aarch64.cc (aarch64_split_128bit_move): Handle DFP modes. (aarch64_mode_valid_for_sched_fusion_p): Likewise. (aarch64_classify_address): Likewise. (aarch64_legitimize_address_displacement): Likewise. (aarch64_reinterpret_float_as_int): Likewise. (aarch64_float_const_zero_rtx_p): Likewise. (aarch64_can_const_movi_rtx_p): Likewise. (aarch64_anchor_offset): Likewise. (aarch64_secondary_reload): Likewise. (aarch64_rtx_costs): Likewise. (aarch64_legitimate_constant_p): Likewise. (aarch64_gimplify_va_arg_expr): Likewise. (aapcs_vfp_sub_candidate): Likewise. (aarch64_vfp_is_call_or_return_candidate): Likewise. (aarch64_output_scalar_simd_mov_immediate): Likewise. (aarch64_gen_adjusted_ldpstp): Likewise. (aarch64_scalar_mode_supported_p): Accept DFP modes if enabled. * config/aarch64/aarch64.md (movsf_aarch64): Use SFD iterator and rename into mov<mode>_aarch64. (movdf_aarch64): Use DFD iterator and rename into mov<mode>_aarch64. (movtf_aarch64): Use TFD iterator and rename into mov<mode>_aarch64. (split pattern for move TF mode): Use TFD iterator. * config/aarch64/iterators.md (GPF_TF_F16_MOV): Add DFP modes. (SFD, DFD, TFD): New iterators. (GPF_TF): Add DFP modes. (TX, DX, DX2): Likewise.
Diffstat (limited to 'libgcc')
0 files changed, 0 insertions, 0 deletions