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| author | Patrick O'Neill <patrick@rivosinc.com> | 2023-04-05 09:44:57 -0700 |
|---|---|---|
| committer | Patrick O'Neill <patrick@rivosinc.com> | 2023-05-02 13:08:03 -0700 |
| commit | dcd7b2f5f7233a04c8b14b362d0befa76e9654c0 (patch) | |
| tree | 717b2c6a6faf3903b915f2bd49f1194a77ab8c15 /libgcc/config/riscv | |
| parent | f37a36bce81b50a43ec1613c1d08d803642f7506 (diff) | |
| download | gcc-dcd7b2f5f7233a04c8b14b362d0befa76e9654c0.zip gcc-dcd7b2f5f7233a04c8b14b362d0befa76e9654c0.tar.gz gcc-dcd7b2f5f7233a04c8b14b362d0befa76e9654c0.tar.bz2 | |
RISC-V: Enforce Libatomic LR/SC SEQ_CST
Replace LR.aq/SC.rl pairs with the SEQ_CST LR.aqrl/SC.rl pairs
recommended by table A.6 of the ISA manual.
2023-04-27 Patrick O'Neill <patrick@rivosinc.com>
libgcc/ChangeLog:
* config/riscv/atomic.c: Change LR.aq/SC.rl pairs into
sequentially consistent LR.aqrl/SC.rl pairs.
Signed-off-by: Patrick O'Neill <patrick@rivosinc.com>
Diffstat (limited to 'libgcc/config/riscv')
| -rw-r--r-- | libgcc/config/riscv/atomic.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/libgcc/config/riscv/atomic.c b/libgcc/config/riscv/atomic.c index 573d163..bd2b033 100644 --- a/libgcc/config/riscv/atomic.c +++ b/libgcc/config/riscv/atomic.c @@ -41,7 +41,7 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see unsigned old, tmp1, tmp2; \ \ asm volatile ("1:\n\t" \ - "lr.w.aq %[old], %[mem]\n\t" \ + "lr.w.aqrl %[old], %[mem]\n\t" \ #insn " %[tmp1], %[old], %[value]\n\t" \ invert \ "and %[tmp1], %[tmp1], %[mask]\n\t" \ @@ -75,7 +75,7 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see unsigned old, tmp1; \ \ asm volatile ("1:\n\t" \ - "lr.w.aq %[old], %[mem]\n\t" \ + "lr.w.aqrl %[old], %[mem]\n\t" \ "and %[tmp1], %[old], %[mask]\n\t" \ "bne %[tmp1], %[o], 1f\n\t" \ "and %[tmp1], %[old], %[not_mask]\n\t" \ |