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author | Kito Cheng <kito.cheng@sifive.com> | 2022-10-21 17:37:01 +0800 |
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committer | Kito Cheng <kito.cheng@sifive.com> | 2023-02-13 10:40:46 +0800 |
commit | 89367e794613bdeb21df3e6fc0215f0acd553ef8 (patch) | |
tree | 65ea9e1a31a4e4d98aa0d947b5bf3d27f6ad097b /libgcc/config/riscv | |
parent | 22ba8570e6343e10e4a82e837166e181a1abb21b (diff) | |
download | gcc-89367e794613bdeb21df3e6fc0215f0acd553ef8.zip gcc-89367e794613bdeb21df3e6fc0215f0acd553ef8.tar.gz gcc-89367e794613bdeb21df3e6fc0215f0acd553ef8.tar.bz2 |
RISC-V: Handle vlenb correctly in unwinding
gcc/ChangeLog:
* config/riscv/riscv.h (RISCV_DWARF_VLENB): New.
(DWARF_FRAME_REGISTERS): New.
(DWARF_REG_TO_UNWIND_COLUMN): New.
libgcc/ChangeLog:
* config.host (riscv*-*-*): Add config/riscv/value-unwind.h.
* config/riscv/value-unwind.h: New.
Diffstat (limited to 'libgcc/config/riscv')
-rw-r--r-- | libgcc/config/riscv/value-unwind.h | 39 |
1 files changed, 39 insertions, 0 deletions
diff --git a/libgcc/config/riscv/value-unwind.h b/libgcc/config/riscv/value-unwind.h new file mode 100644 index 0000000..d7efdc1 --- /dev/null +++ b/libgcc/config/riscv/value-unwind.h @@ -0,0 +1,39 @@ +/* Store register values as _Unwind_Word type in DWARF2 EH unwind context. + Copyright (C) 2023 Free Software Foundation, Inc. + + This file is part of GCC. + + GCC is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published + by the Free Software Foundation; either version 3, or (at your + option) any later version. + + GCC is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public + License for more details. + + Under Section 7 of GPL version 3, you are granted additional + permissions described in the GCC Runtime Library Exception, version + 3.1, as published by the Free Software Foundation. + + You should have received a copy of the GNU General Public License and + a copy of the GCC Runtime Library Exception along with this program; + see the files COPYING3 and COPYING.RUNTIME respectively. If not, see + <http://www.gnu.org/licenses/>. */ + +/* Return the value of the VLENB register. This should only be + called if we know this is an vector extension enabled RISC-V host. */ +static inline long +riscv_vlenb (void) +{ + register long vlenb asm ("a0"); + /* 0xc2202573 == csrr a0, 0xc22 */ + asm (".insn 0xc2202573" : "=r"(vlenb)); + return vlenb; +} + +/* Lazily provide a value for VLENB, so that we don't try to execute RVV + instructions unless we know they're needed. */ +#define DWARF_LAZY_REGISTER_VALUE(REGNO, VALUE) \ + ((REGNO) == RISCV_DWARF_VLENB && ((*VALUE) = riscv_vlenb (), 1)) |