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author | Craig Blackmore <craig.blackmore@embecosm.com> | 2024-11-04 13:55:19 -0700 |
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committer | Jeff Law <jlaw@ventanamicro.com> | 2024-11-04 13:55:19 -0700 |
commit | b30c6a5eabaf476663f1a1e41165967e782eccd3 (patch) | |
tree | 757153dde1595a5305c825c9673ff70279934af3 /libgcc/config/nds32/isr-library/jmptbl_vid20.S | |
parent | fe97ac43e05a8da8a12fbad2208a1ebb19d2d6c9 (diff) | |
download | gcc-master.zip gcc-master.tar.gz gcc-master.tar.bz2 |
`expand_vec_setmem` only generated vectorized memset if it fitted into a
single vector store of at least (TARGET_MIN_VLEN / 8) bytes. Also,
without dynamic LMUL the operation was always TARGET_MAX_LMUL even if it
would have fitted a smaller LMUL.
Allow vectorized memset to be generated for smaller lengths and smaller
LMUL by switching to using use_vector_string_op. Smaller LMUL can be
seen in setmem-3.c:f3. Smaller lengths will be seen after the second
patch in this series which selectively disables by pieces.
gcc/ChangeLog:
* config/riscv/riscv-string.cc
(use_vector_stringop_p): Add comment.
(expand_vec_setmem): Use use_vector_stringop_p instead of
check_vectorise_memory_operation.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/base/setmem-3.c: Expect smaller lmul.
Diffstat (limited to 'libgcc/config/nds32/isr-library/jmptbl_vid20.S')
0 files changed, 0 insertions, 0 deletions