diff options
| author | GCC Administrator <gccadmin@gcc.gnu.org> | 2023-01-24 00:17:23 +0000 |
|---|---|---|
| committer | GCC Administrator <gccadmin@gcc.gnu.org> | 2023-01-24 00:17:23 +0000 |
| commit | 607f278a3546fe6b91a881318db85d7a0dfdacd9 (patch) | |
| tree | 35b39951556201936a1b570cc0bcd9c561553f29 /libgcc/ChangeLog | |
| parent | 4cbc71691e47b1ca6b64feb0af678606705d2f92 (diff) | |
| download | gcc-607f278a3546fe6b91a881318db85d7a0dfdacd9.zip gcc-607f278a3546fe6b91a881318db85d7a0dfdacd9.tar.gz gcc-607f278a3546fe6b91a881318db85d7a0dfdacd9.tar.bz2 | |
Daily bump.
Diffstat (limited to 'libgcc/ChangeLog')
| -rw-r--r-- | libgcc/ChangeLog | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/libgcc/ChangeLog b/libgcc/ChangeLog index bd276ac..cefc8d2 100644 --- a/libgcc/ChangeLog +++ b/libgcc/ChangeLog @@ -1,3 +1,22 @@ +2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com> + + * config/arm/pr-support.c (__gnu_unwind_execute): Decode opcode + "0xb5". + +2023-01-23 Andrea Corallo <andrea.corallo@arm.com> + Tejas Belagod <tbelagod@arm.com> + Srinath Parvathaneni <srinath.parvathaneni@arm.com> + + * config/arm/pr-support.c (__gnu_unwind_execute): Decode + exception opcode (0xb4) for saving RA_AUTH_CODE and authenticate + with AUTG if found. + * config/arm/unwind-arm.c (struct pseudo_regs): New. + (phase1_vrs): Introduce new field to store pseudo-reg state. + (phase2_vrs): Likewise. + (_Unwind_VRS_Get): Load pseudo register state from virtual reg set. + (_Unwind_VRS_Set): Store pseudo register state to virtual reg set. + (_Unwind_VRS_Pop): Load pseudo register value from stack into VRS. + 2023-01-18 Wilco Dijkstra <wilco.dijkstra@arm.com> PR target/107678 |