RISC-V: Support VLS basic operation auto-vectorization

This patch support VLS modes auto-vectorization to enhance VLA auto-vectorization
when niters is known.

Consider this following case:

  void __attribute__ ((noinline, noclone))                                     \
  PREFIX##_##TYPE##NUM (TYPE *__restrict a, TYPE *__restrict b, TYPE *__restrict c)  \
  {                                                                            \
    for (int i = 0; i < NUM; ++i)                                              \
      a[i] = b[i] OP c[i];                                                     \
  }

DEF_OP_VV (plus, 16, int8_t, +)

Before this patch:

plus_int8_t16(signed char*, signed char*, signed char*):
        li      a5,16
        csrr    a4,vlenb
        bleu    a5,a4,.L2
        mv      a5,a4
.L2:
        vsetvli zero,a5,e8,m1,ta,ma
        vle8.v  v2,0(a1)
        vle8.v  v1,0(a2)
        vsetvli a4,zero,e8,m1,ta,ma
        vadd.vv v1,v1,v2
        vsetvli zero,a5,e8,m1,ta,ma
        vse8.v  v1,0(a0)
        ret

After this patch:

plus_int8_t16:
	vsetivli	zero,16,e8,m1,ta,ma
	vle8.v	v1,0(a2)
	vle8.v	v2,0(a1)
	vadd.vv	v1,v1,v2
	vse8.v	v1,0(a0)
	ret

gcc/ChangeLog:

	* config/riscv/autovec-vls.md (<optab><mode>3): Add VLS modes.
	* config/riscv/vector-iterators.md: Ditto.
	* config/riscv/vector.md: Ditto.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/autovec/vls/def.h: Add basic operations.
	* gcc.target/riscv/rvv/autovec/vls/and-1.c: New test.
	* gcc.target/riscv/rvv/autovec/vls/and-2.c: New test.
	* gcc.target/riscv/rvv/autovec/vls/and-3.c: New test.
	* gcc.target/riscv/rvv/autovec/vls/div-1.c: New test.
	* gcc.target/riscv/rvv/autovec/vls/ior-1.c: New test.
	* gcc.target/riscv/rvv/autovec/vls/ior-2.c: New test.
	* gcc.target/riscv/rvv/autovec/vls/ior-3.c: New test.
	* gcc.target/riscv/rvv/autovec/vls/max-1.c: New test.
	* gcc.target/riscv/rvv/autovec/vls/min-1.c: New test.
	* gcc.target/riscv/rvv/autovec/vls/minus-1.c: New test.
	* gcc.target/riscv/rvv/autovec/vls/minus-2.c: New test.
	* gcc.target/riscv/rvv/autovec/vls/minus-3.c: New test.
	* gcc.target/riscv/rvv/autovec/vls/mod-1.c: New test.
	* gcc.target/riscv/rvv/autovec/vls/mult-1.c: New test.
	* gcc.target/riscv/rvv/autovec/vls/plus-1.c: New test.
	* gcc.target/riscv/rvv/autovec/vls/plus-2.c: New test.
	* gcc.target/riscv/rvv/autovec/vls/plus-3.c: New test.

0 files changed, 0 insertions, 0 deletions