aix.S: Update AIX32 code to be consistent with AIX64 code.

        * src/powerpc/aix.S: Update AIX32 code to be consistent with AIX64
        code.
        * src/powerpc/aix_closure.s: Same.

From-SVN: r155016

3 files changed, 191 insertions, 174 deletions

diff --git a/libffi/ChangeLog b/libffi/ChangeLog
index d0867ed..966b3d8 100644
--- a/libffi/ChangeLog
+++ b/libffi/ChangeLog
@@ -1,3 +1,9 @@
+2009-12-05  David Edelsohn  <edelsohn@gnu.org>
+
+	* src/powerpc/aix.S: Update AIX32 code to be consistent with AIX64
+	code.
+	* src/powerpc/aix_closure.s: Same.
+	
 2009-12-05  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 
 	* Makefile.in: Regenerate.
diff --git a/libffi/src/powerpc/aix.S b/libffi/src/powerpc/aix.S
index 5b477ca..c6f8764 100644
--- a/libffi/src/powerpc/aix.S
+++ b/libffi/src/powerpc/aix.S
@@ -124,11 +124,12 @@ ffi_call_AIX:
 
 	/* Call ffi_prep_args.  */
 	mr	r4, r1
-	bl .ffi_prep_args
+	bl	.ffi_prep_args
 
 	/* Now do the call.  */
 	ld	r0, 0(r29)
 	ld	r2, 8(r29)
+	ld	r11, 16(r29)
 	/* Set up cr1 with bits 4-7 of the flags.  */
 	mtcrf	0x40, r31
 	mtctr	r0
@@ -182,21 +183,21 @@ L(done_return_value):
 	/* Restore the registers we used and return.  */
 	mr	r1, r28
 	ld	r0, 16(r28)
-	ld	r28,-32(r1)
+	ld	r28, -32(r1)
 	mtlr	r0
-	ld	r29,-24(r1)
-	ld	r30,-16(r1)
-	ld	r31,-8(r1)
+	ld	r29, -24(r1)
+	ld	r30, -16(r1)
+	ld	r31, -8(r1)
 	blr
 
 L(fp_return_value):
-	bf	28,L(float_return_value)
-	stfd	f1,0(r30)
-	bf	31,L(done_return_value)
-	stfd	f2,8(r30)
+	bf	28, L(float_return_value)
+	stfd	f1, 0(r30)
+	bf	31, L(done_return_value)
+	stfd	f2, 8(r30)
 	b	L(done_return_value)
 L(float_return_value):
-	stfs	f1,0(r30)
+	stfs	f1, 0(r30)
 	b	L(done_return_value)
 
 #else /* ! __64BIT__ */
@@ -204,47 +205,35 @@ L(float_return_value):
 	.long .ffi_call_AIX, TOC[tc0], 0
 	.csect .text[PR]
 .ffi_call_AIX:
-	mr	r12,r8 // We only need r12 until the call, so it doesn't have to be saved...
-	/* Save the old stack pointer as AP.  */
-	mr	r8,r1
-
-	/* Allocate the stack space we need.  */
-	stwux	r1,r1,r4
-
 	/* Save registers we use.  */
-	mflr	r9
+	mflr	r0
 
-	stw	r28,-16(r8)
-	stw	r29,-12(r8)
-	stw	r30, -8(r8)
-	stw	r31, -4(r8)
+	stw	r28,-16(r1)
+	stw	r29,-12(r1)
+	stw	r30, -8(r1)
+	stw	r31, -4(r1)
 
-	stw	r9,  8(r8)
-	stw	r2, 20(r1)
+	stw	r0, 8(r1)
+	mr	r28, r1		/* out AP.  */
+	stwux	r1, r1, r4
 
 	/* Save arguments over call...  */
-	mr	r31,r5	/* flags, */
-	mr	r30,r6	/* rvalue, */
-	mr	r29,r7	/* function address, */
-	mr	r28,r8	/* our AP. */
+	mr	r31, r5	/* flags, */
+	mr	r30, r6	/* rvalue, */
+	mr	r29, r7	/* function address, */
+	stw	r2, 20(r1)
 
 	/* Call ffi_prep_args.  */
-	mr	r4,r1
-	li	r9,0
-
-	lwz	r2,4(r12)
-	lwz	r12,0(r12)
-	mtctr	r12 // r12 holds address of _ffi_prep_args
-	bctrl
-	lwz     r2,20(r1)
+	mr	r4, r1
+	bl	.ffi_prep_args
 
 	/* Now do the call.  */
-	lwz	r12,0(r29)
+	lwz	r0, 0(r29)
+	lwz	r2, 4(r29)
+	lwz	r11, 8(r29)
 	/* Set up cr1 with bits 4-7 of the flags.  */
-	mtcrf	0x40,r31
-	stw	r2,20(r1)
-	mtctr	r12
-	lwz	r2,4(r29)
+	mtcrf	0x40, r31
+	mtctr	r0
 	/* Load all those argument registers.  */
 	// We have set up a nice stack frame, just load it into registers.
 	lwz	r3, 20+(1*4)(r1)
@@ -280,36 +269,36 @@ L1:
 L2:
 	/* Make the call.  */
 	bctrl
-	lwz	r2,20(r1)
+	lwz	r2, 20(r1)
 
 	/* Now, deal with the return value.  */
-	mtcrf	0x01,r31
+	mtcrf	0x01, r31
 
-	bt	30,L(done_return_value)
-	bt	29,L(fp_return_value)
-	stw	r3,0(r30)
-	bf	28,L(done_return_value)
-	stw	r4,4(r30)
+	bt	30, L(done_return_value)
+	bt	29, L(fp_return_value)
+	stw	r3, 0(r30)
+	bf	28, L(done_return_value)
+	stw	r4, 4(r30)
 
 	/* Fall through...  */
 
 L(done_return_value):
 	/* Restore the registers we used and return.  */
-	lwz	r9,8(r28)
-	lwz	r31,-4(r28)
-	mtlr	r9
-	lwz	r30, -8(r28)
-	lwz	r29,-12(r28)
-	lwz	r28,-16(r28)
-	lwz	r1,0(r1)
+	mr	r1, r28
+	lwz	r0, 8(r28)
+	lwz	r28,-16(r1)
+	mtlr	r0
+	lwz	r29,-12(r1)
+	lwz	r30, -8(r1)
+	lwz	r31, -4(r1)
 	blr
 
 L(fp_return_value):
-	bf	28,L(float_return_value)
-	stfd	f1,0(r30)
+	bf	28, L(float_return_value)
+	stfd	f1, 0(r30)
 	b	L(done_return_value)
 L(float_return_value):
-	stfs	f1,0(r30)
+	stfs	f1, 0(r30)
 	b	L(done_return_value)
 #endif
 	.long 0
diff --git a/libffi/src/powerpc/aix_closure.S b/libffi/src/powerpc/aix_closure.S
index 3ba7aae..7fe5c83 100644
--- a/libffi/src/powerpc/aix_closure.S
+++ b/libffi/src/powerpc/aix_closure.S
@@ -165,11 +165,11 @@ ffi_closure_ASM:
 
 	/* look up the proper starting point in table  */
 	/* by using return type as offset */
-	ld r4, LC..60(2)		/* get address of jump table */
-	sldi r3, r3, 4		/* now multiply return type by 16 */
-	ld r0, 240+16(r1)	/* load return address */
-	add r3,r3,r4		/* add contents of table to table address */
-	mtctr r3
+	ld	r4, LC..60(2)	/* get address of jump table */
+	sldi	r3, r3, 4	/* now multiply return type by 16 */
+	ld	r0, 240+16(r1)	/* load return address */
+	add	r3, r3, r4	/* add contents of table to table address */
+	mtctr	r3
 	bctr			/* jump to it */
 
 /* Each fragment must be exactly 16 bytes long (4 instructions).
@@ -273,60 +273,59 @@ L..finish:
 	.long .ffi_closure_ASM, TOC[tc0], 0
 	.csect .text[PR]
 .ffi_closure_ASM:
+/* we want to build up an area for the parameters passed */
+/* in registers (both floating point and integer) */
+
+	/* we store gpr 3 to gpr 10 (aligned to 4)
+	in the parents outgoing area  */
+	stw   r3, 24+(0*4)(r1)
+	stw   r4, 24+(1*4)(r1)
+	stw   r5, 24+(2*4)(r1)
+	stw   r6, 24+(3*4)(r1)
+	mflr  r0
 
-	mflr r0			/* extract return address */
-	stw r0, 8(r1)		/* save the return address */
+	stw   r7, 24+(4*4)(r1)
+	stw   r8, 24+(5*4)(r1)
+	stw   r9, 24+(6*4)(r1)
+	stw   r10, 24+(7*4)(r1)
+	stw   r0, 8(r1)
 
 	/* 24 Bytes (Linkage Area) */
 	/* 32 Bytes (params) */
-	/* 104 Bytes (13*8 from FPR) */
 	/* 16  Bytes (result) */
+	/* 104 Bytes (13*8 from FPR) */
 	/* 176 Bytes */
 
-	stwu r1,-176(r1)	/* skip over caller save area
-				keep stack aligned to 16  */
-
-/* we want to build up an area for the parameters passed */
-/* in registers (both floating point and integer) */
-
-	/* we store gpr 3 to gpr 10 (aligned to 4)
-	in the parents outgoing area  */
-	stw   r3, 200(r1)
-	stw   r4, 204(r1)
-	stw   r5, 208(r1)
-	stw   r6, 212(r1)
-	stw   r7, 216(r1)
-	stw   r8, 220(r1)
-	stw   r9, 224(r1)
-	stw   r10, 228(r1)
+	stwu  r1, -176(r1)	/* skip over caller save area
+				   keep stack aligned to 16  */
 
 	/* next save fpr 1 to fpr 13 (aligned to 8) */
-	stfd  f1, 56(r1)
-	stfd  f2, 64(r1)
-	stfd  f3, 72(r1)
-	stfd  f4, 80(r1)
-	stfd  f5, 88(r1)
-	stfd  f6, 96(r1)
-	stfd  f7, 104(r1)
-	stfd  f8, 112(r1)
-	stfd  f9, 120(r1)
-	stfd  f10, 128(r1)
-	stfd  f11, 136(r1)
-	stfd  f12, 144(r1)
-	stfd  f13, 152(r1)
+	stfd  f1, 72+(0*8)(r1)
+	stfd  f2, 72+(1*8)(r1)
+	stfd  f3, 72+(2*8)(r1)
+	stfd  f4, 72+(3*8)(r1)
+	stfd  f5, 72+(4*8)(r1)
+	stfd  f6, 72+(5*8)(r1)
+	stfd  f7, 72+(6*8)(r1)
+	stfd  f8, 72+(7*8)(r1)
+	stfd  f9, 72+(8*8)(r1)
+	stfd  f10, 72+(9*8)(r1)
+	stfd  f11, 72+(10*8)(r1)
+	stfd  f12, 72+(11*8)(r1)
+	stfd  f13, 72+(12*8)(r1)
 
 	/* set up registers for the routine that actually does the work */
 	/* get the context pointer from the trampoline */
-	mr r3,r11
+	mr r3, r11
 
 	/* now load up the pointer to the result storage */
-	addi r4,r1,160
+	addi r4, r1, 56
 
 	/* now load up the pointer to the saved gpr registers */
-	addi r5,r1,200
+	addi r5, r1, 200
 
 	/* now load up the pointer to the saved fpr registers */
-	addi r6,r1,56
+	addi r6, r1, 72
 
 	/* make the call */
 	bl .ffi_closure_helper_DARWIN
@@ -338,84 +337,107 @@ L..finish:
 
 	/* look up the proper starting point in table  */
 	/* by using return type as offset */
-	addi r5,r1,160		/* get pointer to results area */
-	lwz r4,LC..60(2)	/* get address of jump table */
-	slwi r3,r3,2		/* now multiply return type by 4 */
-	lwzx r3,r4,r3		/* get the contents of that table value */
-	add r3,r3,r4		/* add contents of table to table address */
-	mtctr r3
+	lwz	r4, LC..60(2)	/* get address of jump table */
+	slwi	r3, r3, 4	/* now multiply return type by 4 */
+	lwz	r0, 176+8(r1)	/* load return address */
+	lwzx	r3, r4, r3	/* get the contents of that table value */
+	mtctr	r3
 	bctr			/* jump to it */
 
+/* Each fragment must be exactly 16 bytes long (4 instructions).
+   Align to 16 byte boundary for cache and dispatch efficiency.  */
+	.align 4
+
 L..60:
-	.long L..44-L..60    /* FFI_TYPE_VOID */
-	.long L..50-L..60    /* FFI_TYPE_INT */
-	.long L..47-L..60    /* FFI_TYPE_FLOAT */
-	.long L..46-L..60    /* FFI_TYPE_DOUBLE */
-	.long L..45-L..60    /* FFI_TYPE_LONGDOUBLE */
-	.long L..56-L..60    /* FFI_TYPE_UINT8 */
-	.long L..55-L..60    /* FFI_TYPE_SINT8 */
-	.long L..58-L..60    /* FFI_TYPE_UINT16 */
-	.long L..57-L..60    /* FFI_TYPE_SINT16 */
-	.long L..50-L..60    /* FFI_TYPE_UINT32 */
-	.long L..50-L..60    /* FFI_TYPE_SINT32 */
-	.long L..48-L..60    /* FFI_TYPE_UINT64 */
-	.long L..48-L..60    /* FFI_TYPE_SINT64 */
-	.long L..44-L..60    /* FFI_TYPE_STRUCT */
-	.long L..50-L..60    /* FFI_TYPE_POINTER */
-
-
-/* case long double */
-L..45:
-	lfd f1,0(r5)
-	lfd f2,8(r5)
-	b L..44
-
-/* case double */
-L..46:
-	lfd f1,0(r5)
-	b L..44
-
-/* case float */
-L..47:
-	lfs f1,0(r5)
-	b L..44
-
-/* case long long */
-L..48:
-	lwz r3,0(r5)
-	lwz r4,4(r5)
-	b L..44
-
-/* case default / int32 / pointer */
-L..50:
-	lwz r3,0(r5)
-	b L..44
-
-/* case signed int8 */
-L..55:
-	lbz r3,3(r5)
-	extsb r3,r3
-	b L..44
-
-/* case unsigned int8 */
-L..56:
-	lbz r3,3(r5)
-	b L..44
-
-/* case signed int16 */
-L..57:
-	lha r3,2(r5)
-	b L..44
-
-/* case unsigned int16 */
-L..58:
-	lhz r3,2(r5)
-
-/* case void / done	 */
-L..44:
-	addi r1,r1,176		/* restore stack pointer */
-	lwz r0,8(r1)		/* get return address */
-	mtlr r0			/* reset link register */
+/* case FFI_TYPE_VOID */
+	mtlr r0
+	addi r1, r1, 176
+	blr
+	nop
+
+/* case FFI_TYPE_INT */
+	lwz r3, 56+0(r1)
+	mtlr r0
+	addi r1, r1, 176
+	blr
+
+/* case FFI_TYPE_FLOAT */
+	lfs f1, 56+0(r1)
+	mtlr r0
+	addi r1, r1, 176
+	blr
+
+/* case FFI_TYPE_DOUBLE */
+	lfd f1, 56+0(r1)
+	mtlr r0
+	addi r1, r1, 176
+	blr
+
+/* case FFI_TYPE_LONGDOUBLE */
+	lfd f1, 56+0(r1)
+	mtlr r0
+	lfd f2, 56+8(r1)
+	b L..finish
+
+/* case FFI_TYPE_UINT8 */
+	lbz r3, 56+3(r1)
+	mtlr r0
+	addi r1, r1, 176
+	blr
+
+/* case FFI_TYPE_SINT8 */
+	lbz r3, 56+3(r1)
+	mtlr r0
+	extsb r3, r3
+	b L..finish
+
+/* case FFI_TYPE_UINT16 */
+	lhz r3, 56+2(r1)
+	mtlr r0
+	addi r1, r1, 176
+	blr
+
+/* case FFI_TYPE_SINT16 */
+	lha r3, 56+2(r1)
+	mtlr r0
+	addi r1, r1, 176
+	blr
+
+/* case FFI_TYPE_UINT32 */
+	lwz r3, 56+0(r1)
+	mtlr r0
+	addi r1, r1, 176
+	blr
+
+/* case FFI_TYPE_SINT32 */
+	lwz r3, 56+0(r1)
+	mtlr r0
+	addi r1, r1, 176
+	blr
+
+/* case FFI_TYPE_UINT64 */
+	lwz r3, 56+0(r1)
+	mtlr r0
+	lwz r4, 56+4(r1)
+	b L..finish
+
+/* case FFI_TYPE_SINT64 */
+	lwz r3, 56+0(r1)
+	mtlr r0
+	lwz r4, 56+4(r1)
+	b L..finish
+
+/* case FFI_TYPE_STRUCT */
+	mtlr r0
+	addi r1, r1, 176
+	blr
+	nop
+
+/* case FFI_TYPE_POINTER */
+	lwz r3, 56+0(r1)
+	mtlr r0
+L..finish:
+	addi r1, r1, 176
 	blr
 #endif
 /* END(ffi_closure_ASM) */