diff options
| author | Pan Li <pan2.li@intel.com> | 2023-11-02 18:40:10 +0800 |
|---|---|---|
| committer | Pan Li <pan2.li@intel.com> | 2023-11-02 20:08:57 +0800 |
| commit | 81a81abec5c28f2c08f986f1f17ac66e555cbd4b (patch) | |
| tree | 6e2db4839870a1c49e447ab4f094528075574c55 /libcpp | |
| parent | d8ca8edbd382425e96d424c33e8d5ee99dfc6391 (diff) | |
| download | gcc-81a81abec5c28f2c08f986f1f17ac66e555cbd4b.zip gcc-81a81abec5c28f2c08f986f1f17ac66e555cbd4b.tar.gz gcc-81a81abec5c28f2c08f986f1f17ac66e555cbd4b.tar.bz2 | |
RISC-V: Refactor prefix [I/L/LL] rounding API autovec iterator
The previous rounding API start with i/l/ll only works on the same
mode types. For example as below, and we arrange the iterator similar
to fcvt.
* SF => SI
* DF => DI
After we refined this limination from middle-end, these API can also
vectorized with different type sizes, aka:
* HF => SI, HF => DI
* SF => DI, SF => SI
* DF => SI, DF => DI
Then the iterator cannot take care of this simply and this patch
would like to re-arrange the iterator in two items.
* V_VLS_F_CONVERT_SI: handle (HF, SF, DF) => SI
* V_VLS_F_CONVERT_DI: handle (HF, SF, DF) => DI
As well as related mode_attr to reconcile the new iterator.
gcc/ChangeLog:
* config/riscv/autovec.md (lrint<mode><v_i_l_ll_convert>2): Remove.
(lround<mode><v_i_l_ll_convert>2): Ditto.
(lceil<mode><v_i_l_ll_convert>2): Ditto.
(lfloor<mode><v_i_l_ll_convert>2): Ditto.
(lrint<mode><v_f2si_convert>2): New pattern for cvt from
FP to SI.
(lround<mode><v_f2si_convert>2): Ditto.
(lceil<mode><v_f2si_convert>2): Ditto.
(lfloor<mode><v_f2si_convert>2): Ditto.
(lrint<mode><v_f2di_convert>2): New pattern for cvt from
FP to DI.
(lround<mode><v_f2di_convert>2): Ditto.
(lceil<mode><v_f2di_convert>2): Ditto.
(lfloor<mode><v_f2di_convert>2): Ditto.
* config/riscv/vector-iterators.md: Renew iterators for both
the SI and DI.
Signed-off-by: Pan Li <pan2.li@intel.com>
Diffstat (limited to 'libcpp')
0 files changed, 0 insertions, 0 deletions