[to-be-committed] [RISC-V] Try inverting for constant synthesis

So there's another class of constants we're failing to synthesize well.
Specifically those where we can invert our original constant C into C' and C'
takes at least 2 fewer instructions to synthesize than C.  In that case we can
initially generate C', then use xori with the constant -1 to flip all the bits
resulting in our target constant.

I've only seen this trigger when the final synthesis is li+srli+xori. The
original synthesis took on various 4 or 5 instruction forms.

Most of the methods we use to improve constant synthesis are in
riscv_build_integer_1.  I originally tried to put this code in there. But
that'll end up with infinite recursion due to some other ADDI related code
which wants to flip bits and try synthesis.

So this was put into riscv_build_integer and recurses into riscv_build_integer.
This isn't unprecedented, just a bit different than most of the other synthesis
implementation bits.

This doesn't depend on any extensions.  So it should help any rv64 system.

gcc/

	* config/riscv/riscv.cc (riscv_build_integer_one): Verify there
	are no bits left to set in the constant when generating bseti.
	(riscv_built_integer): Synthesize ~value and if it's cheap use it
	with a trailing xori with -1.

gcc/testsuite

	* gcc.target/riscv/synthesis-8.c: New test.

0 files changed, 0 insertions, 0 deletions