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author | Georg-Johann Lay <avr@gjlay.de> | 2024-03-05 15:29:45 +0100 |
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committer | Georg-Johann Lay <avr@gjlay.de> | 2024-03-05 15:36:15 +0100 |
commit | 08ec4adb0285f6a472865cf386bf035ed0eaebce (patch) | |
tree | 7f02da7bb956424f0338a7dccc343cd9016f5260 /libcody/packet.cc | |
parent | db2e13d11a2c2ee60ff1db46dcacd7cecf30ce8f (diff) | |
download | gcc-08ec4adb0285f6a472865cf386bf035ed0eaebce.zip gcc-08ec4adb0285f6a472865cf386bf035ed0eaebce.tar.gz gcc-08ec4adb0285f6a472865cf386bf035ed0eaebce.tar.bz2 |
AVR: Add two RTL peepholes.
Register alloc may expand a 3-operand arithmetic X = Y o CST as
X = CST
X o= Y
where it may be better to instead:
X = Y
X o= CST
because 1) the first insn may use MOVW for "X = Y", and 2) the
operation may be more efficient when performed with a constant,
for example when ADIW or SBIW can be used, or some bytes of
the constant are 0x00 or 0xff.
gcc/
* config/avr/avr.md: Add two RTL peepholes for PLUS, IOR and AND
in HI, PSI, SI that swap operation order from "X = CST, X o= Y"
to "X = Y, X o= CST".
Diffstat (limited to 'libcody/packet.cc')
0 files changed, 0 insertions, 0 deletions