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authorWilco Dijkstra <wilco.dijkstra@arm.com>2023-11-10 14:06:50 +0000
committerWilco Dijkstra <wilco.dijkstra@arm.com>2023-11-10 14:19:59 +0000
commitf880bdc2716d59530949c9c03e4b759c6398c4e4 (patch)
treeec78827c7a191576fe5d674fb5489482b086b7de /libatomic
parent6aaf72ff533550dad68362e8da308b480a9e0f30 (diff)
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libatomic: Improve ifunc selection on AArch64
Add support for ifunc selection based on CPUID register. Neoverse N1 supports atomic 128-bit load/store, so use the FEAT_USCAT ifunc like newer Neoverse cores. Reviewed-by: Kyrylo.Tkachov@arm.com libatomic: * config/linux/aarch64/host-config.h (ifunc1): Use CPUID in ifunc selection.
Diffstat (limited to 'libatomic')
-rw-r--r--libatomic/config/linux/aarch64/host-config.h26
1 files changed, 25 insertions, 1 deletions
diff --git a/libatomic/config/linux/aarch64/host-config.h b/libatomic/config/linux/aarch64/host-config.h
index bea2682..9747acc 100644
--- a/libatomic/config/linux/aarch64/host-config.h
+++ b/libatomic/config/linux/aarch64/host-config.h
@@ -26,7 +26,7 @@
#ifdef HWCAP_USCAT
# if N == 16
-# define IFUNC_COND_1 (hwcap & HWCAP_USCAT)
+# define IFUNC_COND_1 ifunc1 (hwcap)
# else
# define IFUNC_COND_1 (hwcap & HWCAP_ATOMICS)
# endif
@@ -41,4 +41,28 @@
#endif /* HAVE_IFUNC */
+#ifdef HWCAP_USCAT
+
+#define MIDR_IMPLEMENTOR(midr) (((midr) >> 24) & 255)
+#define MIDR_PARTNUM(midr) (((midr) >> 4) & 0xfff)
+
+static inline bool
+ifunc1 (unsigned long hwcap)
+{
+ if (hwcap & HWCAP_USCAT)
+ return true;
+ if (!(hwcap & HWCAP_CPUID))
+ return false;
+
+ unsigned long midr;
+ asm volatile ("mrs %0, midr_el1" : "=r" (midr));
+
+ /* Neoverse N1 supports atomic 128-bit load/store. */
+ if (MIDR_IMPLEMENTOR (midr) == 'A' && MIDR_PARTNUM (midr) == 0xd0c)
+ return true;
+
+ return false;
+}
+#endif
+
#include_next <host-config.h>