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authorAndrew Pinski <quic_apinski@quicinc.com>2024-05-04 02:03:16 -0700
committerAndrew Pinski <quic_apinski@quicinc.com>2024-10-25 10:36:06 -0700
commitc8138acb99003860e1e845499b5b2a4e328a969a (patch)
tree18af6ac1fead43b5d3ffa1842a0ce0ac3e8992db /libatomic/fsub_n.c
parent7c17058eac3834fb03ec9e518235e4192557b97d (diff)
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aarch64: Support multiple variants including up to 3
On some of the Qualcomm's SoC that includes oryon-1 core, the variant will be different on the cores due to big.little config. Though the difference between big and little is not significant enough to have seperate cost/scheduling models for them and the feature set is the same across all variants. Also on some SoCs, there are 3 variants of the core, big.middle.little so this increases the support there for up to 3 cores and 3 variants in the original parsing loop but it does not change the support for max of 2 different cores. After this patch and the patch that adds oryon-1, -mcpu=native works on the SoCs I am working with. Bootstrapped and tested on aarch64-linux-gnu with no regressions. gcc/ChangeLog: * config/aarch64/driver-aarch64.cc (host_detect_local_cpu): Support 3 cores and 3 variants. If there is one core but multiple variant, then treat the variant as being all. gcc/testsuite/ChangeLog: * gcc.target/aarch64/cpunative/info_25: New file. * gcc.target/aarch64/cpunative/info_26: New file. * gcc.target/aarch64/cpunative/native_cpu_25.c: New test. * gcc.target/aarch64/cpunative/native_cpu_26.c: New test. Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
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