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| author | Marc Glisse <marc.glisse@inria.fr> | 2012-08-17 19:53:57 +0200 |
|---|---|---|
| committer | Marc Glisse <glisse@gcc.gnu.org> | 2012-08-17 17:53:57 +0000 |
| commit | fd9da2c807e91636a3faaf381c9d37a6c3f9a216 (patch) | |
| tree | 60c5a55e6ad9bcc6520e2b4eb53f6dc52689af2d /gcc | |
| parent | d9886a9e04caf0bd1e9147d95af2ea8350ad8e1c (diff) | |
| download | gcc-fd9da2c807e91636a3faaf381c9d37a6c3f9a216.zip gcc-fd9da2c807e91636a3faaf381c9d37a6c3f9a216.tar.gz gcc-fd9da2c807e91636a3faaf381c9d37a6c3f9a216.tar.bz2 | |
simplify-rtx.c (simplify_binary_operation_1): Optimize shuffle of a concatenation.
2012-08-17 Marc Glisse <marc.glisse@inria.fr>
gcc/
* simplify-rtx.c (simplify_binary_operation_1): Optimize shuffle of
a concatenation.
gcc/testsuite/
* gcc.target/i386/perm-concat.c: New test.
From-SVN: r190490
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/simplify-rtx.c | 17 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 4 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/i386/perm-concat.c | 13 |
4 files changed, 40 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 0c100df..3f74243 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2012-08-17 Marc Glisse <marc.glisse@inria.fr> + + * simplify-rtx.c (simplify_binary_operation_1): Optimize shuffle of + a concatenation. + + 2012-08-17 H.J. Lu <hongjiu.lu@intel.com> * stor-layout.c (compute_record_mode): Replace diff --git a/gcc/simplify-rtx.c b/gcc/simplify-rtx.c index 16dbd8a..a878048 100644 --- a/gcc/simplify-rtx.c +++ b/gcc/simplify-rtx.c @@ -3255,6 +3255,23 @@ simplify_binary_operation_1 (enum rtx_code code, enum machine_mode mode, return simplify_gen_binary (VEC_CONCAT, mode, subop0, subop1); } + + if (XVECLEN (trueop1, 0) == 2 + && CONST_INT_P (XVECEXP (trueop1, 0, 0)) + && CONST_INT_P (XVECEXP (trueop1, 0, 1)) + && GET_CODE (trueop0) == VEC_CONCAT + && GET_MODE (trueop0) == mode) + { + unsigned int i0 = INTVAL (XVECEXP (trueop1, 0, 0)); + unsigned int i1 = INTVAL (XVECEXP (trueop1, 0, 1)); + rtx subop0, subop1; + + gcc_assert (i0 < 2 && i1 < 2); + subop0 = XEXP (trueop0, i0); + subop1 = XEXP (trueop0, i1); + + return simplify_gen_binary (VEC_CONCAT, mode, subop0, subop1); + } } if (XVECLEN (trueop1, 0) == 1 diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 3936642..6f561b8 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,7 @@ +2012-08-17 Marc Glisse <marc.glisse@inria.fr> + + * gcc.target/i386/perm-concat.c: New test. + 2012-08-17 Julian Brown <julian@codesourcery.com> * gcc.target/arm/div64-unwinding.c: New test. diff --git a/gcc/testsuite/gcc.target/i386/perm-concat.c b/gcc/testsuite/gcc.target/i386/perm-concat.c new file mode 100644 index 0000000..10955c2 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/perm-concat.c @@ -0,0 +1,13 @@ +/* { dg-do compile } */ +/* { dg-options "-O -mavx -mfpmath=sse" } */ + +typedef double v2df __attribute__ ((__vector_size__ (16))); + +v2df +f (double d) +{ + v2df x = {-d, d}; + return __builtin_ia32_vpermilpd (x, 1); +} + +/* { dg-final { scan-assembler-not "\tvpermilpd\[ \t\]" } } */ |