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author | GCC Administrator <gccadmin@gcc.gnu.org> | 2023-12-28 00:19:23 +0000 |
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committer | GCC Administrator <gccadmin@gcc.gnu.org> | 2023-12-28 00:19:23 +0000 |
commit | fb57e402d027205ea338ffe4d8a987162ebc3160 (patch) | |
tree | 40cfd9acddfc44fcded86c8e2fa574a23ce6e8a0 /gcc | |
parent | f19ceb2d49afdfa527d2109476a3f1d383c47e1b (diff) | |
download | gcc-fb57e402d027205ea338ffe4d8a987162ebc3160.zip gcc-fb57e402d027205ea338ffe4d8a987162ebc3160.tar.gz gcc-fb57e402d027205ea338ffe4d8a987162ebc3160.tar.bz2 |
Daily bump.
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/ChangeLog | 77 | ||||
-rw-r--r-- | gcc/DATESTAMP | 2 | ||||
-rw-r--r-- | gcc/testsuite/ChangeLog | 52 |
3 files changed, 130 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index deb364c..6cf4e32 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,80 @@ +2023-12-27 Xi Ruoyao <xry111@xry111.site> + + PR target/113148 + * config/loongarch/loongarch.cc (loongarch_secondary_reload): + Check if regno == -1 besides MEM_P (x) for reloading FCCmode + from/to FPR to/from memory. + +2023-12-27 Xi Ruoyao <xry111@xry111.site> + + * config/loongarch/loongarch.md (rotl<mode>3): + New define_expand. + * config/loongarch/simd.md (vrotl<mode>3): Likewise. + (rotl<mode>3): Likewise. + +2023-12-27 Juzhe-Zhong <juzhe.zhong@rivai.ai> + + PR target/113112 + * config/riscv/riscv-vector-costs.cc (is_gimple_assign_or_call): New function. + (get_first_lane_point): Ditto. + (get_last_lane_point): Ditto. + (max_number_of_live_regs): Refine live point dump. + (compute_estimated_lmul): Make unknown NITERS loop be aware of liveness. + (costs::better_main_loop_than_p): Ditto. + * config/riscv/riscv-vector-costs.h (struct stmt_point): Add new member. + +2023-12-27 Chenghui Pan <panchenghui@loongson.cn> + + * config/loongarch/lasx.md: Use loongarch_split_move and + loongarch_split_move_p directly. + * config/loongarch/loongarch-protos.h + (loongarch_split_move): Remove unnecessary argument. + (loongarch_split_move_insn_p): Delete. + (loongarch_split_move_insn): Delete. + * config/loongarch/loongarch.cc + (loongarch_split_move_insn_p): Delete. + (loongarch_load_store_insns): Use loongarch_split_move_p + directly. + (loongarch_split_move): remove the unnecessary processing. + (loongarch_split_move_insn): Delete. + * config/loongarch/lsx.md: Use loongarch_split_move and + loongarch_split_move_p directly. + +2023-12-27 Chenghui Pan <panchenghui@loongson.cn> + + * config/loongarch/lasx.md (vec_concatv4di): Delete. + (vec_concatv8si): Delete. + (vec_concatv16hi): Delete. + (vec_concatv32qi): Delete. + (vec_concatv4df): Delete. + (vec_concatv8sf): Delete. + (vec_concat<mode>): New template with insn output fixed. + +2023-12-27 Li Wei <liwei@loongson.cn> + + * config/loongarch/loongarch.md: Adjust. + +2023-12-27 Haochen Gui <guihaoc@gcc.gnu.org> + + * config/rs6000/rs6000-string.cc (expand_block_compare): Assert + only P7 above can enter this function. Remove P7 CPU test and let + P7 BE do the expand. + +2023-12-27 Haochen Gui <guihaoc@gcc.gnu.org> + + * config/rs6000/rs6000.md (cmpmemsi): Fail when optimizing for size. + +2023-12-27 Haochen Gui <guihaoc@gcc.gnu.org> + + * config/rs6000/rs6000.h (TARGET_EFFICIENT_OVERLAPPING_UNALIGNED): + Remove. + * config/rs6000/rs6000-string.cc (select_block_compare_mode): + Replace TARGET_EFFICIENT_OVERLAPPING_UNALIGNED with + targetm.slow_unaligned_access. + (expand_block_compare_gpr): Likewise. + (expand_block_compare): Likewise. + (expand_strncmp_gpr_sequence): Likewise. + 2023-12-26 Juzhe-Zhong <juzhe.zhong@rivai.ai> PR target/113112 diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP index a63b9e9..460a238 100644 --- a/gcc/DATESTAMP +++ b/gcc/DATESTAMP @@ -1 +1 @@ -20231227 +20231228 diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 5f56e86..f5fb4c0 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,55 @@ +2023-12-27 Xi Ruoyao <xry111@xry111.site> + + PR target/113148 + * gcc.target/loongarch/pr113148.c: New test. + +2023-12-27 Xi Ruoyao <xry111@xry111.site> + + * gcc.target/loongarch/rotl-with-rotr.c: New test. + * gcc.target/loongarch/rotl-with-vrotr-b.c: New test. + * gcc.target/loongarch/rotl-with-vrotr-h.c: New test. + * gcc.target/loongarch/rotl-with-vrotr-w.c: New test. + * gcc.target/loongarch/rotl-with-vrotr-d.c: New test. + * gcc.target/loongarch/rotl-with-xvrotr-b.c: New test. + * gcc.target/loongarch/rotl-with-xvrotr-h.c: New test. + * gcc.target/loongarch/rotl-with-xvrotr-w.c: New test. + * gcc.target/loongarch/rotl-with-xvrotr-d.c: New test. + +2023-12-27 Juzhe-Zhong <juzhe.zhong@rivai.ai> + + PR target/113112 + * gcc.dg/vect/costmodel/riscv/rvv/pr113112-1.c: + * gcc.dg/vect/costmodel/riscv/rvv/pr113112-3.c: New test. + +2023-12-27 Chenghui Pan <panchenghui@loongson.cn> + + * gcc.target/loongarch/vector/lsx/lsx-mov-1.c: New test. + +2023-12-27 Haochen Gui <guihaoc@gcc.gnu.org> + + * gcc.target/powerpc/block-cmp-4.c: New. + +2023-12-27 Haochen Gui <guihaoc@gcc.gnu.org> + + * gcc.target/powerpc/block-cmp-3.c: New. + +2023-12-27 Haochen Gui <guihaoc@gcc.gnu.org> + + * gcc.target/powerpc/block-cmp-1.c: New. + * gcc.target/powerpc/block-cmp-2.c: New. + +2023-12-27 David Edelsohn <dje.gcc@gmail.com> + + * g++.dg/cpp23/wchar-multi1.C: Require 4 byte wchar_t. + +2023-12-27 David Edelsohn <dje.gcc@gmail.com> + + * g++.dg/ext/attr-section1.C: Test for csect section directive. + * g++.dg/ext/attr-section1a.C: Same. + * g++.dg/ext/attr-section2.C: Same. + * g++.dg/ext/attr-section2a.C: Same. + * g++.dg/ext/attr-section2b.C: Same. + 2023-12-26 David Edelsohn <dje.gcc@gmail.com> * gcc.dg/analyzer/out-of-bounds-diagram-17.c: Skip on AIX. |