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| author | Richard Earnshaw <rearnsha@arm.com> | 2023-11-07 10:39:14 +0000 |
|---|---|---|
| committer | Richard Earnshaw <rearnsha@arm.com> | 2023-11-13 14:15:57 +0000 |
| commit | fa3fa735db16ec441db2aa155c941f289750576b (patch) | |
| tree | d6b9c792d00836a6c716c8849ab40b91c2749645 /gcc | |
| parent | 47b3f2c84dea6460b1cd14b5dbca4c2ad609f2ca (diff) | |
| download | gcc-fa3fa735db16ec441db2aa155c941f289750576b.zip gcc-fa3fa735db16ec441db2aa155c941f289750576b.tar.gz gcc-fa3fa735db16ec441db2aa155c941f289750576b.tar.bz2 | |
testsuite: arm: tighten up mode-specific ISA tests
Some of the standard Arm architecture tests require the test to use a
specific instruction set (arm or thumb). But although the framework
was checking that the flag was accepted, it wasn't checking that the
flag wasn't somehow being override (eg by run-specific options). We
can improve these tests easily by checking whether or not __thumb-_ is
defined.
gcc/testsuite:
* lib/target-supports.exp (check_effective_target_arm_arch_FUNC_ok):
For instruction-set specific tests, check that __thumb__ is, or
isn't defined as appropriate.
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/testsuite/lib/target-supports.exp | 26 |
1 files changed, 13 insertions, 13 deletions
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index 316e34a..3d504d2 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -5403,25 +5403,25 @@ proc check_effective_target_arm_fp16_hw { } { foreach { armfunc armflag armdefs } { v4 "-march=armv4 -marm" __ARM_ARCH_4__ v4t "-march=armv4t -mfloat-abi=softfp" __ARM_ARCH_4T__ - v4t_arm "-march=armv4t -marm" __ARM_ARCH_4T__ - v4t_thumb "-march=armv4t -mthumb -mfloat-abi=softfp" __ARM_ARCH_4T__ + v4t_arm "-march=armv4t -marm" "__ARM_ARCH_4T__ && !__thumb__" + v4t_thumb "-march=armv4t -mthumb -mfloat-abi=softfp" "__ARM_ARCH_4T__ && __thumb__" v5t "-march=armv5t -mfloat-abi=softfp" __ARM_ARCH_5T__ - v5t_arm "-march=armv5t -marm" __ARM_ARCH_5T__ - v5t_thumb "-march=armv5t -mthumb -mfloat-abi=softfp" __ARM_ARCH_5T__ + v5t_arm "-march=armv5t -marm" "__ARM_ARCH_5T__ && !__thumb__" + v5t_thumb "-march=armv5t -mthumb -mfloat-abi=softfp" "__ARM_ARCH_5T__ && __thumb__" v5te "-march=armv5te+fp -mfloat-abi=softfp" __ARM_ARCH_5TE__ - v5te_arm "-march=armv5te+fp -marm" __ARM_ARCH_5TE__ - v5te_thumb "-march=armv5te+fp -mthumb -mfloat-abi=softfp" __ARM_ARCH_5TE__ - xscale_arm "-mcpu=xscale -mfloat-abi=soft -marm" __XSCALE__ + v5te_arm "-march=armv5te+fp -marm" "__ARM_ARCH_5TE__ && !__thumb__" + v5te_thumb "-march=armv5te+fp -mthumb -mfloat-abi=softfp" "__ARM_ARCH_5TE__ && __thumb__" + xscale_arm "-mcpu=xscale -mfloat-abi=soft -marm" "__XSCALE__ && !__thumb__" v6 "-march=armv6+fp -mfloat-abi=softfp" __ARM_ARCH_6__ - v6_arm "-march=armv6+fp -marm" __ARM_ARCH_6__ - v6_thumb "-march=armv6+fp -mthumb -mfloat-abi=softfp" __ARM_ARCH_6__ + v6_arm "-march=armv6+fp -marm" "__ARM_ARCH_6__ && !__thumb__" + v6_thumb "-march=armv6+fp -mthumb -mfloat-abi=softfp" "__ARM_ARCH_6__ && __thumb__" v6k "-march=armv6k+fp -mfloat-abi=softfp" __ARM_ARCH_6K__ - v6k_arm "-march=armv6k+fp -marm" __ARM_ARCH_6K__ - v6k_thumb "-march=armv6k+fp -mthumb -mfloat-abi=softfp" __ARM_ARCH_6K__ + v6k_arm "-march=armv6k+fp -marm" "__ARM_ARCH_6K__ && !__thumb__" + v6k_thumb "-march=armv6k+fp -mthumb -mfloat-abi=softfp" "__ARM_ARCH_6K__ && __thumb__" v6t2 "-march=armv6t2+fp" __ARM_ARCH_6T2__ v6z "-march=armv6z+fp -mfloat-abi=softfp" __ARM_ARCH_6Z__ - v6z_arm "-march=armv6z+fp -marm" __ARM_ARCH_6Z__ - v6z_thumb "-march=armv6z+fp -mthumb -mfloat-abi=softfp" __ARM_ARCH_6Z__ + v6z_arm "-march=armv6z+fp -marm" "__ARM_ARCH_6Z__ && !__thumb__" + v6z_thumb "-march=armv6z+fp -mthumb -mfloat-abi=softfp" "__ARM_ARCH_6Z__ && __thumb__" v6m "-march=armv6-m -mthumb -mfloat-abi=soft" __ARM_ARCH_6M__ v7a "-march=armv7-a+fp" __ARM_ARCH_7A__ v7r "-march=armv7-r+fp" __ARM_ARCH_7R__ |