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authorMichael Meissner <meissner@linux.ibm.com>2019-12-17 22:16:40 +0000
committerMichael Meissner <meissner@gcc.gnu.org>2019-12-17 22:16:40 +0000
commitef759fd121558455cd45d15e3bcf5e66279d6251 (patch)
treecfad2a1ecf8a16859f58cd97f79a5164540da827 /gcc
parenta50e038893fe801178f71f09bda01910df50394e (diff)
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Use PLI to load up 32-bit SImode constants if -mcpu=future.
2019-12-17 Michael Meissner <meissner@linux.ibm.com> * config/rs6000/rs6000.md (movsi_internal1): Add alternative to use PLI to load up 32-bit constants if -mcpu=future. From-SVN: r279475
Diffstat (limited to 'gcc')
-rw-r--r--gcc/ChangeLog2
-rw-r--r--gcc/config/rs6000/rs6000.md16
2 files changed, 10 insertions, 8 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 233771c..f8b3ef2 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -4,6 +4,8 @@
constant can be loaded with PLI if -mcpu=future.
* config/rs6000/rs6000.md (movdi_internal64): Add alternative to
use PLI to load up 34-bit constants if -mcpu=future.
+ (movsi_internal1): Add alternative to use PLI to load up 32-bit
+ constants if -mcpu=future.
2019-12-17 Jakub Jelinek <jakub@redhat.com>
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index 3181983..6e12d62 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -6892,7 +6892,7 @@
;; MR LA
;; LWZ LFIWZX LXSIWZX
;; STW STFIWX STXSIWX
-;; LI LIS #
+;; LI LIS PLI #
;; XXLOR XXSPLTIB 0 XXSPLTIB -1 VSPLTISW
;; XXLXOR 0 XXLORC -1 P9 const
;; MTVSRWZ MFVSRWZ
@@ -6903,7 +6903,7 @@
"=r, r,
r, d, v,
m, Z, Z,
- r, r, r,
+ r, r, r, r,
wa, wa, wa, v,
wa, v, v,
wa, r,
@@ -6912,7 +6912,7 @@
"r, U,
m, Z, Z,
r, d, v,
- I, L, n,
+ I, L, eI, n,
wa, O, wM, wB,
O, wM, wS,
r, wa,
@@ -6930,6 +6930,7 @@
stxsiwx %x1,%y0
li %0,%1
lis %0,%v1
+ li %0,%1
#
xxlor %x0,%x1,%x1
xxspltib %x0,0
@@ -6947,7 +6948,7 @@
"*, *,
load, fpload, fpload,
store, fpstore, fpstore,
- *, *, *,
+ *, *, *, *,
veclogical, vecsimple, vecsimple, vecsimple,
veclogical, veclogical, vecsimple,
mffgpr, mftgpr,
@@ -6956,7 +6957,7 @@
"*, *,
*, *, *,
*, *, *,
- *, *, 8,
+ *, *, *, 8,
*, *, *, *,
*, *, 8,
*, *,
@@ -6965,7 +6966,7 @@
"*, *,
*, p8v, p8v,
*, p8v, p8v,
- *, *, *,
+ *, *, fut, *,
p8v, p9v, p9v, p8v,
p9v, p8v, p9v,
p8v, p8v,
@@ -7120,8 +7121,7 @@
(define_split
[(set (match_operand:SI 0 "gpc_reg_operand")
(match_operand:SI 1 "const_int_operand"))]
- "(unsigned HOST_WIDE_INT) (INTVAL (operands[1]) + 0x8000) >= 0x10000
- && (INTVAL (operands[1]) & 0xffff) != 0"
+ "num_insns_constant (operands[1], SImode) > 1"
[(set (match_dup 0)
(match_dup 2))
(set (match_dup 0)