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author | Juzhe-Zhong <juzhe.zhong@rivai.ai> | 2023-09-01 07:12:17 +0800 |
---|---|---|
committer | Pan Li <pan2.li@intel.com> | 2023-09-01 18:59:01 +0800 |
commit | ef4e916b526a65411a577126d34c3b0bb97b6111 (patch) | |
tree | 2f63c6c5a98276016f4c79458ec8bc4b22714ab6 /gcc | |
parent | e5af77adefc981cbc253cc4c589e1fc06cf07f43 (diff) | |
download | gcc-ef4e916b526a65411a577126d34c3b0bb97b6111.zip gcc-ef4e916b526a65411a577126d34c3b0bb97b6111.tar.gz gcc-ef4e916b526a65411a577126d34c3b0bb97b6111.tar.bz2 |
RISC-V: Add dynamic LMUL compile option
We are going to support dynamic LMUL support.
gcc/ChangeLog:
* config/riscv/riscv-opts.h (enum riscv_autovec_lmul_enum): Add
dynamic enum.
* config/riscv/riscv.opt: Add dynamic compile option.
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/config/riscv/riscv-opts.h | 4 | ||||
-rw-r--r-- | gcc/config/riscv/riscv.opt | 3 |
2 files changed, 6 insertions, 1 deletions
diff --git a/gcc/config/riscv/riscv-opts.h b/gcc/config/riscv/riscv-opts.h index 5ed69ab..79e0f12 100644 --- a/gcc/config/riscv/riscv-opts.h +++ b/gcc/config/riscv/riscv-opts.h @@ -79,7 +79,9 @@ enum riscv_autovec_lmul_enum { RVV_M1 = 1, RVV_M2 = 2, RVV_M4 = 4, - RVV_M8 = 8 + RVV_M8 = 8, + /* For dynamic LMUL, we compare COST start with LMUL8. */ + RVV_DYNAMIC = RVV_M8 }; enum riscv_multilib_select_kind { diff --git a/gcc/config/riscv/riscv.opt b/gcc/config/riscv/riscv.opt index d2407c3..eca0dda 100644 --- a/gcc/config/riscv/riscv.opt +++ b/gcc/config/riscv/riscv.opt @@ -311,6 +311,9 @@ Enum(riscv_autovec_lmul) String(m4) Value(RVV_M4) EnumValue Enum(riscv_autovec_lmul) String(m8) Value(RVV_M8) +EnumValue +Enum(riscv_autovec_lmul) String(dynamic) Value(RVV_DYNAMIC) + -param=riscv-autovec-lmul= Target RejectNegative Joined Enum(riscv_autovec_lmul) Var(riscv_autovec_lmul) Init(RVV_M1) -param=riscv-autovec-lmul=<string> Set the RVV LMUL of auto-vectorization in the RISC-V port. |